Merge branch 'master' of ../net-2.6/
[linux-2.6] / drivers / net / wireless / rtl8180_dev.c
1
2 /*
3  * Linux device driver for RTL8180 / RTL8185
4  *
5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7  *
8  * Based on the r8180 driver, which is:
9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10  *
11  * Thanks to Realtek for their support!
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as
15  * published by the Free Software Foundation.
16  */
17
18 #include <linux/init.h>
19 #include <linux/pci.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
24
25 #include "rtl8180.h"
26 #include "rtl8180_rtl8225.h"
27 #include "rtl8180_sa2400.h"
28 #include "rtl8180_max2820.h"
29 #include "rtl8180_grf5101.h"
30
31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
34 MODULE_LICENSE("GPL");
35
36 static struct pci_device_id rtl8180_table[] __devinitdata = {
37         /* rtl8185 */
38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
41
42         /* rtl8180 */
43         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
44         { PCI_DEVICE(0x1799, 0x6001) },
45         { PCI_DEVICE(0x1799, 0x6020) },
46         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
47         { }
48 };
49
50 MODULE_DEVICE_TABLE(pci, rtl8180_table);
51
52 static const struct ieee80211_rate rtl818x_rates[] = {
53         { .bitrate = 10, .hw_value = 0, },
54         { .bitrate = 20, .hw_value = 1, },
55         { .bitrate = 55, .hw_value = 2, },
56         { .bitrate = 110, .hw_value = 3, },
57         { .bitrate = 60, .hw_value = 4, },
58         { .bitrate = 90, .hw_value = 5, },
59         { .bitrate = 120, .hw_value = 6, },
60         { .bitrate = 180, .hw_value = 7, },
61         { .bitrate = 240, .hw_value = 8, },
62         { .bitrate = 360, .hw_value = 9, },
63         { .bitrate = 480, .hw_value = 10, },
64         { .bitrate = 540, .hw_value = 11, },
65 };
66
67 static const struct ieee80211_channel rtl818x_channels[] = {
68         { .center_freq = 2412 },
69         { .center_freq = 2417 },
70         { .center_freq = 2422 },
71         { .center_freq = 2427 },
72         { .center_freq = 2432 },
73         { .center_freq = 2437 },
74         { .center_freq = 2442 },
75         { .center_freq = 2447 },
76         { .center_freq = 2452 },
77         { .center_freq = 2457 },
78         { .center_freq = 2462 },
79         { .center_freq = 2467 },
80         { .center_freq = 2472 },
81         { .center_freq = 2484 },
82 };
83
84
85
86
87 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
88 {
89         struct rtl8180_priv *priv = dev->priv;
90         int i = 10;
91         u32 buf;
92
93         buf = (data << 8) | addr;
94
95         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
96         while (i--) {
97                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
98                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
99                         return;
100         }
101 }
102
103 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
104 {
105         struct rtl8180_priv *priv = dev->priv;
106         unsigned int count = 32;
107
108         while (count--) {
109                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
110                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
111                 u32 flags = le32_to_cpu(entry->flags);
112
113                 if (flags & RTL8180_RX_DESC_FLAG_OWN)
114                         return;
115
116                 if (unlikely(flags & (RTL8180_RX_DESC_FLAG_DMA_FAIL |
117                                       RTL8180_RX_DESC_FLAG_FOF |
118                                       RTL8180_RX_DESC_FLAG_RX_ERR)))
119                         goto done;
120                 else {
121                         u32 flags2 = le32_to_cpu(entry->flags2);
122                         struct ieee80211_rx_status rx_status = {0};
123                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
124
125                         if (unlikely(!new_skb))
126                                 goto done;
127
128                         pci_unmap_single(priv->pdev,
129                                          *((dma_addr_t *)skb->cb),
130                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
131                         skb_put(skb, flags & 0xFFF);
132
133                         rx_status.antenna = (flags2 >> 15) & 1;
134                         /* TODO: improve signal/rssi reporting */
135                         rx_status.signal = flags2 & 0xFF;
136                         rx_status.ssi = (flags2 >> 8) & 0x7F;
137                         /* XXX: is this correct? */
138                         rx_status.rate_idx = (flags >> 20) & 0xF;
139                         rx_status.freq = dev->conf.channel->center_freq;
140                         rx_status.band = dev->conf.channel->band;
141                         rx_status.mactime = le64_to_cpu(entry->tsft);
142                         rx_status.flag |= RX_FLAG_TSFT;
143                         if (flags & RTL8180_RX_DESC_FLAG_CRC32_ERR)
144                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
145
146                         ieee80211_rx_irqsafe(dev, skb, &rx_status);
147
148                         skb = new_skb;
149                         priv->rx_buf[priv->rx_idx] = skb;
150                         *((dma_addr_t *) skb->cb) =
151                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
152                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
153                 }
154
155         done:
156                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
157                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
158                                            MAX_RX_SIZE);
159                 if (priv->rx_idx == 31)
160                         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
161                 priv->rx_idx = (priv->rx_idx + 1) % 32;
162         }
163 }
164
165 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
166 {
167         struct rtl8180_priv *priv = dev->priv;
168         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
169
170         while (skb_queue_len(&ring->queue)) {
171                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
172                 struct sk_buff *skb;
173                 struct ieee80211_tx_status status;
174                 struct ieee80211_tx_control *control;
175                 u32 flags = le32_to_cpu(entry->flags);
176
177                 if (flags & RTL8180_TX_DESC_FLAG_OWN)
178                         return;
179
180                 memset(&status, 0, sizeof(status));
181
182                 ring->idx = (ring->idx + 1) % ring->entries;
183                 skb = __skb_dequeue(&ring->queue);
184                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
185                                  skb->len, PCI_DMA_TODEVICE);
186
187                 control = *((struct ieee80211_tx_control **)skb->cb);
188                 if (control)
189                         memcpy(&status.control, control, sizeof(*control));
190                 kfree(control);
191
192                 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
193                         if (flags & RTL8180_TX_DESC_FLAG_TX_OK)
194                                 status.flags = IEEE80211_TX_STATUS_ACK;
195                         else
196                                 status.excessive_retries = 1;
197                 }
198                 status.retry_count = flags & 0xFF;
199
200                 ieee80211_tx_status_irqsafe(dev, skb, &status);
201                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
202                         ieee80211_wake_queue(dev, prio);
203         }
204 }
205
206 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
207 {
208         struct ieee80211_hw *dev = dev_id;
209         struct rtl8180_priv *priv = dev->priv;
210         u16 reg;
211
212         spin_lock(&priv->lock);
213         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
214         if (unlikely(reg == 0xFFFF)) {
215                 spin_unlock(&priv->lock);
216                 return IRQ_HANDLED;
217         }
218
219         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
220
221         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
222                 rtl8180_handle_tx(dev, 3);
223
224         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
225                 rtl8180_handle_tx(dev, 2);
226
227         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
228                 rtl8180_handle_tx(dev, 1);
229
230         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
231                 rtl8180_handle_tx(dev, 0);
232
233         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
234                 rtl8180_handle_rx(dev);
235
236         spin_unlock(&priv->lock);
237
238         return IRQ_HANDLED;
239 }
240
241 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
242                       struct ieee80211_tx_control *control)
243 {
244         struct rtl8180_priv *priv = dev->priv;
245         struct rtl8180_tx_ring *ring;
246         struct rtl8180_tx_desc *entry;
247         unsigned long flags;
248         unsigned int idx, prio;
249         dma_addr_t mapping;
250         u32 tx_flags;
251         u16 plcp_len = 0;
252         __le16 rts_duration = 0;
253
254         prio = control->queue;
255         ring = &priv->tx_ring[prio];
256
257         mapping = pci_map_single(priv->pdev, skb->data,
258                                  skb->len, PCI_DMA_TODEVICE);
259
260         BUG_ON(!control->tx_rate);
261
262         tx_flags = RTL8180_TX_DESC_FLAG_OWN | RTL8180_TX_DESC_FLAG_FS |
263                    RTL8180_TX_DESC_FLAG_LS |
264                    (control->tx_rate->hw_value << 24) | skb->len;
265
266         if (priv->r8185)
267                 tx_flags |= RTL8180_TX_DESC_FLAG_DMA |
268                             RTL8180_TX_DESC_FLAG_NO_ENC;
269
270         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
271                 BUG_ON(!control->rts_cts_rate);
272                 tx_flags |= RTL8180_TX_DESC_FLAG_RTS;
273                 tx_flags |= control->rts_cts_rate->hw_value << 19;
274         } else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
275                 BUG_ON(!control->rts_cts_rate);
276                 tx_flags |= RTL8180_TX_DESC_FLAG_CTS;
277                 tx_flags |= control->rts_cts_rate->hw_value << 19;
278         }
279
280         *((struct ieee80211_tx_control **) skb->cb) =
281                 kmemdup(control, sizeof(*control), GFP_ATOMIC);
282
283         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
284                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
285                                                       control);
286
287         if (!priv->r8185) {
288                 unsigned int remainder;
289
290                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
291                                         (control->tx_rate->bitrate * 2) / 10);
292                 remainder = (16 * (skb->len + 4)) %
293                             ((control->tx_rate->bitrate * 2) / 10);
294                 if (remainder > 0 && remainder <= 6)
295                         plcp_len |= 1 << 15;
296         }
297
298         spin_lock_irqsave(&priv->lock, flags);
299         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
300         entry = &ring->desc[idx];
301
302         entry->rts_duration = rts_duration;
303         entry->plcp_len = cpu_to_le16(plcp_len);
304         entry->tx_buf = cpu_to_le32(mapping);
305         entry->frame_len = cpu_to_le32(skb->len);
306         entry->flags2 = control->alt_retry_rate != NULL ?
307                         control->alt_retry_rate->bitrate << 4 : 0;
308         entry->retry_limit = control->retry_limit;
309         entry->flags = cpu_to_le32(tx_flags);
310         __skb_queue_tail(&ring->queue, skb);
311         if (ring->entries - skb_queue_len(&ring->queue) < 2)
312                 ieee80211_stop_queue(dev, control->queue);
313         spin_unlock_irqrestore(&priv->lock, flags);
314
315         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
316
317         return 0;
318 }
319
320 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
321 {
322         u8 reg;
323
324         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
325         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
326         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
327                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
328         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
329         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
330                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
331         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
332 }
333
334 static int rtl8180_init_hw(struct ieee80211_hw *dev)
335 {
336         struct rtl8180_priv *priv = dev->priv;
337         u16 reg;
338
339         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
340         rtl818x_ioread8(priv, &priv->map->CMD);
341         msleep(10);
342
343         /* reset */
344         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
345         rtl818x_ioread8(priv, &priv->map->CMD);
346
347         reg = rtl818x_ioread8(priv, &priv->map->CMD);
348         reg &= (1 << 1);
349         reg |= RTL818X_CMD_RESET;
350         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
351         rtl818x_ioread8(priv, &priv->map->CMD);
352         msleep(200);
353
354         /* check success of reset */
355         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
356                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
357                 return -ETIMEDOUT;
358         }
359
360         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
361         rtl818x_ioread8(priv, &priv->map->CMD);
362         msleep(200);
363
364         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
365                 /* For cardbus */
366                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
367                 reg |= 1 << 1;
368                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
369                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
370                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
371                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
372         }
373
374         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
375
376         if (!priv->r8185)
377                 rtl8180_set_anaparam(priv, priv->anaparam);
378
379         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
380         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
381         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
382         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
383         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
384
385         /* TODO: necessary? specs indicate not */
386         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
387         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
388         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
389         if (priv->r8185) {
390                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
391                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
392         }
393         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
394
395         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
396
397         /* TODO: turn off hw wep on rtl8180 */
398
399         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
400
401         if (priv->r8185) {
402                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
403                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
404                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
405
406                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
407
408                 /* TODO: set ClkRun enable? necessary? */
409                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
410                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
411                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
412                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
413                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
414                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
415         } else {
416                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
417                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
418
419                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
420                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
421         }
422
423         priv->rf->init(dev);
424         if (priv->r8185)
425                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
426         return 0;
427 }
428
429 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
430 {
431         struct rtl8180_priv *priv = dev->priv;
432         struct rtl8180_rx_desc *entry;
433         int i;
434
435         priv->rx_ring = pci_alloc_consistent(priv->pdev,
436                                              sizeof(*priv->rx_ring) * 32,
437                                              &priv->rx_ring_dma);
438
439         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
440                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
441                        wiphy_name(dev->wiphy));
442                 return -ENOMEM;
443         }
444
445         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
446         priv->rx_idx = 0;
447
448         for (i = 0; i < 32; i++) {
449                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
450                 dma_addr_t *mapping;
451                 entry = &priv->rx_ring[i];
452                 if (!skb)
453                         return 0;
454
455                 priv->rx_buf[i] = skb;
456                 mapping = (dma_addr_t *)skb->cb;
457                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
458                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
459                 entry->rx_buf = cpu_to_le32(*mapping);
460                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
461                                            MAX_RX_SIZE);
462         }
463         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
464         return 0;
465 }
466
467 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
468 {
469         struct rtl8180_priv *priv = dev->priv;
470         int i;
471
472         for (i = 0; i < 32; i++) {
473                 struct sk_buff *skb = priv->rx_buf[i];
474                 if (!skb)
475                         continue;
476
477                 pci_unmap_single(priv->pdev,
478                                  *((dma_addr_t *)skb->cb),
479                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
480                 kfree_skb(skb);
481         }
482
483         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
484                             priv->rx_ring, priv->rx_ring_dma);
485         priv->rx_ring = NULL;
486 }
487
488 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
489                                 unsigned int prio, unsigned int entries)
490 {
491         struct rtl8180_priv *priv = dev->priv;
492         struct rtl8180_tx_desc *ring;
493         dma_addr_t dma;
494         int i;
495
496         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
497         if (!ring || (unsigned long)ring & 0xFF) {
498                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
499                        wiphy_name(dev->wiphy), prio);
500                 return -ENOMEM;
501         }
502
503         memset(ring, 0, sizeof(*ring)*entries);
504         priv->tx_ring[prio].desc = ring;
505         priv->tx_ring[prio].dma = dma;
506         priv->tx_ring[prio].idx = 0;
507         priv->tx_ring[prio].entries = entries;
508         skb_queue_head_init(&priv->tx_ring[prio].queue);
509
510         for (i = 0; i < entries; i++)
511                 ring[i].next_tx_desc =
512                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
513
514         return 0;
515 }
516
517 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
518 {
519         struct rtl8180_priv *priv = dev->priv;
520         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
521
522         while (skb_queue_len(&ring->queue)) {
523                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
524                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
525
526                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
527                                  skb->len, PCI_DMA_TODEVICE);
528                 kfree(*((struct ieee80211_tx_control **) skb->cb));
529                 kfree_skb(skb);
530                 ring->idx = (ring->idx + 1) % ring->entries;
531         }
532
533         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
534                             ring->desc, ring->dma);
535         ring->desc = NULL;
536 }
537
538 static int rtl8180_start(struct ieee80211_hw *dev)
539 {
540         struct rtl8180_priv *priv = dev->priv;
541         int ret, i;
542         u32 reg;
543
544         ret = rtl8180_init_rx_ring(dev);
545         if (ret)
546                 return ret;
547
548         for (i = 0; i < 4; i++)
549                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
550                         goto err_free_rings;
551
552         ret = rtl8180_init_hw(dev);
553         if (ret)
554                 goto err_free_rings;
555
556         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
557         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
558         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
559         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
560         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
561
562         ret = request_irq(priv->pdev->irq, &rtl8180_interrupt,
563                           IRQF_SHARED, KBUILD_MODNAME, dev);
564         if (ret) {
565                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
566                        wiphy_name(dev->wiphy));
567                 goto err_free_rings;
568         }
569
570         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
571
572         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
573         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
574
575         reg = RTL818X_RX_CONF_ONLYERLPKT |
576               RTL818X_RX_CONF_RX_AUTORESETPHY |
577               RTL818X_RX_CONF_MGMT |
578               RTL818X_RX_CONF_DATA |
579               (7 << 8 /* MAX RX DMA */) |
580               RTL818X_RX_CONF_BROADCAST |
581               RTL818X_RX_CONF_NICMAC;
582
583         if (priv->r8185)
584                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
585         else {
586                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
587                         ? RTL818X_RX_CONF_CSDM1 : 0;
588                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
589                         ? RTL818X_RX_CONF_CSDM2 : 0;
590         }
591
592         priv->rx_conf = reg;
593         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
594
595         if (priv->r8185) {
596                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
597                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
598                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
599                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
600
601                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
602                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
603                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
604                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
605                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
606
607                 /* disable early TX */
608                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
609         }
610
611         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
612         reg |= (6 << 21 /* MAX TX DMA */) |
613                RTL818X_TX_CONF_NO_ICV;
614
615         if (priv->r8185)
616                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
617         else
618                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
619
620         /* different meaning, same value on both rtl8185 and rtl8180 */
621         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
622
623         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
624
625         reg = rtl818x_ioread8(priv, &priv->map->CMD);
626         reg |= RTL818X_CMD_RX_ENABLE;
627         reg |= RTL818X_CMD_TX_ENABLE;
628         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
629
630         priv->mode = IEEE80211_IF_TYPE_MNTR;
631         return 0;
632
633  err_free_rings:
634         rtl8180_free_rx_ring(dev);
635         for (i = 0; i < 4; i++)
636                 if (priv->tx_ring[i].desc)
637                         rtl8180_free_tx_ring(dev, i);
638
639         return ret;
640 }
641
642 static void rtl8180_stop(struct ieee80211_hw *dev)
643 {
644         struct rtl8180_priv *priv = dev->priv;
645         u8 reg;
646         int i;
647
648         priv->mode = IEEE80211_IF_TYPE_INVALID;
649
650         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
651
652         reg = rtl818x_ioread8(priv, &priv->map->CMD);
653         reg &= ~RTL818X_CMD_TX_ENABLE;
654         reg &= ~RTL818X_CMD_RX_ENABLE;
655         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
656
657         priv->rf->stop(dev);
658
659         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
660         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
661         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
662         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
663
664         free_irq(priv->pdev->irq, dev);
665
666         rtl8180_free_rx_ring(dev);
667         for (i = 0; i < 4; i++)
668                 rtl8180_free_tx_ring(dev, i);
669 }
670
671 static int rtl8180_add_interface(struct ieee80211_hw *dev,
672                                  struct ieee80211_if_init_conf *conf)
673 {
674         struct rtl8180_priv *priv = dev->priv;
675
676         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
677                 return -EOPNOTSUPP;
678
679         switch (conf->type) {
680         case IEEE80211_IF_TYPE_STA:
681                 priv->mode = conf->type;
682                 break;
683         default:
684                 return -EOPNOTSUPP;
685         }
686
687         priv->vif = conf->vif;
688
689         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
690         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
691                           cpu_to_le32(*(u32 *)conf->mac_addr));
692         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
693                           cpu_to_le16(*(u16 *)(conf->mac_addr + 4)));
694         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
695
696         return 0;
697 }
698
699 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
700                                      struct ieee80211_if_init_conf *conf)
701 {
702         struct rtl8180_priv *priv = dev->priv;
703         priv->mode = IEEE80211_IF_TYPE_MNTR;
704         priv->vif = NULL;
705 }
706
707 static int rtl8180_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
708 {
709         struct rtl8180_priv *priv = dev->priv;
710
711         priv->rf->set_chan(dev, conf);
712
713         return 0;
714 }
715
716 static int rtl8180_config_interface(struct ieee80211_hw *dev,
717                                     struct ieee80211_vif *vif,
718                                     struct ieee80211_if_conf *conf)
719 {
720         struct rtl8180_priv *priv = dev->priv;
721         int i;
722
723         for (i = 0; i < ETH_ALEN; i++)
724                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
725
726         if (is_valid_ether_addr(conf->bssid))
727                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
728         else
729                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
730
731         return 0;
732 }
733
734 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
735                                      unsigned int changed_flags,
736                                      unsigned int *total_flags,
737                                      int mc_count, struct dev_addr_list *mclist)
738 {
739         struct rtl8180_priv *priv = dev->priv;
740
741         if (changed_flags & FIF_FCSFAIL)
742                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
743         if (changed_flags & FIF_CONTROL)
744                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
745         if (changed_flags & FIF_OTHER_BSS)
746                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
747         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
748                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
749         else
750                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
751
752         *total_flags = 0;
753
754         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
755                 *total_flags |= FIF_FCSFAIL;
756         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
757                 *total_flags |= FIF_CONTROL;
758         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
759                 *total_flags |= FIF_OTHER_BSS;
760         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
761                 *total_flags |= FIF_ALLMULTI;
762
763         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
764 }
765
766 static const struct ieee80211_ops rtl8180_ops = {
767         .tx                     = rtl8180_tx,
768         .start                  = rtl8180_start,
769         .stop                   = rtl8180_stop,
770         .add_interface          = rtl8180_add_interface,
771         .remove_interface       = rtl8180_remove_interface,
772         .config                 = rtl8180_config,
773         .config_interface       = rtl8180_config_interface,
774         .configure_filter       = rtl8180_configure_filter,
775 };
776
777 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
778 {
779         struct ieee80211_hw *dev = eeprom->data;
780         struct rtl8180_priv *priv = dev->priv;
781         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
782
783         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
784         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
785         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
786         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
787 }
788
789 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
790 {
791         struct ieee80211_hw *dev = eeprom->data;
792         struct rtl8180_priv *priv = dev->priv;
793         u8 reg = 2 << 6;
794
795         if (eeprom->reg_data_in)
796                 reg |= RTL818X_EEPROM_CMD_WRITE;
797         if (eeprom->reg_data_out)
798                 reg |= RTL818X_EEPROM_CMD_READ;
799         if (eeprom->reg_data_clock)
800                 reg |= RTL818X_EEPROM_CMD_CK;
801         if (eeprom->reg_chip_select)
802                 reg |= RTL818X_EEPROM_CMD_CS;
803
804         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
805         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
806         udelay(10);
807 }
808
809 static int __devinit rtl8180_probe(struct pci_dev *pdev,
810                                    const struct pci_device_id *id)
811 {
812         struct ieee80211_hw *dev;
813         struct rtl8180_priv *priv;
814         unsigned long mem_addr, mem_len;
815         unsigned int io_addr, io_len;
816         int err, i;
817         struct eeprom_93cx6 eeprom;
818         const char *chip_name, *rf_name = NULL;
819         u32 reg;
820         u16 eeprom_val;
821         DECLARE_MAC_BUF(mac);
822
823         err = pci_enable_device(pdev);
824         if (err) {
825                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
826                        pci_name(pdev));
827                 return err;
828         }
829
830         err = pci_request_regions(pdev, KBUILD_MODNAME);
831         if (err) {
832                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
833                        pci_name(pdev));
834                 return err;
835         }
836
837         io_addr = pci_resource_start(pdev, 0);
838         io_len = pci_resource_len(pdev, 0);
839         mem_addr = pci_resource_start(pdev, 1);
840         mem_len = pci_resource_len(pdev, 1);
841
842         if (mem_len < sizeof(struct rtl818x_csr) ||
843             io_len < sizeof(struct rtl818x_csr)) {
844                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
845                        pci_name(pdev));
846                 err = -ENOMEM;
847                 goto err_free_reg;
848         }
849
850         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
851             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
852                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
853                        pci_name(pdev));
854                 goto err_free_reg;
855         }
856
857         pci_set_master(pdev);
858
859         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
860         if (!dev) {
861                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
862                        pci_name(pdev));
863                 err = -ENOMEM;
864                 goto err_free_reg;
865         }
866
867         priv = dev->priv;
868         priv->pdev = pdev;
869
870         SET_IEEE80211_DEV(dev, &pdev->dev);
871         pci_set_drvdata(pdev, dev);
872
873         priv->map = pci_iomap(pdev, 1, mem_len);
874         if (!priv->map)
875                 priv->map = pci_iomap(pdev, 0, io_len);
876
877         if (!priv->map) {
878                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
879                        pci_name(pdev));
880                 goto err_free_dev;
881         }
882
883         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
884         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
885
886         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
887         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
888
889         priv->band.band = IEEE80211_BAND_2GHZ;
890         priv->band.channels = priv->channels;
891         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
892         priv->band.bitrates = priv->rates;
893         priv->band.n_bitrates = 4;
894         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
895
896         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
897                      IEEE80211_HW_RX_INCLUDES_FCS;
898         dev->queues = 1;
899         dev->max_rssi = 65;
900
901         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
902         reg &= RTL818X_TX_CONF_HWVER_MASK;
903         switch (reg) {
904         case RTL818X_TX_CONF_R8180_ABCD:
905                 chip_name = "RTL8180";
906                 break;
907         case RTL818X_TX_CONF_R8180_F:
908                 chip_name = "RTL8180vF";
909                 break;
910         case RTL818X_TX_CONF_R8185_ABC:
911                 chip_name = "RTL8185";
912                 break;
913         case RTL818X_TX_CONF_R8185_D:
914                 chip_name = "RTL8185vD";
915                 break;
916         default:
917                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
918                        pci_name(pdev), reg >> 25);
919                 goto err_iounmap;
920         }
921
922         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
923         if (priv->r8185) {
924                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
925                 pci_try_set_mwi(pdev);
926         }
927
928         eeprom.data = dev;
929         eeprom.register_read = rtl8180_eeprom_register_read;
930         eeprom.register_write = rtl8180_eeprom_register_write;
931         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
932                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
933         else
934                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
935
936         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
937         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
938         udelay(10);
939
940         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
941         eeprom_val &= 0xFF;
942         switch (eeprom_val) {
943         case 1: rf_name = "Intersil";
944                 break;
945         case 2: rf_name = "RFMD";
946                 break;
947         case 3: priv->rf = &sa2400_rf_ops;
948                 break;
949         case 4: priv->rf = &max2820_rf_ops;
950                 break;
951         case 5: priv->rf = &grf5101_rf_ops;
952                 break;
953         case 9: priv->rf = rtl8180_detect_rf(dev);
954                 break;
955         case 10:
956                 rf_name = "RTL8255";
957                 break;
958         default:
959                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
960                        pci_name(pdev), eeprom_val);
961                 goto err_iounmap;
962         }
963
964         if (!priv->rf) {
965                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
966                        pci_name(pdev), rf_name);
967                 goto err_iounmap;
968         }
969
970         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
971         priv->csthreshold = eeprom_val >> 8;
972         if (!priv->r8185) {
973                 __le32 anaparam;
974                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
975                 priv->anaparam = le32_to_cpu(anaparam);
976                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
977         }
978
979         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
980         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
981                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
982                        " randomly generated MAC addr\n", pci_name(pdev));
983                 random_ether_addr(dev->wiphy->perm_addr);
984         }
985
986         /* CCK TX power */
987         for (i = 0; i < 14; i += 2) {
988                 u16 txpwr;
989                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
990                 priv->channels[i].hw_value = txpwr & 0xFF;
991                 priv->channels[i + 1].hw_value = txpwr >> 8;
992         }
993
994         /* OFDM TX power */
995         if (priv->r8185) {
996                 for (i = 0; i < 14; i += 2) {
997                         u16 txpwr;
998                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
999                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
1000                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
1001                 }
1002         }
1003
1004         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1005
1006         spin_lock_init(&priv->lock);
1007
1008         err = ieee80211_register_hw(dev);
1009         if (err) {
1010                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1011                        pci_name(pdev));
1012                 goto err_iounmap;
1013         }
1014
1015         printk(KERN_INFO "%s: hwaddr %s, %s + %s\n",
1016                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1017                chip_name, priv->rf->name);
1018
1019         return 0;
1020
1021  err_iounmap:
1022         iounmap(priv->map);
1023
1024  err_free_dev:
1025         pci_set_drvdata(pdev, NULL);
1026         ieee80211_free_hw(dev);
1027
1028  err_free_reg:
1029         pci_release_regions(pdev);
1030         pci_disable_device(pdev);
1031         return err;
1032 }
1033
1034 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1035 {
1036         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1037         struct rtl8180_priv *priv;
1038
1039         if (!dev)
1040                 return;
1041
1042         ieee80211_unregister_hw(dev);
1043
1044         priv = dev->priv;
1045
1046         pci_iounmap(pdev, priv->map);
1047         pci_release_regions(pdev);
1048         pci_disable_device(pdev);
1049         ieee80211_free_hw(dev);
1050 }
1051
1052 #ifdef CONFIG_PM
1053 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1054 {
1055         pci_save_state(pdev);
1056         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1057         return 0;
1058 }
1059
1060 static int rtl8180_resume(struct pci_dev *pdev)
1061 {
1062         pci_set_power_state(pdev, PCI_D0);
1063         pci_restore_state(pdev);
1064         return 0;
1065 }
1066
1067 #endif /* CONFIG_PM */
1068
1069 static struct pci_driver rtl8180_driver = {
1070         .name           = KBUILD_MODNAME,
1071         .id_table       = rtl8180_table,
1072         .probe          = rtl8180_probe,
1073         .remove         = __devexit_p(rtl8180_remove),
1074 #ifdef CONFIG_PM
1075         .suspend        = rtl8180_suspend,
1076         .resume         = rtl8180_resume,
1077 #endif /* CONFIG_PM */
1078 };
1079
1080 static int __init rtl8180_init(void)
1081 {
1082         return pci_register_driver(&rtl8180_driver);
1083 }
1084
1085 static void __exit rtl8180_exit(void)
1086 {
1087         pci_unregister_driver(&rtl8180_driver);
1088 }
1089
1090 module_init(rtl8180_init);
1091 module_exit(rtl8180_exit);