1 /* linux/include/asm-arm/arch-s3c2410/debug-macro.S
3 * Debugging macro include header
5 * Copyright (C) 1994-1999 Russell King
6 * Copyright (C) 2005 Simtec Electronics
8 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
18 #include <asm/arch/map.h>
19 #include <asm/arch/regs-serial.h>
20 #include <asm/arch/regs-gpio.h>
22 #define S3C2410_UART1_OFF (0x4000)
23 #define SHIFT_2440TXF (14-9)
26 mrc p15, 0, \rx, c1, c0
28 ldreq \rx, = S3C24XX_PA_UART
29 ldrne \rx, = S3C24XX_VA_UART
30 #if CONFIG_DEBUG_S3C2410_UART != 0
31 add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)
36 str \rd, [\rx, # S3C2410_UTXH ]
39 .macro busyuart, rd, rx
40 ldr \rd, [ \rx, # S3C2410_UFCON ]
41 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
45 mrc p15, 0, \rd, c1, c0
47 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
48 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
49 bic \rd, \rd, #0xff000
50 ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
51 and \rd, \rd, #0x00ff0000
52 teq \rd, #0x00440000 @ is it 2440?
54 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
55 moveq \rd, \rd, lsr #SHIFT_2440TXF
56 tst \rd, #S3C2410_UFSTAT_TXFULL
61 @ busy waiting for non fifo
62 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
63 tst \rd, #S3C2410_UTRSTAT_TXFE
71 ldr \rd, [ \rx, # S3C2410_UFCON ]
72 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
76 mrc p15, 0, \rd, c1, c0
78 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
79 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
80 bic \rd, \rd, #0xff000
81 ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
82 and \rd, \rd, #0x00ff0000
83 teq \rd, #0x00440000 @ is it 2440?
85 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
86 andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
87 andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
93 @ idle waiting for non fifo
94 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
95 tst \rd, #S3C2410_UTRSTAT_TXFE