2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
9 Shamelessly ripped from the w83627hf driver
10 Copyright (C) 2003 Mark Studebaker
12 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
13 in testing and debugging this driver.
15 This driver also supports the W83627EHG, which is the lead-free
16 version of the W83627EHF.
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 Supports the following chips:
35 Chip #vin #fan #pwm #temp chip IDs man ID
36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/platform_device.h>
46 #include <linux/hwmon.h>
47 #include <linux/hwmon-sysfs.h>
48 #include <linux/hwmon-vid.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
54 enum kinds { w83627ehf, w83627dhg };
56 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
57 static const char * w83627ehf_device_names[] = {
62 #define DRVNAME "w83627ehf"
65 * Super-I/O constants and functions
68 #define W83627EHF_LD_HWM 0x0b
70 #define SIO_REG_LDSEL 0x07 /* Logical device select */
71 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
72 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
73 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
74 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
75 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
76 #define SIO_REG_VID_DATA 0xF1 /* VID data */
78 #define SIO_W83627EHF_ID 0x8850
79 #define SIO_W83627EHG_ID 0x8860
80 #define SIO_W83627DHG_ID 0xa020
81 #define SIO_ID_MASK 0xFFF0
84 superio_outb(int ioreg, int reg, int val)
91 superio_inb(int ioreg, int reg)
94 return inb(ioreg + 1);
98 superio_select(int ioreg, int ld)
100 outb(SIO_REG_LDSEL, ioreg);
105 superio_enter(int ioreg)
112 superio_exit(int ioreg)
115 outb(0x02, ioreg + 1);
122 #define IOREGION_ALIGNMENT ~7
123 #define IOREGION_OFFSET 5
124 #define IOREGION_LENGTH 2
125 #define ADDR_REG_OFFSET 0
126 #define DATA_REG_OFFSET 1
128 #define W83627EHF_REG_BANK 0x4E
129 #define W83627EHF_REG_CONFIG 0x40
131 /* Not currently used:
132 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
133 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
134 * REG_MAN_ID is at port 0x4f
135 * REG_CHIP_ID is at port 0x58 */
137 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
138 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
140 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
141 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
142 (0x554 + (((nr) - 7) * 2)))
143 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
144 (0x555 + (((nr) - 7) * 2)))
145 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
148 #define W83627EHF_REG_TEMP1 0x27
149 #define W83627EHF_REG_TEMP1_HYST 0x3a
150 #define W83627EHF_REG_TEMP1_OVER 0x39
151 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
152 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
153 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
154 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
156 /* Fan clock dividers are spread over the following five registers */
157 #define W83627EHF_REG_FANDIV1 0x47
158 #define W83627EHF_REG_FANDIV2 0x4B
159 #define W83627EHF_REG_VBAT 0x5D
160 #define W83627EHF_REG_DIODE 0x59
161 #define W83627EHF_REG_SMI_OVT 0x4C
163 #define W83627EHF_REG_ALARM1 0x459
164 #define W83627EHF_REG_ALARM2 0x45A
165 #define W83627EHF_REG_ALARM3 0x45B
167 /* SmartFan registers */
168 /* DC or PWM output fan configuration */
169 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
170 0x04, /* SYS FAN0 output mode and PWM mode */
171 0x04, /* CPU FAN0 output mode and PWM mode */
172 0x12, /* AUX FAN mode */
173 0x62, /* CPU fan1 mode */
176 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
177 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
179 /* FAN Duty Cycle, be used to control */
180 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
181 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
182 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
185 /* Advanced Fan control, some values are common for all fans */
186 static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
187 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
193 /* 1 is PWM mode, output in ms */
194 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
196 return mode ? 100 * reg : 400 * reg;
199 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
201 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
202 (msec + 200) / 400), 1, 255);
205 static inline unsigned int
206 fan_from_reg(u8 reg, unsigned int div)
208 if (reg == 0 || reg == 255)
210 return 1350000U / (reg * div);
213 static inline unsigned int
220 temp1_from_reg(s8 reg)
226 temp1_to_reg(long temp, int min, int max)
233 return (temp - 500) / 1000;
234 return (temp + 500) / 1000;
237 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
239 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
241 static inline long in_from_reg(u8 reg, u8 nr)
243 return reg * scale_in[nr];
246 static inline u8 in_to_reg(u32 val, u8 nr)
248 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
252 * Data structures and manipulation thereof
255 struct w83627ehf_data {
256 int addr; /* IO base of hw monitor block */
259 struct device *hwmon_dev;
262 struct mutex update_lock;
263 char valid; /* !=0 if following fields are valid */
264 unsigned long last_updated; /* In jiffies */
266 /* Register values */
267 u8 in_num; /* number of in inputs we have */
268 u8 in[10]; /* Register value */
269 u8 in_max[10]; /* Register value */
270 u8 in_min[10]; /* Register value */
274 u8 has_fan; /* some fan inputs can be disabled */
281 s16 temp_max_hyst[2];
284 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
285 u8 pwm_enable[4]; /* 1->manual
286 2->thermal cruise (also called SmartFan I) */
291 u8 fan_min_output[4]; /* minimum fan speed */
298 struct w83627ehf_sio_data {
303 static inline int is_word_sized(u16 reg)
305 return (((reg & 0xff00) == 0x100
306 || (reg & 0xff00) == 0x200)
307 && ((reg & 0x00ff) == 0x50
308 || (reg & 0x00ff) == 0x53
309 || (reg & 0x00ff) == 0x55));
312 /* Registers 0x50-0x5f are banked */
313 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
315 if ((reg & 0x00f0) == 0x50) {
316 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
317 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
321 /* Not strictly necessary, but play it safe for now */
322 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
325 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
326 outb_p(0, data->addr + DATA_REG_OFFSET);
330 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
332 int res, word_sized = is_word_sized(reg);
334 mutex_lock(&data->lock);
336 w83627ehf_set_bank(data, reg);
337 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
338 res = inb_p(data->addr + DATA_REG_OFFSET);
340 outb_p((reg & 0xff) + 1,
341 data->addr + ADDR_REG_OFFSET);
342 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
344 w83627ehf_reset_bank(data, reg);
346 mutex_unlock(&data->lock);
351 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
353 int word_sized = is_word_sized(reg);
355 mutex_lock(&data->lock);
357 w83627ehf_set_bank(data, reg);
358 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
360 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
361 outb_p((reg & 0xff) + 1,
362 data->addr + ADDR_REG_OFFSET);
364 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
365 w83627ehf_reset_bank(data, reg);
367 mutex_unlock(&data->lock);
371 /* This function assumes that the caller holds data->update_lock */
372 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
378 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
379 | ((data->fan_div[0] & 0x03) << 4);
380 /* fan5 input control bit is write only, compute the value */
381 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
382 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
383 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
384 | ((data->fan_div[0] & 0x04) << 3);
385 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
388 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
389 | ((data->fan_div[1] & 0x03) << 6);
390 /* fan5 input control bit is write only, compute the value */
391 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
392 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
393 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
394 | ((data->fan_div[1] & 0x04) << 4);
395 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
398 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
399 | ((data->fan_div[2] & 0x03) << 6);
400 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
401 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
402 | ((data->fan_div[2] & 0x04) << 5);
403 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
406 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
407 | (data->fan_div[3] & 0x03);
408 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
409 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
410 | ((data->fan_div[3] & 0x04) << 5);
411 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
414 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
415 | ((data->fan_div[4] & 0x03) << 2)
416 | ((data->fan_div[4] & 0x04) << 5);
417 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
422 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
426 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
427 data->fan_div[0] = (i >> 4) & 0x03;
428 data->fan_div[1] = (i >> 6) & 0x03;
429 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
430 data->fan_div[2] = (i >> 6) & 0x03;
431 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
432 data->fan_div[0] |= (i >> 3) & 0x04;
433 data->fan_div[1] |= (i >> 4) & 0x04;
434 data->fan_div[2] |= (i >> 5) & 0x04;
435 if (data->has_fan & ((1 << 3) | (1 << 4))) {
436 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
437 data->fan_div[3] = i & 0x03;
438 data->fan_div[4] = ((i >> 2) & 0x03)
441 if (data->has_fan & (1 << 3)) {
442 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
443 data->fan_div[3] |= (i >> 5) & 0x04;
447 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
449 struct w83627ehf_data *data = dev_get_drvdata(dev);
450 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
453 mutex_lock(&data->update_lock);
455 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
457 /* Fan clock dividers */
458 w83627ehf_update_fan_div(data);
460 /* Measured voltages and limits */
461 for (i = 0; i < data->in_num; i++) {
462 data->in[i] = w83627ehf_read_value(data,
463 W83627EHF_REG_IN(i));
464 data->in_min[i] = w83627ehf_read_value(data,
465 W83627EHF_REG_IN_MIN(i));
466 data->in_max[i] = w83627ehf_read_value(data,
467 W83627EHF_REG_IN_MAX(i));
470 /* Measured fan speeds and limits */
471 for (i = 0; i < 5; i++) {
472 if (!(data->has_fan & (1 << i)))
475 data->fan[i] = w83627ehf_read_value(data,
476 W83627EHF_REG_FAN[i]);
477 data->fan_min[i] = w83627ehf_read_value(data,
478 W83627EHF_REG_FAN_MIN[i]);
480 /* If we failed to measure the fan speed and clock
481 divider can be increased, let's try that for next
483 if (data->fan[i] == 0xff
484 && data->fan_div[i] < 0x07) {
485 dev_dbg(dev, "Increasing fan%d "
486 "clock divider from %u to %u\n",
487 i + 1, div_from_reg(data->fan_div[i]),
488 div_from_reg(data->fan_div[i] + 1));
490 w83627ehf_write_fan_div(data, i);
491 /* Preserve min limit if possible */
492 if (data->fan_min[i] >= 2
493 && data->fan_min[i] != 255)
494 w83627ehf_write_value(data,
495 W83627EHF_REG_FAN_MIN[i],
496 (data->fan_min[i] /= 2));
500 for (i = 0; i < 4; i++) {
501 /* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
503 pwmcfg = w83627ehf_read_value(data,
504 W83627EHF_REG_PWM_ENABLE[i]);
505 tolerance = w83627ehf_read_value(data,
506 W83627EHF_REG_TOLERANCE[i]);
509 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
511 data->pwm_enable[i] =
512 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
514 data->pwm[i] = w83627ehf_read_value(data,
515 W83627EHF_REG_PWM[i]);
516 data->fan_min_output[i] = w83627ehf_read_value(data,
517 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
518 data->fan_stop_time[i] = w83627ehf_read_value(data,
519 W83627EHF_REG_FAN_STOP_TIME[i]);
520 data->target_temp[i] =
521 w83627ehf_read_value(data,
522 W83627EHF_REG_TARGET[i]) &
523 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
524 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
528 /* Measured temperatures and limits */
529 data->temp1 = w83627ehf_read_value(data,
530 W83627EHF_REG_TEMP1);
531 data->temp1_max = w83627ehf_read_value(data,
532 W83627EHF_REG_TEMP1_OVER);
533 data->temp1_max_hyst = w83627ehf_read_value(data,
534 W83627EHF_REG_TEMP1_HYST);
535 for (i = 0; i < 2; i++) {
536 data->temp[i] = w83627ehf_read_value(data,
537 W83627EHF_REG_TEMP[i]);
538 data->temp_max[i] = w83627ehf_read_value(data,
539 W83627EHF_REG_TEMP_OVER[i]);
540 data->temp_max_hyst[i] = w83627ehf_read_value(data,
541 W83627EHF_REG_TEMP_HYST[i]);
544 data->alarms = w83627ehf_read_value(data,
545 W83627EHF_REG_ALARM1) |
546 (w83627ehf_read_value(data,
547 W83627EHF_REG_ALARM2) << 8) |
548 (w83627ehf_read_value(data,
549 W83627EHF_REG_ALARM3) << 16);
551 data->last_updated = jiffies;
555 mutex_unlock(&data->update_lock);
560 * Sysfs callback functions
562 #define show_in_reg(reg) \
564 show_##reg(struct device *dev, struct device_attribute *attr, \
567 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
568 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
569 int nr = sensor_attr->index; \
570 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
576 #define store_in_reg(REG, reg) \
578 store_in_##reg (struct device *dev, struct device_attribute *attr, \
579 const char *buf, size_t count) \
581 struct w83627ehf_data *data = dev_get_drvdata(dev); \
582 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
583 int nr = sensor_attr->index; \
584 u32 val = simple_strtoul(buf, NULL, 10); \
586 mutex_lock(&data->update_lock); \
587 data->in_##reg[nr] = in_to_reg(val, nr); \
588 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
589 data->in_##reg[nr]); \
590 mutex_unlock(&data->update_lock); \
594 store_in_reg(MIN, min)
595 store_in_reg(MAX, max)
597 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
599 struct w83627ehf_data *data = w83627ehf_update_device(dev);
600 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
601 int nr = sensor_attr->index;
602 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
605 static struct sensor_device_attribute sda_in_input[] = {
606 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
607 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
608 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
609 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
610 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
611 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
612 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
613 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
614 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
615 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
618 static struct sensor_device_attribute sda_in_alarm[] = {
619 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
620 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
621 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
622 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
623 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
624 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
625 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
626 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
627 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
628 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
631 static struct sensor_device_attribute sda_in_min[] = {
632 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
633 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
634 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
635 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
636 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
637 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
638 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
639 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
640 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
641 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
644 static struct sensor_device_attribute sda_in_max[] = {
645 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
646 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
647 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
648 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
649 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
650 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
651 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
652 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
653 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
654 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
657 #define show_fan_reg(reg) \
659 show_##reg(struct device *dev, struct device_attribute *attr, \
662 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
663 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
664 int nr = sensor_attr->index; \
665 return sprintf(buf, "%d\n", \
666 fan_from_reg(data->reg[nr], \
667 div_from_reg(data->fan_div[nr]))); \
670 show_fan_reg(fan_min);
673 show_fan_div(struct device *dev, struct device_attribute *attr,
676 struct w83627ehf_data *data = w83627ehf_update_device(dev);
677 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
678 int nr = sensor_attr->index;
679 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
683 store_fan_min(struct device *dev, struct device_attribute *attr,
684 const char *buf, size_t count)
686 struct w83627ehf_data *data = dev_get_drvdata(dev);
687 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
688 int nr = sensor_attr->index;
689 unsigned int val = simple_strtoul(buf, NULL, 10);
693 mutex_lock(&data->update_lock);
695 /* No min limit, alarm disabled */
696 data->fan_min[nr] = 255;
697 new_div = data->fan_div[nr]; /* No change */
698 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
699 } else if ((reg = 1350000U / val) >= 128 * 255) {
700 /* Speed below this value cannot possibly be represented,
701 even with the highest divider (128) */
702 data->fan_min[nr] = 254;
703 new_div = 7; /* 128 == (1 << 7) */
704 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
705 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
707 /* Speed above this value cannot possibly be represented,
708 even with the lowest divider (1) */
709 data->fan_min[nr] = 1;
710 new_div = 0; /* 1 == (1 << 0) */
711 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
712 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
714 /* Automatically pick the best divider, i.e. the one such
715 that the min limit will correspond to a register value
716 in the 96..192 range */
718 while (reg > 192 && new_div < 7) {
722 data->fan_min[nr] = reg;
725 /* Write both the fan clock divider (if it changed) and the new
726 fan min (unconditionally) */
727 if (new_div != data->fan_div[nr]) {
728 /* Preserve the fan speed reading */
729 if (data->fan[nr] != 0xff) {
730 if (new_div > data->fan_div[nr])
731 data->fan[nr] >>= new_div - data->fan_div[nr];
732 else if (data->fan[nr] & 0x80)
733 data->fan[nr] = 0xff;
735 data->fan[nr] <<= data->fan_div[nr] - new_div;
738 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
739 nr + 1, div_from_reg(data->fan_div[nr]),
740 div_from_reg(new_div));
741 data->fan_div[nr] = new_div;
742 w83627ehf_write_fan_div(data, nr);
743 /* Give the chip time to sample a new speed value */
744 data->last_updated = jiffies;
746 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
748 mutex_unlock(&data->update_lock);
753 static struct sensor_device_attribute sda_fan_input[] = {
754 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
755 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
756 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
757 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
758 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
761 static struct sensor_device_attribute sda_fan_alarm[] = {
762 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
763 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
764 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
765 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
766 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
769 static struct sensor_device_attribute sda_fan_min[] = {
770 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
772 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
774 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
776 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
778 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
782 static struct sensor_device_attribute sda_fan_div[] = {
783 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
784 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
785 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
786 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
787 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
790 #define show_temp1_reg(reg) \
792 show_##reg(struct device *dev, struct device_attribute *attr, \
795 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
796 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
798 show_temp1_reg(temp1);
799 show_temp1_reg(temp1_max);
800 show_temp1_reg(temp1_max_hyst);
802 #define store_temp1_reg(REG, reg) \
804 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
805 const char *buf, size_t count) \
807 struct w83627ehf_data *data = dev_get_drvdata(dev); \
808 long val = simple_strtol(buf, NULL, 10); \
810 mutex_lock(&data->update_lock); \
811 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
812 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
813 data->temp1_##reg); \
814 mutex_unlock(&data->update_lock); \
817 store_temp1_reg(OVER, max);
818 store_temp1_reg(HYST, max_hyst);
820 #define show_temp_reg(reg) \
822 show_##reg(struct device *dev, struct device_attribute *attr, \
825 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
826 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
827 int nr = sensor_attr->index; \
828 return sprintf(buf, "%d\n", \
829 LM75_TEMP_FROM_REG(data->reg[nr])); \
832 show_temp_reg(temp_max);
833 show_temp_reg(temp_max_hyst);
835 #define store_temp_reg(REG, reg) \
837 store_##reg(struct device *dev, struct device_attribute *attr, \
838 const char *buf, size_t count) \
840 struct w83627ehf_data *data = dev_get_drvdata(dev); \
841 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
842 int nr = sensor_attr->index; \
843 long val = simple_strtol(buf, NULL, 10); \
845 mutex_lock(&data->update_lock); \
846 data->reg[nr] = LM75_TEMP_TO_REG(val); \
847 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
849 mutex_unlock(&data->update_lock); \
852 store_temp_reg(OVER, temp_max);
853 store_temp_reg(HYST, temp_max_hyst);
856 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
858 struct w83627ehf_data *data = w83627ehf_update_device(dev);
859 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
860 int nr = sensor_attr->index;
861 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
864 static struct sensor_device_attribute sda_temp[] = {
865 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
866 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
867 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
868 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
870 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
872 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
874 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
875 store_temp1_max_hyst, 0),
876 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
877 store_temp_max_hyst, 0),
878 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
879 store_temp_max_hyst, 1),
880 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
881 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
882 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
883 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
884 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
885 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
888 #define show_pwm_reg(reg) \
889 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
892 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
893 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
894 int nr = sensor_attr->index; \
895 return sprintf(buf, "%d\n", data->reg[nr]); \
898 show_pwm_reg(pwm_mode)
899 show_pwm_reg(pwm_enable)
903 store_pwm_mode(struct device *dev, struct device_attribute *attr,
904 const char *buf, size_t count)
906 struct w83627ehf_data *data = dev_get_drvdata(dev);
907 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
908 int nr = sensor_attr->index;
909 u32 val = simple_strtoul(buf, NULL, 10);
914 mutex_lock(&data->update_lock);
915 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
916 data->pwm_mode[nr] = val;
917 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
919 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
920 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
921 mutex_unlock(&data->update_lock);
926 store_pwm(struct device *dev, struct device_attribute *attr,
927 const char *buf, size_t count)
929 struct w83627ehf_data *data = dev_get_drvdata(dev);
930 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
931 int nr = sensor_attr->index;
932 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
934 mutex_lock(&data->update_lock);
936 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
937 mutex_unlock(&data->update_lock);
942 store_pwm_enable(struct device *dev, struct device_attribute *attr,
943 const char *buf, size_t count)
945 struct w83627ehf_data *data = dev_get_drvdata(dev);
946 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
947 int nr = sensor_attr->index;
948 u32 val = simple_strtoul(buf, NULL, 10);
951 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
953 mutex_lock(&data->update_lock);
954 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
955 data->pwm_enable[nr] = val;
956 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
957 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
958 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
959 mutex_unlock(&data->update_lock);
964 #define show_tol_temp(reg) \
965 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
968 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
969 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
970 int nr = sensor_attr->index; \
971 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
974 show_tol_temp(tolerance)
975 show_tol_temp(target_temp)
978 store_target_temp(struct device *dev, struct device_attribute *attr,
979 const char *buf, size_t count)
981 struct w83627ehf_data *data = dev_get_drvdata(dev);
982 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
983 int nr = sensor_attr->index;
984 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
986 mutex_lock(&data->update_lock);
987 data->target_temp[nr] = val;
988 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
989 mutex_unlock(&data->update_lock);
994 store_tolerance(struct device *dev, struct device_attribute *attr,
995 const char *buf, size_t count)
997 struct w83627ehf_data *data = dev_get_drvdata(dev);
998 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
999 int nr = sensor_attr->index;
1001 /* Limit the temp to 0C - 15C */
1002 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
1004 mutex_lock(&data->update_lock);
1005 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1006 data->tolerance[nr] = val;
1008 reg = (reg & 0x0f) | (val << 4);
1010 reg = (reg & 0xf0) | val;
1011 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1012 mutex_unlock(&data->update_lock);
1016 static struct sensor_device_attribute sda_pwm[] = {
1017 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1018 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1019 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1020 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1023 static struct sensor_device_attribute sda_pwm_mode[] = {
1024 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1026 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1028 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1030 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1034 static struct sensor_device_attribute sda_pwm_enable[] = {
1035 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1036 store_pwm_enable, 0),
1037 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1038 store_pwm_enable, 1),
1039 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1040 store_pwm_enable, 2),
1041 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1042 store_pwm_enable, 3),
1045 static struct sensor_device_attribute sda_target_temp[] = {
1046 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1047 store_target_temp, 0),
1048 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1049 store_target_temp, 1),
1050 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1051 store_target_temp, 2),
1052 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1053 store_target_temp, 3),
1056 static struct sensor_device_attribute sda_tolerance[] = {
1057 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1058 store_tolerance, 0),
1059 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1060 store_tolerance, 1),
1061 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1062 store_tolerance, 2),
1063 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1064 store_tolerance, 3),
1067 /* Smart Fan registers */
1069 #define fan_functions(reg, REG) \
1070 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1073 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1074 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1075 int nr = sensor_attr->index; \
1076 return sprintf(buf, "%d\n", data->reg[nr]); \
1079 store_##reg(struct device *dev, struct device_attribute *attr, \
1080 const char *buf, size_t count) \
1082 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1083 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1084 int nr = sensor_attr->index; \
1085 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1086 mutex_lock(&data->update_lock); \
1087 data->reg[nr] = val; \
1088 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1089 mutex_unlock(&data->update_lock); \
1093 fan_functions(fan_min_output, FAN_MIN_OUTPUT)
1095 #define fan_time_functions(reg, REG) \
1096 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1099 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1100 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1101 int nr = sensor_attr->index; \
1102 return sprintf(buf, "%d\n", \
1103 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1107 store_##reg(struct device *dev, struct device_attribute *attr, \
1108 const char *buf, size_t count) \
1110 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1111 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1112 int nr = sensor_attr->index; \
1113 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1114 data->pwm_mode[nr]); \
1115 mutex_lock(&data->update_lock); \
1116 data->reg[nr] = val; \
1117 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1118 mutex_unlock(&data->update_lock); \
1122 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1124 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1127 struct w83627ehf_data *data = dev_get_drvdata(dev);
1129 return sprintf(buf, "%s\n", data->name);
1131 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1133 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1134 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1135 store_fan_stop_time, 3),
1136 SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1137 store_fan_min_output, 3),
1140 static struct sensor_device_attribute sda_sf3_arrays[] = {
1141 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1142 store_fan_stop_time, 0),
1143 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1144 store_fan_stop_time, 1),
1145 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1146 store_fan_stop_time, 2),
1147 SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1148 store_fan_min_output, 0),
1149 SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1150 store_fan_min_output, 1),
1151 SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1152 store_fan_min_output, 2),
1156 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1158 struct w83627ehf_data *data = dev_get_drvdata(dev);
1159 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1161 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1164 * Driver and device management
1167 static void w83627ehf_device_remove_files(struct device *dev)
1169 /* some entries in the following arrays may not have been used in
1170 * device_create_file(), but device_remove_file() will ignore them */
1172 struct w83627ehf_data *data = dev_get_drvdata(dev);
1174 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1175 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1176 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1177 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1178 for (i = 0; i < data->in_num; i++) {
1179 device_remove_file(dev, &sda_in_input[i].dev_attr);
1180 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1181 device_remove_file(dev, &sda_in_min[i].dev_attr);
1182 device_remove_file(dev, &sda_in_max[i].dev_attr);
1184 for (i = 0; i < 5; i++) {
1185 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1186 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1187 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1188 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1190 for (i = 0; i < 4; i++) {
1191 device_remove_file(dev, &sda_pwm[i].dev_attr);
1192 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1193 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1194 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1195 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1197 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1198 device_remove_file(dev, &sda_temp[i].dev_attr);
1200 device_remove_file(dev, &dev_attr_name);
1201 if (data->vid != 0x3f)
1202 device_remove_file(dev, &dev_attr_cpu0_vid);
1205 /* Get the monitoring functions started */
1206 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1211 /* Start monitoring is needed */
1212 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1214 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1217 /* Enable temp2 and temp3 if needed */
1218 for (i = 0; i < 2; i++) {
1219 tmp = w83627ehf_read_value(data,
1220 W83627EHF_REG_TEMP_CONFIG[i]);
1222 w83627ehf_write_value(data,
1223 W83627EHF_REG_TEMP_CONFIG[i],
1227 /* Enable VBAT monitoring if needed */
1228 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1230 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1232 /* Get thermal sensor types */
1233 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1234 for (i = 0; i < 3; i++) {
1235 if ((tmp & (0x02 << i)))
1236 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1238 data->temp_type[i] = 4; /* thermistor */
1242 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1244 struct device *dev = &pdev->dev;
1245 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1246 struct w83627ehf_data *data;
1247 struct resource *res;
1248 u8 fan4pin, fan5pin, en_vrm10;
1251 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1252 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1254 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1255 (unsigned long)res->start,
1256 (unsigned long)res->start + IOREGION_LENGTH - 1);
1260 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1265 data->addr = res->start;
1266 mutex_init(&data->lock);
1267 mutex_init(&data->update_lock);
1268 data->name = w83627ehf_device_names[sio_data->kind];
1269 platform_set_drvdata(pdev, data);
1271 /* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
1272 data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1274 /* Initialize the chip */
1275 w83627ehf_init_device(data);
1277 data->vrm = vid_which_vrm();
1278 superio_enter(sio_data->sioreg);
1279 /* Read VID value */
1280 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1281 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
1282 /* Set VID input sensibility if needed. In theory the BIOS
1283 should have set it, but in practice it's not always the
1284 case. We only do it for the W83627EHF/EHG because the
1285 W83627DHG is more complex in this respect. */
1286 if (sio_data->kind == w83627ehf) {
1287 en_vrm10 = superio_inb(sio_data->sioreg,
1289 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1290 dev_warn(dev, "Setting VID input voltage to "
1292 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1294 } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
1295 dev_warn(dev, "Setting VID input voltage to "
1297 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1302 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;
1304 dev_info(dev, "VID pins in output mode, CPU VID not "
1309 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1311 fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
1312 fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
1313 superio_exit(sio_data->sioreg);
1315 /* It looks like fan4 and fan5 pins can be alternatively used
1316 as fan on/off switches, but fan5 control is write only :/
1317 We assume that if the serial interface is disabled, designers
1318 connected fan5 as input unless they are emitting log 1, which
1319 is not the default. */
1321 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1322 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1323 if ((i & (1 << 2)) && (!fan4pin))
1324 data->has_fan |= (1 << 3);
1325 if (!(i & (1 << 1)) && (!fan5pin))
1326 data->has_fan |= (1 << 4);
1328 /* Read fan clock dividers immediately */
1329 w83627ehf_update_fan_div(data);
1331 /* Register sysfs hooks */
1332 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1333 if ((err = device_create_file(dev,
1334 &sda_sf3_arrays[i].dev_attr)))
1337 /* if fan4 is enabled create the sf3 files for it */
1338 if (data->has_fan & (1 << 3))
1339 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1340 if ((err = device_create_file(dev,
1341 &sda_sf3_arrays_fan4[i].dev_attr)))
1345 for (i = 0; i < data->in_num; i++)
1346 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1347 || (err = device_create_file(dev,
1348 &sda_in_alarm[i].dev_attr))
1349 || (err = device_create_file(dev,
1350 &sda_in_min[i].dev_attr))
1351 || (err = device_create_file(dev,
1352 &sda_in_max[i].dev_attr)))
1355 for (i = 0; i < 5; i++) {
1356 if (data->has_fan & (1 << i)) {
1357 if ((err = device_create_file(dev,
1358 &sda_fan_input[i].dev_attr))
1359 || (err = device_create_file(dev,
1360 &sda_fan_alarm[i].dev_attr))
1361 || (err = device_create_file(dev,
1362 &sda_fan_div[i].dev_attr))
1363 || (err = device_create_file(dev,
1364 &sda_fan_min[i].dev_attr)))
1366 if (i < 4 && /* w83627ehf only has 4 pwm */
1367 ((err = device_create_file(dev,
1368 &sda_pwm[i].dev_attr))
1369 || (err = device_create_file(dev,
1370 &sda_pwm_mode[i].dev_attr))
1371 || (err = device_create_file(dev,
1372 &sda_pwm_enable[i].dev_attr))
1373 || (err = device_create_file(dev,
1374 &sda_target_temp[i].dev_attr))
1375 || (err = device_create_file(dev,
1376 &sda_tolerance[i].dev_attr))))
1381 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1382 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1385 err = device_create_file(dev, &dev_attr_name);
1389 if (data->vid != 0x3f) {
1390 err = device_create_file(dev, &dev_attr_cpu0_vid);
1395 data->hwmon_dev = hwmon_device_register(dev);
1396 if (IS_ERR(data->hwmon_dev)) {
1397 err = PTR_ERR(data->hwmon_dev);
1404 w83627ehf_device_remove_files(dev);
1406 platform_set_drvdata(pdev, NULL);
1408 release_region(res->start, IOREGION_LENGTH);
1413 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1415 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1417 hwmon_device_unregister(data->hwmon_dev);
1418 w83627ehf_device_remove_files(&pdev->dev);
1419 release_region(data->addr, IOREGION_LENGTH);
1420 platform_set_drvdata(pdev, NULL);
1426 static struct platform_driver w83627ehf_driver = {
1428 .owner = THIS_MODULE,
1431 .probe = w83627ehf_probe,
1432 .remove = __devexit_p(w83627ehf_remove),
1435 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1436 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1437 struct w83627ehf_sio_data *sio_data)
1439 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1440 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1441 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1444 const char *sio_name;
1446 superio_enter(sioaddr);
1448 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1449 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1450 switch (val & SIO_ID_MASK) {
1451 case SIO_W83627EHF_ID:
1452 sio_data->kind = w83627ehf;
1453 sio_name = sio_name_W83627EHF;
1455 case SIO_W83627EHG_ID:
1456 sio_data->kind = w83627ehf;
1457 sio_name = sio_name_W83627EHG;
1459 case SIO_W83627DHG_ID:
1460 sio_data->kind = w83627dhg;
1461 sio_name = sio_name_W83627DHG;
1465 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1467 superio_exit(sioaddr);
1471 /* We have a known chip, find the HWM I/O address */
1472 superio_select(sioaddr, W83627EHF_LD_HWM);
1473 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1474 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1475 *addr = val & IOREGION_ALIGNMENT;
1477 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1478 "device with a base I/O port 0.\n");
1479 superio_exit(sioaddr);
1483 /* Activate logical device if needed */
1484 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1485 if (!(val & 0x01)) {
1486 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1487 "Sensor is probably unusable.\n");
1488 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1491 superio_exit(sioaddr);
1492 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1493 sio_data->sioreg = sioaddr;
1498 /* when Super-I/O functions move to a separate file, the Super-I/O
1499 * bus will manage the lifetime of the device and this module will only keep
1500 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1501 * must keep track of the device */
1502 static struct platform_device *pdev;
1504 static int __init sensors_w83627ehf_init(void)
1507 unsigned short address;
1508 struct resource res;
1509 struct w83627ehf_sio_data sio_data;
1511 /* initialize sio_data->kind and sio_data->sioreg.
1513 * when Super-I/O functions move to a separate file, the Super-I/O
1514 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1515 * w83627ehf hardware monitor, and call probe() */
1516 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1517 w83627ehf_find(0x4e, &address, &sio_data))
1520 err = platform_driver_register(&w83627ehf_driver);
1524 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1526 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1527 goto exit_unregister;
1530 err = platform_device_add_data(pdev, &sio_data,
1531 sizeof(struct w83627ehf_sio_data));
1533 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1534 goto exit_device_put;
1537 memset(&res, 0, sizeof(res));
1539 res.start = address + IOREGION_OFFSET;
1540 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1541 res.flags = IORESOURCE_IO;
1542 err = platform_device_add_resources(pdev, &res, 1);
1544 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1546 goto exit_device_put;
1549 /* platform_device_add calls probe() */
1550 err = platform_device_add(pdev);
1552 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1554 goto exit_device_put;
1560 platform_device_put(pdev);
1562 platform_driver_unregister(&w83627ehf_driver);
1567 static void __exit sensors_w83627ehf_exit(void)
1569 platform_device_unregister(pdev);
1570 platform_driver_unregister(&w83627ehf_driver);
1573 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1574 MODULE_DESCRIPTION("W83627EHF driver");
1575 MODULE_LICENSE("GPL");
1577 module_init(sensors_w83627ehf_init);
1578 module_exit(sensors_w83627ehf_exit);