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   1 /*
   2  * linux/arch/arm/mach-pxa/lpd270.c
   3  *
   4  * Support for the LogicPD PXA270 Card Engine.
   5  * Derived from the mainstone code, which carries these notices:
   6  *
   7  * Author:      Nicolas Pitre
   8  * Created:     Nov 05, 2002
   9  * Copyright:   MontaVista Software Inc.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/partitions.h>
  26
  27 #include <asm/types.h>
  28 #include <asm/setup.h>
  29 #include <asm/memory.h>
  30 #include <asm/mach-types.h>
  31 #include <asm/hardware.h>
  32 #include <asm/irq.h>
  33 #include <asm/sizes.h>
  34
  35 #include <asm/mach/arch.h>
  36 #include <asm/mach/map.h>
  37 #include <asm/mach/irq.h>
  38 #include <asm/mach/flash.h>
  39
  40 #include <asm/arch/pxa-regs.h>
  41 #include <asm/arch/pxa2xx-regs.h>
  42 #include <asm/arch/pxa2xx-gpio.h>
  43 #include <asm/arch/lpd270.h>
  44 #include <asm/arch/audio.h>
  45 #include <asm/arch/pxafb.h>
  46 #include <asm/arch/mmc.h>
  47 #include <asm/arch/irda.h>
  48 #include <asm/arch/ohci.h>
  49
  50 #include "generic.h"
  51 #include "devices.h"
  52
  53
  54 static unsigned int lpd270_irq_enabled;
  55
  56 static void lpd270_mask_irq(unsigned int irq)
  57 {
  58         int lpd270_irq = irq - LPD270_IRQ(0);
  59
  60         __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
  61
  62         lpd270_irq_enabled &= ~(1 << lpd270_irq);
  63         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
  64 }
  65
  66 static void lpd270_unmask_irq(unsigned int irq)
  67 {
  68         int lpd270_irq = irq - LPD270_IRQ(0);
  69
  70         lpd270_irq_enabled |= 1 << lpd270_irq;
  71         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
  72 }
  73
  74 static struct irq_chip lpd270_irq_chip = {
  75         .name           = "CPLD",
  76         .ack            = lpd270_mask_irq,
  77         .mask           = lpd270_mask_irq,
  78         .unmask         = lpd270_unmask_irq,
  79 };
  80
  81 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
  82 {
  83         unsigned long pending;
  84
  85         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
  86         do {
  87                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
  88                 if (likely(pending)) {
  89                         irq = LPD270_IRQ(0) + __ffs(pending);
  90                         desc = irq_desc + irq;
  91                         desc_handle_irq(irq, desc);
  92
  93                         pending = __raw_readw(LPD270_INT_STATUS) &
  94                                                 lpd270_irq_enabled;
  95                 }
  96         } while (pending);
  97 }
  98
  99 static void __init lpd270_init_irq(void)
 100 {
 101         int irq;
 102
 103         pxa27x_init_irq();
 104
 105         __raw_writew(0, LPD270_INT_MASK);
 106         __raw_writew(0, LPD270_INT_STATUS);
 107
 108         /* setup extra LogicPD PXA270 irqs */
 109         for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
 110                 set_irq_chip(irq, &lpd270_irq_chip);
 111                 set_irq_handler(irq, handle_level_irq);
 112                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 113         }
 114         set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
 115         set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
 116 }
 117
 118
 119 #ifdef CONFIG_PM
 120 static int lpd270_irq_resume(struct sys_device *dev)
 121 {
 122         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 123         return 0;
 124 }
 125
 126 static struct sysdev_class lpd270_irq_sysclass = {
 127         .name = "cpld_irq",
 128         .resume = lpd270_irq_resume,
 129 };
 130
 131 static struct sys_device lpd270_irq_device = {
 132         .cls = &lpd270_irq_sysclass,
 133 };
 134
 135 static int __init lpd270_irq_device_init(void)
 136 {
 137         int ret = sysdev_class_register(&lpd270_irq_sysclass);
 138         if (ret == 0)
 139                 ret = sysdev_register(&lpd270_irq_device);
 140         return ret;
 141 }
 142
 143 device_initcall(lpd270_irq_device_init);
 144 #endif
 145
 146
 147 static struct resource smc91x_resources[] = {
 148         [0] = {
 149                 .start  = LPD270_ETH_PHYS,
 150                 .end    = (LPD270_ETH_PHYS + 0xfffff),
 151                 .flags  = IORESOURCE_MEM,
 152         },
 153         [1] = {
 154                 .start  = LPD270_ETHERNET_IRQ,
 155                 .end    = LPD270_ETHERNET_IRQ,
 156                 .flags  = IORESOURCE_IRQ,
 157         },
 158 };
 159
 160 static struct platform_device smc91x_device = {
 161         .name           = "smc91x",
 162         .id             = 0,
 163         .num_resources  = ARRAY_SIZE(smc91x_resources),
 164         .resource       = smc91x_resources,
 165 };
 166
 167 static struct platform_device lpd270_audio_device = {
 168         .name           = "pxa2xx-ac97",
 169         .id             = -1,
 170 };
 171
 172 static struct resource lpd270_flash_resources[] = {
 173         [0] = {
 174                 .start  = PXA_CS0_PHYS,
 175                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
 176                 .flags  = IORESOURCE_MEM,
 177         },
 178         [1] = {
 179                 .start  = PXA_CS1_PHYS,
 180                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
 181                 .flags  = IORESOURCE_MEM,
 182         },
 183 };
 184
 185 static struct mtd_partition lpd270_flash0_partitions[] = {
 186         {
 187                 .name =         "Bootloader",
 188                 .size =         0x00040000,
 189                 .offset =       0,
 190                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
 191         }, {
 192                 .name =         "Kernel",
 193                 .size =         0x00400000,
 194                 .offset =       0x00040000,
 195         }, {
 196                 .name =         "Filesystem",
 197                 .size =         MTDPART_SIZ_FULL,
 198                 .offset =       0x00440000
 199         },
 200 };
 201
 202 static struct flash_platform_data lpd270_flash_data[2] = {
 203         {
 204                 .name           = "processor-flash",
 205                 .map_name       = "cfi_probe",
 206                 .parts          = lpd270_flash0_partitions,
 207                 .nr_parts       = ARRAY_SIZE(lpd270_flash0_partitions),
 208         }, {
 209                 .name           = "mainboard-flash",
 210                 .map_name       = "cfi_probe",
 211                 .parts          = NULL,
 212                 .nr_parts       = 0,
 213         }
 214 };
 215
 216 static struct platform_device lpd270_flash_device[2] = {
 217         {
 218                 .name           = "pxa2xx-flash",
 219                 .id             = 0,
 220                 .dev = {
 221                         .platform_data  = &lpd270_flash_data[0],
 222                 },
 223                 .resource       = &lpd270_flash_resources[0],
 224                 .num_resources  = 1,
 225         }, {
 226                 .name           = "pxa2xx-flash",
 227                 .id             = 1,
 228                 .dev = {
 229                         .platform_data  = &lpd270_flash_data[1],
 230                 },
 231                 .resource       = &lpd270_flash_resources[1],
 232                 .num_resources  = 1,
 233         },
 234 };
 235
 236 static void lpd270_backlight_power(int on)
 237 {
 238         if (on) {
 239                 pxa_gpio_mode(GPIO16_PWM0_MD);
 240                 pxa_set_cken(CKEN_PWM0, 1);
 241                 PWM_CTRL0 = 0;
 242                 PWM_PWDUTY0 = 0x3ff;
 243                 PWM_PERVAL0 = 0x3ff;
 244         } else {
 245                 PWM_CTRL0 = 0;
 246                 PWM_PWDUTY0 = 0x0;
 247                 PWM_PERVAL0 = 0x3FF;
 248                 pxa_set_cken(CKEN_PWM0, 0);
 249         }
 250 }
 251
 252 /* 5.7" TFT QVGA (LoLo display number 1) */
 253 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
 254         .pixclock               = 150000,
 255         .xres                   = 320,
 256         .yres                   = 240,
 257         .bpp                    = 16,
 258         .hsync_len              = 0x14,
 259         .left_margin            = 0x28,
 260         .right_margin           = 0x0a,
 261         .vsync_len              = 0x02,
 262         .upper_margin           = 0x08,
 263         .lower_margin           = 0x14,
 264         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 265 };
 266
 267 static struct pxafb_mach_info sharp_lq057q3dc02 = {
 268         .modes                  = &sharp_lq057q3dc02_mode,
 269         .num_modes              = 1,
 270         .lccr0                  = 0x07800080,
 271         .lccr3                  = 0x00400000,
 272         .pxafb_backlight_power  = lpd270_backlight_power,
 273 };
 274
 275 /* 12.1" TFT SVGA (LoLo display number 2) */
 276 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
 277         .pixclock               = 50000,
 278         .xres                   = 800,
 279         .yres                   = 600,
 280         .bpp                    = 16,
 281         .hsync_len              = 0x05,
 282         .left_margin            = 0x52,
 283         .right_margin           = 0x05,
 284         .vsync_len              = 0x04,
 285         .upper_margin           = 0x14,
 286         .lower_margin           = 0x0a,
 287         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 288 };
 289
 290 static struct pxafb_mach_info sharp_lq121s1dg31 = {
 291         .modes                  = &sharp_lq121s1dg31_mode,
 292         .num_modes              = 1,
 293         .lccr0                  = 0x07800080,
 294         .lccr3                  = 0x00400000,
 295         .pxafb_backlight_power  = lpd270_backlight_power,
 296 };
 297
 298 /* 3.6" TFT QVGA (LoLo display number 3) */
 299 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
 300         .pixclock               = 150000,
 301         .xres                   = 320,
 302         .yres                   = 240,
 303         .bpp                    = 16,
 304         .hsync_len              = 0x0e,
 305         .left_margin            = 0x04,
 306         .right_margin           = 0x0a,
 307         .vsync_len              = 0x03,
 308         .upper_margin           = 0x03,
 309         .lower_margin           = 0x03,
 310         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 311 };
 312
 313 static struct pxafb_mach_info sharp_lq036q1da01 = {
 314         .modes                  = &sharp_lq036q1da01_mode,
 315         .num_modes              = 1,
 316         .lccr0                  = 0x07800080,
 317         .lccr3                  = 0x00400000,
 318         .pxafb_backlight_power  = lpd270_backlight_power,
 319 };
 320
 321 /* 6.4" TFT VGA (LoLo display number 5) */
 322 static struct pxafb_mode_info sharp_lq64d343_mode = {
 323         .pixclock               = 25000,
 324         .xres                   = 640,
 325         .yres                   = 480,
 326         .bpp                    = 16,
 327         .hsync_len              = 0x31,
 328         .left_margin            = 0x89,
 329         .right_margin           = 0x19,
 330         .vsync_len              = 0x12,
 331         .upper_margin           = 0x22,
 332         .lower_margin           = 0x00,
 333         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 334 };
 335
 336 static struct pxafb_mach_info sharp_lq64d343 = {
 337         .modes                  = &sharp_lq64d343_mode,
 338         .num_modes              = 1,
 339         .lccr0                  = 0x07800080,
 340         .lccr3                  = 0x00400000,
 341         .pxafb_backlight_power  = lpd270_backlight_power,
 342 };
 343
 344 /* 10.4" TFT VGA (LoLo display number 7) */
 345 static struct pxafb_mode_info sharp_lq10d368_mode = {
 346         .pixclock               = 25000,
 347         .xres                   = 640,
 348         .yres                   = 480,
 349         .bpp                    = 16,
 350         .hsync_len              = 0x31,
 351         .left_margin            = 0x89,
 352         .right_margin           = 0x19,
 353         .vsync_len              = 0x12,
 354         .upper_margin           = 0x22,
 355         .lower_margin           = 0x00,
 356         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 357 };
 358
 359 static struct pxafb_mach_info sharp_lq10d368 = {
 360         .modes                  = &sharp_lq10d368_mode,
 361         .num_modes              = 1,
 362         .lccr0                  = 0x07800080,
 363         .lccr3                  = 0x00400000,
 364         .pxafb_backlight_power  = lpd270_backlight_power,
 365 };
 366
 367 /* 3.5" TFT QVGA (LoLo display number 8) */
 368 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
 369         .pixclock               = 150000,
 370         .xres                   = 240,
 371         .yres                   = 320,
 372         .bpp                    = 16,
 373         .hsync_len              = 0x0e,
 374         .left_margin            = 0x0a,
 375         .right_margin           = 0x0a,
 376         .vsync_len              = 0x03,
 377         .upper_margin           = 0x05,
 378         .lower_margin           = 0x14,
 379         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 380 };
 381
 382 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
 383         .modes                  = &sharp_lq035q7db02_20_mode,
 384         .num_modes              = 1,
 385         .lccr0                  = 0x07800080,
 386         .lccr3                  = 0x00400000,
 387         .pxafb_backlight_power  = lpd270_backlight_power,
 388 };
 389
 390 static struct pxafb_mach_info *lpd270_lcd_to_use;
 391
 392 static int __init lpd270_set_lcd(char *str)
 393 {
 394         if (!strnicmp(str, "lq057q3dc02", 11)) {
 395                 lpd270_lcd_to_use = &sharp_lq057q3dc02;
 396         } else if (!strnicmp(str, "lq121s1dg31", 11)) {
 397                 lpd270_lcd_to_use = &sharp_lq121s1dg31;
 398         } else if (!strnicmp(str, "lq036q1da01", 11)) {
 399                 lpd270_lcd_to_use = &sharp_lq036q1da01;
 400         } else if (!strnicmp(str, "lq64d343", 8)) {
 401                 lpd270_lcd_to_use = &sharp_lq64d343;
 402         } else if (!strnicmp(str, "lq10d368", 8)) {
 403                 lpd270_lcd_to_use = &sharp_lq10d368;
 404         } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
 405                 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
 406         } else {
 407                 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
 408         }
 409
 410         return 1;
 411 }
 412
 413 __setup("lcd=", lpd270_set_lcd);
 414
 415 static struct platform_device *platform_devices[] __initdata = {
 416         &smc91x_device,
 417         &lpd270_audio_device,
 418         &lpd270_flash_device[0],
 419         &lpd270_flash_device[1],
 420 };
 421
 422 static int lpd270_ohci_init(struct device *dev)
 423 {
 424         /* setup Port1 GPIO pin. */
 425         pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN);   /* USBHPWR1 */
 426         pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT);  /* USBHPEN1 */
 427
 428         /* Set the Power Control Polarity Low and Power Sense
 429            Polarity Low to active low. */
 430         UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
 431                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
 432
 433         return 0;
 434 }
 435
 436 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
 437         .port_mode      = PMM_PERPORT_MODE,
 438         .init           = lpd270_ohci_init,
 439 };
 440
 441 static void __init lpd270_init(void)
 442 {
 443         lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
 444         lpd270_flash_data[1].width = 4;
 445
 446         /*
 447          * System bus arbiter setting:
 448          * - Core_Park
 449          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
 450          */
 451         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 452
 453         /*
 454          * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
 455          */
 456         pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
 457
 458         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 459
 460         if (lpd270_lcd_to_use != NULL)
 461                 set_pxa_fb_info(lpd270_lcd_to_use);
 462
 463         pxa_set_ohci_info(&lpd270_ohci_platform_data);
 464 }
 465
 466
 467 static struct map_desc lpd270_io_desc[] __initdata = {
 468         {
 469                 .virtual        = LPD270_CPLD_VIRT,
 470                 .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
 471                 .length         = LPD270_CPLD_SIZE,
 472                 .type           = MT_DEVICE,
 473         },
 474 };
 475
 476 static void __init lpd270_map_io(void)
 477 {
 478         pxa_map_io();
 479         iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
 480
 481         /* initialize sleep mode regs (wake-up sources, etc) */
 482         PGSR0 = 0x00008800;
 483         PGSR1 = 0x00000002;
 484         PGSR2 = 0x0001FC00;
 485         PGSR3 = 0x00001F81;
 486         PWER  = 0xC0000002;
 487         PRER  = 0x00000002;
 488         PFER  = 0x00000002;
 489
 490         /* for use I SRAM as framebuffer.  */
 491         PSLR |= 0x00000F04;
 492         PCFR  = 0x00000066;
 493 }
 494
 495 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
 496         /* Maintainer: Peter Barada */
 497         .phys_io        = 0x40000000,
 498         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 499         .boot_params    = 0xa0000100,
 500         .map_io         = lpd270_map_io,
 501         .init_irq       = lpd270_init_irq,
 502         .timer          = &pxa_timer,
 503         .init_machine   = lpd270_init,
 504 MACHINE_END