2 * File: include/asm-blackfin/mach-bf538/mem_map.h
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2, or (at your option)
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING.
27 * If not, write to the Free Software Foundation,
28 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #ifndef _MEM_MAP_538_H_
32 #define _MEM_MAP_538_H_
34 #define COREMMR_BASE 0xFFE00000 /* Core MMRs */
35 #define SYSMMR_BASE 0xFFC00000 /* System MMRs */
37 /* Async Memory Banks */
38 #define ASYNC_BANK3_BASE 0x20300000 /* Async Bank 3 */
39 #define ASYNC_BANK3_SIZE 0x00100000 /* 1M */
40 #define ASYNC_BANK2_BASE 0x20200000 /* Async Bank 2 */
41 #define ASYNC_BANK2_SIZE 0x00100000 /* 1M */
42 #define ASYNC_BANK1_BASE 0x20100000 /* Async Bank 1 */
43 #define ASYNC_BANK1_SIZE 0x00100000 /* 1M */
44 #define ASYNC_BANK0_BASE 0x20000000 /* Async Bank 0 */
45 #define ASYNC_BANK0_SIZE 0x00100000 /* 1M */
49 #define BOOT_ROM_START 0xEF000000
50 #define BOOT_ROM_LENGTH 0x400
54 #ifdef CONFIG_BFIN_ICACHE
55 #define BFIN_ICACHESIZE (16*1024)
57 #define BFIN_ICACHESIZE (0*1024)
60 /* Memory Map for ADSP-BF538/9 processors */
62 #define L1_CODE_START 0xFFA00000
63 #define L1_DATA_A_START 0xFF800000
64 #define L1_DATA_B_START 0xFF900000
66 #ifdef CONFIG_BFIN_ICACHE
67 #define L1_CODE_LENGTH (0x14000 - 0x4000)
69 #define L1_CODE_LENGTH 0x14000
72 #ifdef CONFIG_BFIN_DCACHE
74 #ifdef CONFIG_BFIN_DCACHE_BANKA
75 #define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
76 #define L1_DATA_A_LENGTH (0x8000 - 0x4000)
77 #define L1_DATA_B_LENGTH 0x8000
78 #define BFIN_DCACHESIZE (16*1024)
79 #define BFIN_DSUPBANKS 1
81 #define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
82 #define L1_DATA_A_LENGTH (0x8000 - 0x4000)
83 #define L1_DATA_B_LENGTH (0x8000 - 0x4000)
84 #define BFIN_DCACHESIZE (32*1024)
85 #define BFIN_DSUPBANKS 2
89 #define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
90 #define L1_DATA_A_LENGTH 0x8000
91 #define L1_DATA_B_LENGTH 0x8000
92 #define BFIN_DCACHESIZE (0*1024)
93 #define BFIN_DSUPBANKS 0
94 #endif /*CONFIG_BFIN_DCACHE*/
97 /* Level 2 Memory - none */
102 /* Scratch Pad Memory */
104 #define L1_SCRATCH_START 0xFFB00000
105 #define L1_SCRATCH_LENGTH 0x1000
107 #define GET_PDA_SAFE(preg) \
111 #define GET_PDA(preg, dreg) GET_PDA_SAFE(preg)
113 #endif /* _MEM_MAP_538_H_ */