2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
26 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
27 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
28 MODULE_LICENSE("GPL");
30 static unsigned int i8042_nokbd;
31 module_param_named(nokbd, i8042_nokbd, bool, 0);
32 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
34 static unsigned int i8042_noaux;
35 module_param_named(noaux, i8042_noaux, bool, 0);
36 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
38 static unsigned int i8042_nomux;
39 module_param_named(nomux, i8042_nomux, bool, 0);
40 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
42 static unsigned int i8042_unlock;
43 module_param_named(unlock, i8042_unlock, bool, 0);
44 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
46 static unsigned int i8042_reset;
47 module_param_named(reset, i8042_reset, bool, 0);
48 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
50 static unsigned int i8042_direct;
51 module_param_named(direct, i8042_direct, bool, 0);
52 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
54 static unsigned int i8042_dumbkbd;
55 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
56 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
58 static unsigned int i8042_noloop;
59 module_param_named(noloop, i8042_noloop, bool, 0);
60 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
62 static unsigned int i8042_blink_frequency = 500;
63 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
64 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
67 static int i8042_nopnp;
68 module_param_named(nopnp, i8042_nopnp, bool, 0);
69 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
74 static int i8042_debug;
75 module_param_named(debug, i8042_debug, bool, 0600);
76 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
79 __obsolete_setup("i8042_noaux");
80 __obsolete_setup("i8042_nomux");
81 __obsolete_setup("i8042_unlock");
82 __obsolete_setup("i8042_reset");
83 __obsolete_setup("i8042_direct");
84 __obsolete_setup("i8042_dumbkbd");
88 static DEFINE_SPINLOCK(i8042_lock);
97 #define I8042_KBD_PORT_NO 0
98 #define I8042_AUX_PORT_NO 1
99 #define I8042_MUX_PORT_NO 2
100 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
102 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
104 static unsigned char i8042_initial_ctr;
105 static unsigned char i8042_ctr;
106 static unsigned char i8042_mux_present;
107 static unsigned char i8042_kbd_irq_registered;
108 static unsigned char i8042_aux_irq_registered;
109 static struct platform_device *i8042_platform_device;
111 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs);
114 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
115 * be ready for reading values from it / writing values to it.
116 * Called always with i8042_lock held.
119 static int i8042_wait_read(void)
123 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
127 return -(i == I8042_CTL_TIMEOUT);
130 static int i8042_wait_write(void)
134 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
138 return -(i == I8042_CTL_TIMEOUT);
142 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
143 * of the i8042 down the toilet.
146 static int i8042_flush(void)
149 unsigned char data, str;
152 spin_lock_irqsave(&i8042_lock, flags);
154 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
156 data = i8042_read_data();
158 dbg("%02x <- i8042 (flush, %s)", data,
159 str & I8042_STR_AUXDATA ? "aux" : "kbd");
162 spin_unlock_irqrestore(&i8042_lock, flags);
168 * i8042_command() executes a command on the i8042. It also sends the input
169 * parameter(s) of the commands to it, and receives the output value(s). The
170 * parameters are to be stored in the param array, and the output is placed
171 * into the same array. The number of the parameters and output values is
172 * encoded in bits 8-11 of the command number.
175 static int __i8042_command(unsigned char *param, int command)
179 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
182 error = i8042_wait_write();
186 dbg("%02x -> i8042 (command)", command & 0xff);
187 i8042_write_command(command & 0xff);
189 for (i = 0; i < ((command >> 12) & 0xf); i++) {
190 error = i8042_wait_write();
193 dbg("%02x -> i8042 (parameter)", param[i]);
194 i8042_write_data(param[i]);
197 for (i = 0; i < ((command >> 8) & 0xf); i++) {
198 error = i8042_wait_read();
200 dbg(" -- i8042 (timeout)");
204 if (command == I8042_CMD_AUX_LOOP &&
205 !(i8042_read_status() & I8042_STR_AUXDATA)) {
206 dbg(" -- i8042 (auxerr)");
210 param[i] = i8042_read_data();
211 dbg("%02x <- i8042 (return)", param[i]);
217 static int i8042_command(unsigned char *param, int command)
222 spin_lock_irqsave(&i8042_lock, flags);
223 retval = __i8042_command(param, command);
224 spin_unlock_irqrestore(&i8042_lock, flags);
230 * i8042_kbd_write() sends a byte out through the keyboard interface.
233 static int i8042_kbd_write(struct serio *port, unsigned char c)
238 spin_lock_irqsave(&i8042_lock, flags);
240 if (!(retval = i8042_wait_write())) {
241 dbg("%02x -> i8042 (kbd-data)", c);
245 spin_unlock_irqrestore(&i8042_lock, flags);
251 * i8042_aux_write() sends a byte out through the aux interface.
254 static int i8042_aux_write(struct serio *serio, unsigned char c)
256 struct i8042_port *port = serio->port_data;
264 retval = i8042_command(&c, I8042_CMD_AUX_SEND);
266 retval = i8042_command(&c, I8042_CMD_MUX_SEND + port->mux);
269 * Make sure the interrupt happens and the character is received even
270 * in the case the IRQ isn't wired, so that we can receive further
274 i8042_interrupt(0, NULL, NULL);
279 * i8042_start() is called by serio core when port is about to finish
280 * registering. It will mark port as existing so i8042_interrupt can
281 * start sending data through it.
283 static int i8042_start(struct serio *serio)
285 struct i8042_port *port = serio->port_data;
293 * i8042_stop() marks serio port as non-existing so i8042_interrupt
294 * will not try to send data to the port that is about to go away.
295 * The function is called by serio core as part of unregister procedure.
297 static void i8042_stop(struct serio *serio)
299 struct i8042_port *port = serio->port_data;
307 * i8042_interrupt() is the most important function in this driver -
308 * it handles the interrupts from the i8042, and sends incoming bytes
309 * to the upper layers.
312 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs)
314 struct i8042_port *port;
316 unsigned char str, data;
318 unsigned int port_no;
321 spin_lock_irqsave(&i8042_lock, flags);
322 str = i8042_read_status();
323 if (unlikely(~str & I8042_STR_OBF)) {
324 spin_unlock_irqrestore(&i8042_lock, flags);
325 if (irq) dbg("Interrupt %d, without any data", irq);
329 data = i8042_read_data();
330 spin_unlock_irqrestore(&i8042_lock, flags);
332 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
333 static unsigned long last_transmit;
334 static unsigned char last_str;
337 if (str & I8042_STR_MUXERR) {
338 dbg("MUX error, status is %02x, data is %02x", str, data);
342 * When MUXERR condition is signalled the data register can only contain
343 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
344 * it is not always the case. Some KBC just get confused which port the
345 * data came from and signal error leaving the data intact. They _do not_
346 * revert to legacy mode (actually I've never seen KBC reverting to legacy
347 * mode yet, when we see one we'll add proper handling).
348 * Anyway, we will assume that the data came from the same serio last byte
349 * was transmitted (if transmission happened not too long ago).
351 if (time_before(jiffies, last_transmit + HZ/10)) {
355 /* fall through - report timeout */
357 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
358 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
362 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
364 last_transmit = jiffies;
367 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
368 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
370 port_no = (str & I8042_STR_AUXDATA) ?
371 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
374 port = &i8042_ports[port_no];
376 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
378 dfl & SERIO_PARITY ? ", bad parity" : "",
379 dfl & SERIO_TIMEOUT ? ", timeout" : "");
381 if (likely(port->exists))
382 serio_interrupt(port->serio, data, dfl, regs);
386 return IRQ_RETVAL(ret);
390 * i8042_enable_kbd_port enables keybaord port on chip
393 static int i8042_enable_kbd_port(void)
395 i8042_ctr &= ~I8042_CTR_KBDDIS;
396 i8042_ctr |= I8042_CTR_KBDINT;
398 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
399 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
407 * i8042_enable_aux_port enables AUX (mouse) port on chip
410 static int i8042_enable_aux_port(void)
412 i8042_ctr &= ~I8042_CTR_AUXDIS;
413 i8042_ctr |= I8042_CTR_AUXINT;
415 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
416 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
424 * i8042_enable_mux_ports enables 4 individual AUX ports after
425 * the controller has been switched into Multiplexed mode
428 static int i8042_enable_mux_ports(void)
433 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
434 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
435 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
438 return i8042_enable_aux_port();
442 * i8042_set_mux_mode checks whether the controller has an active
443 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
446 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
451 * Get rid of bytes in the queue.
457 * Internal loopback test - send three bytes, they should come back from the
458 * mouse interface, the last should be version.
462 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0)
464 param = mode ? 0x56 : 0xf6;
465 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
467 param = mode ? 0xa4 : 0xa5;
468 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
472 *mux_version = param;
478 * i8042_check_mux() checks whether the controller supports the PS/2 Active
479 * Multiplexing specification by Synaptics, Phoenix, Insyde and
483 static int __devinit i8042_check_mux(void)
485 unsigned char mux_version;
487 if (i8042_set_mux_mode(1, &mux_version))
491 * Workaround for interference with USB Legacy emulation
492 * that causes a v10.12 MUX to be found.
494 if (mux_version == 0xAC)
497 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
498 (mux_version >> 4) & 0xf, mux_version & 0xf);
501 * Disable all muxed ports by disabling AUX.
503 i8042_ctr |= I8042_CTR_AUXDIS;
504 i8042_ctr &= ~I8042_CTR_AUXINT;
506 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
507 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
511 i8042_mux_present = 1;
517 * The following is used to test AUX IRQ delivery.
519 static struct completion i8042_aux_irq_delivered __devinitdata;
520 static int i8042_irq_being_tested __devinitdata;
522 static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id, struct pt_regs *regs)
525 unsigned char str, data;
527 spin_lock_irqsave(&i8042_lock, flags);
528 str = i8042_read_status();
529 if (str & I8042_STR_OBF) {
530 data = i8042_read_data();
531 if (i8042_irq_being_tested &&
532 data == 0xa5 && (str & I8042_STR_AUXDATA))
533 complete(&i8042_aux_irq_delivered);
535 spin_unlock_irqrestore(&i8042_lock, flags);
542 * i8042_check_aux() applies as much paranoia as it can at detecting
543 * the presence of an AUX interface.
546 static int __devinit i8042_check_aux(void)
549 int irq_registered = 0;
554 * Get rid of bytes in the queue.
560 * Internal loopback test - filters out AT-type i8042's. Unfortunately
561 * SiS screwed up and their 5597 doesn't support the LOOP command even
562 * though it has an AUX port.
566 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x5a) {
569 * External connection test - filters out AT-soldered PS/2 i8042's
570 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
571 * 0xfa - no error on some notebooks which ignore the spec
572 * Because it's common for chipsets to return error on perfectly functioning
573 * AUX ports, we test for this only when the LOOP command failed.
576 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
577 (param && param != 0xfa && param != 0xff))
582 * Bit assignment test - filters out PS/2 i8042's in AT mode
585 if (i8042_command(¶m, I8042_CMD_AUX_DISABLE))
587 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
588 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
589 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
592 if (i8042_command(¶m, I8042_CMD_AUX_ENABLE))
594 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
598 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
599 * used it for a PCI card or somethig else.
604 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
605 * is working and hope we are right.
611 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
612 "i8042", i8042_platform_device))
617 if (i8042_enable_aux_port())
620 spin_lock_irqsave(&i8042_lock, flags);
622 init_completion(&i8042_aux_irq_delivered);
623 i8042_irq_being_tested = 1;
626 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
628 spin_unlock_irqrestore(&i8042_lock, flags);
633 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
634 msecs_to_jiffies(250)) == 0) {
636 * AUX IRQ was never delivered so we need to flush the controller to
637 * get rid of the byte we put there; otherwise keyboard may not work.
646 * Disable the interface.
649 i8042_ctr |= I8042_CTR_AUXDIS;
650 i8042_ctr &= ~I8042_CTR_AUXINT;
652 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
656 free_irq(I8042_AUX_IRQ, i8042_platform_device);
661 static int i8042_controller_check(void)
663 if (i8042_flush() == I8042_BUFFER_SIZE) {
664 printk(KERN_ERR "i8042.c: No controller found.\n");
671 static int i8042_controller_selftest(void)
678 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
679 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
683 if (param != I8042_RET_CTL_TEST) {
684 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
685 param, I8042_RET_CTL_TEST);
693 * i8042_controller init initializes the i8042 controller, and,
694 * most importantly, sets it into non-xlated mode if that's
698 static int i8042_controller_init(void)
703 * Save the CTR for restoral on unload / reboot.
706 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
707 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
711 i8042_initial_ctr = i8042_ctr;
714 * Disable the keyboard interface and interrupt.
717 i8042_ctr |= I8042_CTR_KBDDIS;
718 i8042_ctr &= ~I8042_CTR_KBDINT;
724 spin_lock_irqsave(&i8042_lock, flags);
725 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
727 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
729 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
731 spin_unlock_irqrestore(&i8042_lock, flags);
734 * If the chip is configured into nontranslated mode by the BIOS, don't
735 * bother enabling translating and be happy.
738 if (~i8042_ctr & I8042_CTR_XLATE)
742 * Set nontranslated mode for the kbd interface if requested by an option.
743 * After this the kbd interface becomes a simple serial in/out, like the aux
744 * interface is. We don't do this by default, since it can confuse notebook
749 i8042_ctr &= ~I8042_CTR_XLATE;
755 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
756 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
765 * Reset the controller and reset CRT to the original value set by BIOS.
768 static void i8042_controller_reset(void)
773 * Disable MUX mode if present.
776 if (i8042_mux_present)
777 i8042_set_mux_mode(0, NULL);
780 * Reset the controller if requested.
783 i8042_controller_selftest();
786 * Restore the original control register setting.
789 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
790 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
795 * Here we try to reset everything back to a state in which the BIOS will be
796 * able to talk to the hardware when rebooting.
799 static void i8042_controller_cleanup(void)
804 * Reset anything that is connected to the ports.
807 for (i = 0; i < I8042_NUM_PORTS; i++)
808 if (i8042_ports[i].serio)
809 serio_cleanup(i8042_ports[i].serio);
811 i8042_controller_reset();
816 * i8042_panic_blink() will flash the keyboard LEDs and is called when
817 * kernel panics. Flashing LEDs is useful for users running X who may
818 * not see the console and will help distingushing panics from "real"
821 * Note that DELAY has a limit of 10ms so we will not get stuck here
822 * waiting for KBC to free up even if KBD interrupt is off
825 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
827 static long i8042_panic_blink(long count)
830 static long last_blink;
834 * We expect frequency to be about 1/2s. KDB uses about 1s.
835 * Make sure they are different.
837 if (!i8042_blink_frequency)
839 if (count - last_blink < i8042_blink_frequency)
843 while (i8042_read_status() & I8042_STR_IBF)
845 i8042_write_data(0xed); /* set leds */
847 while (i8042_read_status() & I8042_STR_IBF)
850 i8042_write_data(led);
859 * Here we try to restore the original BIOS settings
862 static int i8042_suspend(struct platform_device *dev, pm_message_t state)
864 i8042_controller_cleanup();
871 * Here we try to reset everything back to a state in which suspended
874 static int i8042_resume(struct platform_device *dev)
878 error = i8042_controller_check();
882 error = i8042_controller_selftest();
887 * Restore pre-resume CTR value and disable all ports
890 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
891 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
892 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
893 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
897 if (i8042_mux_present) {
898 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
900 "i8042: failed to resume active multiplexor, "
901 "mouse won't work.\n");
902 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
903 i8042_enable_aux_port();
905 if (i8042_ports[I8042_KBD_PORT_NO].serio)
906 i8042_enable_kbd_port();
908 i8042_interrupt(0, NULL, NULL);
914 * We need to reset the 8042 back to original mode on system shutdown,
915 * because otherwise BIOSes will be confused.
918 static void i8042_shutdown(struct platform_device *dev)
920 i8042_controller_cleanup();
923 static int __devinit i8042_create_kbd_port(void)
926 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
928 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
932 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
933 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
934 serio->start = i8042_start;
935 serio->stop = i8042_stop;
936 serio->port_data = port;
937 serio->dev.parent = &i8042_platform_device->dev;
938 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
939 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
942 port->irq = I8042_KBD_IRQ;
947 static int __devinit i8042_create_aux_port(int idx)
950 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
951 struct i8042_port *port = &i8042_ports[port_no];
953 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
957 serio->id.type = SERIO_8042;
958 serio->write = i8042_aux_write;
959 serio->start = i8042_start;
960 serio->stop = i8042_stop;
961 serio->port_data = port;
962 serio->dev.parent = &i8042_platform_device->dev;
964 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
965 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
967 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
968 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
973 port->irq = I8042_AUX_IRQ;
978 static void __devinit i8042_free_kbd_port(void)
980 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
981 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
984 static void __devinit i8042_free_aux_ports(void)
988 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
989 kfree(i8042_ports[i].serio);
990 i8042_ports[i].serio = NULL;
994 static void __devinit i8042_register_ports(void)
998 for (i = 0; i < I8042_NUM_PORTS; i++) {
999 if (i8042_ports[i].serio) {
1000 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1001 i8042_ports[i].serio->name,
1002 (unsigned long) I8042_DATA_REG,
1003 (unsigned long) I8042_COMMAND_REG,
1004 i8042_ports[i].irq);
1005 serio_register_port(i8042_ports[i].serio);
1010 static void __devinit i8042_unregister_ports(void)
1014 for (i = 0; i < I8042_NUM_PORTS; i++) {
1015 if (i8042_ports[i].serio) {
1016 serio_unregister_port(i8042_ports[i].serio);
1017 i8042_ports[i].serio = NULL;
1022 static void i8042_free_irqs(void)
1024 if (i8042_aux_irq_registered)
1025 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1026 if (i8042_kbd_irq_registered)
1027 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1029 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1032 static int __devinit i8042_setup_aux(void)
1034 int (*aux_enable)(void);
1038 if (i8042_check_aux())
1041 if (i8042_nomux || i8042_check_mux()) {
1042 error = i8042_create_aux_port(-1);
1044 goto err_free_ports;
1045 aux_enable = i8042_enable_aux_port;
1047 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1048 error = i8042_create_aux_port(i);
1050 goto err_free_ports;
1052 aux_enable = i8042_enable_mux_ports;
1055 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1056 "i8042", i8042_platform_device);
1058 goto err_free_ports;
1063 i8042_aux_irq_registered = 1;
1067 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1069 i8042_free_aux_ports();
1073 static int __devinit i8042_setup_kbd(void)
1077 error = i8042_create_kbd_port();
1081 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1082 "i8042", i8042_platform_device);
1086 error = i8042_enable_kbd_port();
1090 i8042_kbd_irq_registered = 1;
1094 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1096 i8042_free_kbd_port();
1100 static int __devinit i8042_probe(struct platform_device *dev)
1104 error = i8042_controller_selftest();
1108 error = i8042_controller_init();
1113 error = i8042_setup_aux();
1114 if (error && error != -ENODEV && error != -EBUSY)
1119 error = i8042_setup_kbd();
1125 * Ok, everything is ready, let's register all serio ports
1127 i8042_register_ports();
1132 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1134 i8042_controller_reset();
1139 static int __devexit i8042_remove(struct platform_device *dev)
1141 i8042_unregister_ports();
1143 i8042_controller_reset();
1148 static struct platform_driver i8042_driver = {
1151 .owner = THIS_MODULE,
1153 .probe = i8042_probe,
1154 .remove = __devexit_p(i8042_remove),
1155 .suspend = i8042_suspend,
1156 .resume = i8042_resume,
1157 .shutdown = i8042_shutdown,
1160 static int __init i8042_init(void)
1166 err = i8042_platform_init();
1170 err = i8042_controller_check();
1172 goto err_platform_exit;
1174 err = platform_driver_register(&i8042_driver);
1176 goto err_platform_exit;
1178 i8042_platform_device = platform_device_alloc("i8042", -1);
1179 if (!i8042_platform_device) {
1181 goto err_unregister_driver;
1184 err = platform_device_add(i8042_platform_device);
1186 goto err_free_device;
1188 panic_blink = i8042_panic_blink;
1193 platform_device_put(i8042_platform_device);
1194 err_unregister_driver:
1195 platform_driver_unregister(&i8042_driver);
1197 i8042_platform_exit();
1202 static void __exit i8042_exit(void)
1204 platform_device_unregister(i8042_platform_device);
1205 platform_driver_unregister(&i8042_driver);
1206 i8042_platform_exit();
1211 module_init(i8042_init);
1212 module_exit(i8042_exit);