2 * linux/drivers/mmc/mmci.c - ARM PrimeCell MMCI PL180/1 driver
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/config.h>
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/device.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/err.h>
19 #include <linux/highmem.h>
20 #include <linux/mmc/host.h>
21 #include <linux/mmc/protocol.h>
22 #include <linux/amba/bus.h>
23 #include <linux/clk.h>
25 #include <asm/cacheflush.h>
26 #include <asm/div64.h>
28 #include <asm/scatterlist.h>
29 #include <asm/sizes.h>
30 #include <asm/mach/mmc.h>
34 #define DRIVER_NAME "mmci-pl18x"
36 #define DBG(host,fmt,args...) \
37 pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
39 static unsigned int fmax = 515633;
42 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
44 writel(0, host->base + MMCICOMMAND);
50 mrq->data->bytes_xfered = host->data_xfered;
53 * Need to drop the host lock here; mmc_request_done may call
54 * back into the driver...
56 spin_unlock(&host->lock);
57 mmc_request_done(host->mmc, mrq);
58 spin_lock(&host->lock);
61 static void mmci_stop_data(struct mmci_host *host)
63 writel(0, host->base + MMCIDATACTRL);
64 writel(0, host->base + MMCIMASK1);
68 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
70 unsigned int datactrl, timeout, irqmask;
71 unsigned long long clks;
74 DBG(host, "blksz %04x blks %04x flags %08x\n",
75 1 << data->blksz_bits, data->blocks, data->flags);
78 host->size = data->blocks << data->blksz_bits;
79 host->data_xfered = 0;
81 mmci_init_sg(host, data);
83 clks = (unsigned long long)data->timeout_ns * host->cclk;
84 do_div(clks, 1000000000UL);
86 timeout = data->timeout_clks + (unsigned int)clks;
89 writel(timeout, base + MMCIDATATIMER);
90 writel(host->size, base + MMCIDATALENGTH);
92 datactrl = MCI_DPSM_ENABLE | data->blksz_bits << 4;
93 if (data->flags & MMC_DATA_READ) {
94 datactrl |= MCI_DPSM_DIRECTION;
95 irqmask = MCI_RXFIFOHALFFULLMASK;
98 * If we have less than a FIFOSIZE of bytes to transfer,
99 * trigger a PIO interrupt as soon as any data is available.
101 if (host->size < MCI_FIFOSIZE)
102 irqmask |= MCI_RXDATAAVLBLMASK;
105 * We don't actually need to include "FIFO empty" here
106 * since its implicit in "FIFO half empty".
108 irqmask = MCI_TXFIFOHALFEMPTYMASK;
111 writel(datactrl, base + MMCIDATACTRL);
112 writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
113 writel(irqmask, base + MMCIMASK1);
117 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
119 void __iomem *base = host->base;
121 DBG(host, "op %02x arg %08x flags %08x\n",
122 cmd->opcode, cmd->arg, cmd->flags);
124 if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) {
125 writel(0, base + MMCICOMMAND);
129 c |= cmd->opcode | MCI_CPSM_ENABLE;
130 if (cmd->flags & MMC_RSP_PRESENT) {
131 if (cmd->flags & MMC_RSP_136)
132 c |= MCI_CPSM_LONGRSP;
133 c |= MCI_CPSM_RESPONSE;
136 c |= MCI_CPSM_INTERRUPT;
140 writel(cmd->arg, base + MMCIARGUMENT);
141 writel(c, base + MMCICOMMAND);
145 mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
148 if (status & MCI_DATABLOCKEND) {
149 host->data_xfered += 1 << data->blksz_bits;
151 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
152 if (status & MCI_DATACRCFAIL)
153 data->error = MMC_ERR_BADCRC;
154 else if (status & MCI_DATATIMEOUT)
155 data->error = MMC_ERR_TIMEOUT;
156 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
157 data->error = MMC_ERR_FIFO;
158 status |= MCI_DATAEND;
161 * We hit an error condition. Ensure that any data
162 * partially written to a page is properly coherent.
164 if (host->sg_len && data->flags & MMC_DATA_READ)
165 flush_dcache_page(host->sg_ptr->page);
167 if (status & MCI_DATAEND) {
168 mmci_stop_data(host);
171 mmci_request_end(host, data->mrq);
173 mmci_start_command(host, data->stop, 0);
179 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
182 void __iomem *base = host->base;
186 cmd->resp[0] = readl(base + MMCIRESPONSE0);
187 cmd->resp[1] = readl(base + MMCIRESPONSE1);
188 cmd->resp[2] = readl(base + MMCIRESPONSE2);
189 cmd->resp[3] = readl(base + MMCIRESPONSE3);
191 if (status & MCI_CMDTIMEOUT) {
192 cmd->error = MMC_ERR_TIMEOUT;
193 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
194 cmd->error = MMC_ERR_BADCRC;
197 if (!cmd->data || cmd->error != MMC_ERR_NONE) {
198 mmci_request_end(host, cmd->mrq);
199 } else if (!(cmd->data->flags & MMC_DATA_READ)) {
200 mmci_start_data(host, cmd->data);
204 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
206 void __iomem *base = host->base;
211 int count = host->size - (readl(base + MMCIFIFOCNT) << 2);
219 readsl(base + MMCIFIFO, ptr, count >> 2);
227 status = readl(base + MMCISTATUS);
228 } while (status & MCI_RXDATAAVLBL);
233 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
235 void __iomem *base = host->base;
239 unsigned int count, maxcnt;
241 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE;
242 count = min(remain, maxcnt);
244 writesl(base + MMCIFIFO, ptr, count >> 2);
252 status = readl(base + MMCISTATUS);
253 } while (status & MCI_TXFIFOHALFEMPTY);
259 * PIO data transfer IRQ handler.
261 static irqreturn_t mmci_pio_irq(int irq, void *dev_id, struct pt_regs *regs)
263 struct mmci_host *host = dev_id;
264 void __iomem *base = host->base;
267 status = readl(base + MMCISTATUS);
269 DBG(host, "irq1 %08x\n", status);
273 unsigned int remain, len;
277 * For write, we only need to test the half-empty flag
278 * here - if the FIFO is completely empty, then by
279 * definition it is more than half empty.
281 * For read, check for data available.
283 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
287 * Map the current scatter buffer.
289 buffer = mmci_kmap_atomic(host, &flags) + host->sg_off;
290 remain = host->sg_ptr->length - host->sg_off;
293 if (status & MCI_RXACTIVE)
294 len = mmci_pio_read(host, buffer, remain);
295 if (status & MCI_TXACTIVE)
296 len = mmci_pio_write(host, buffer, remain, status);
301 mmci_kunmap_atomic(host, buffer, &flags);
311 * If we were reading, and we have completed this
312 * page, ensure that the data cache is coherent.
314 if (status & MCI_RXACTIVE)
315 flush_dcache_page(host->sg_ptr->page);
317 if (!mmci_next_sg(host))
320 status = readl(base + MMCISTATUS);
324 * If we're nearing the end of the read, switch to
325 * "any data available" mode.
327 if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
328 writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
331 * If we run out of data, disable the data IRQs; this
332 * prevents a race where the FIFO becomes empty before
333 * the chip itself has disabled the data path, and
334 * stops us racing with our data end IRQ.
336 if (host->size == 0) {
337 writel(0, base + MMCIMASK1);
338 writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
345 * Handle completion of command and data transfers.
347 static irqreturn_t mmci_irq(int irq, void *dev_id, struct pt_regs *regs)
349 struct mmci_host *host = dev_id;
353 spin_lock(&host->lock);
356 struct mmc_command *cmd;
357 struct mmc_data *data;
359 status = readl(host->base + MMCISTATUS);
360 status &= readl(host->base + MMCIMASK0);
361 writel(status, host->base + MMCICLEAR);
363 DBG(host, "irq0 %08x\n", status);
366 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
367 MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
368 mmci_data_irq(host, data, status);
371 if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd)
372 mmci_cmd_irq(host, cmd, status);
377 spin_unlock(&host->lock);
379 return IRQ_RETVAL(ret);
382 static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
384 struct mmci_host *host = mmc_priv(mmc);
386 WARN_ON(host->mrq != NULL);
388 spin_lock_irq(&host->lock);
392 if (mrq->data && mrq->data->flags & MMC_DATA_READ)
393 mmci_start_data(host, mrq->data);
395 mmci_start_command(host, mrq->cmd, 0);
397 spin_unlock_irq(&host->lock);
400 static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
402 struct mmci_host *host = mmc_priv(mmc);
403 u32 clk = 0, pwr = 0;
406 if (ios->clock >= host->mclk) {
407 clk = MCI_CLK_BYPASS;
408 host->cclk = host->mclk;
410 clk = host->mclk / (2 * ios->clock) - 1;
413 host->cclk = host->mclk / (2 * (clk + 1));
415 clk |= MCI_CLK_ENABLE;
418 if (host->plat->translate_vdd)
419 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
421 switch (ios->power_mode) {
432 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
435 writel(clk, host->base + MMCICLOCK);
437 if (host->pwr != pwr) {
439 writel(pwr, host->base + MMCIPOWER);
443 static struct mmc_host_ops mmci_ops = {
444 .request = mmci_request,
445 .set_ios = mmci_set_ios,
448 static void mmci_check_status(unsigned long data)
450 struct mmci_host *host = (struct mmci_host *)data;
453 status = host->plat->status(mmc_dev(host->mmc));
454 if (status ^ host->oldstat)
455 mmc_detect_change(host->mmc, 0);
457 host->oldstat = status;
458 mod_timer(&host->timer, jiffies + HZ);
461 static int mmci_probe(struct amba_device *dev, void *id)
463 struct mmc_platform_data *plat = dev->dev.platform_data;
464 struct mmci_host *host;
465 struct mmc_host *mmc;
468 /* must have platform data */
474 ret = amba_request_regions(dev, DRIVER_NAME);
478 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev);
484 host = mmc_priv(mmc);
485 host->clk = clk_get(&dev->dev, "MCLK");
486 if (IS_ERR(host->clk)) {
487 ret = PTR_ERR(host->clk);
492 ret = clk_enable(host->clk);
497 host->mclk = clk_get_rate(host->clk);
499 host->base = ioremap(dev->res.start, SZ_4K);
505 mmc->ops = &mmci_ops;
506 mmc->f_min = (host->mclk + 511) / 512;
507 mmc->f_max = min(host->mclk, fmax);
508 mmc->ocr_avail = plat->ocr_mask;
513 mmc->max_hw_segs = 16;
514 mmc->max_phys_segs = NR_SG;
517 * Since we only have a 16-bit data length register, we must
518 * ensure that we don't exceed 2^16-1 bytes in a single request.
519 * Choose 64 (512-byte) sectors as the limit.
521 mmc->max_sectors = 64;
524 * Set the maximum segment size. Since we aren't doing DMA
525 * (yet) we are only limited by the data length register.
527 mmc->max_seg_size = mmc->max_sectors << 9;
529 spin_lock_init(&host->lock);
531 writel(0, host->base + MMCIMASK0);
532 writel(0, host->base + MMCIMASK1);
533 writel(0xfff, host->base + MMCICLEAR);
535 ret = request_irq(dev->irq[0], mmci_irq, SA_SHIRQ, DRIVER_NAME " (cmd)", host);
539 ret = request_irq(dev->irq[1], mmci_pio_irq, SA_SHIRQ, DRIVER_NAME " (pio)", host);
543 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
545 amba_set_drvdata(dev, mmc);
549 printk(KERN_INFO "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n",
550 mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
551 (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]);
553 init_timer(&host->timer);
554 host->timer.data = (unsigned long)host;
555 host->timer.function = mmci_check_status;
556 host->timer.expires = jiffies + HZ;
557 add_timer(&host->timer);
562 free_irq(dev->irq[0], host);
566 clk_disable(host->clk);
572 amba_release_regions(dev);
577 static int mmci_remove(struct amba_device *dev)
579 struct mmc_host *mmc = amba_get_drvdata(dev);
581 amba_set_drvdata(dev, NULL);
584 struct mmci_host *host = mmc_priv(mmc);
586 del_timer_sync(&host->timer);
588 mmc_remove_host(mmc);
590 writel(0, host->base + MMCIMASK0);
591 writel(0, host->base + MMCIMASK1);
593 writel(0, host->base + MMCICOMMAND);
594 writel(0, host->base + MMCIDATACTRL);
596 free_irq(dev->irq[0], host);
597 free_irq(dev->irq[1], host);
600 clk_disable(host->clk);
605 amba_release_regions(dev);
612 static int mmci_suspend(struct amba_device *dev, pm_message_t state)
614 struct mmc_host *mmc = amba_get_drvdata(dev);
618 struct mmci_host *host = mmc_priv(mmc);
620 ret = mmc_suspend_host(mmc, state);
622 writel(0, host->base + MMCIMASK0);
628 static int mmci_resume(struct amba_device *dev)
630 struct mmc_host *mmc = amba_get_drvdata(dev);
634 struct mmci_host *host = mmc_priv(mmc);
636 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
638 ret = mmc_resume_host(mmc);
644 #define mmci_suspend NULL
645 #define mmci_resume NULL
648 static struct amba_id mmci_ids[] = {
660 static struct amba_driver mmci_driver = {
665 .remove = mmci_remove,
666 .suspend = mmci_suspend,
667 .resume = mmci_resume,
668 .id_table = mmci_ids,
671 static int __init mmci_init(void)
673 return amba_driver_register(&mmci_driver);
676 static void __exit mmci_exit(void)
678 amba_driver_unregister(&mmci_driver);
681 module_init(mmci_init);
682 module_exit(mmci_exit);
683 module_param(fmax, uint, 0444);
685 MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
686 MODULE_LICENSE("GPL");