git.oblomov.eu Git - linux-2.6/blob - drivers/media/video/sn9c102/sn9c102_ov7630.c

   1 /***************************************************************************
   2  * Plug-in for OV7630 image sensor connected to the SN9C1xx PC Camera      *
   3  * Controllers                                                             *
   4  *                                                                         *
   5  * Copyright (C) 2006-2007 by Luca Risolia <luca.risolia@studio.unibo.it>  *
   6  *                                                                         *
   7  * This program is free software; you can redistribute it and/or modify    *
   8  * it under the terms of the GNU General Public License as published by    *
   9  * the Free Software Foundation; either version 2 of the License, or       *
  10  * (at your option) any later version.                                     *
  11  *                                                                         *
  12  * This program is distributed in the hope that it will be useful,         *
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of          *
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *
  15  * GNU General Public License for more details.                            *
  16  *                                                                         *
  17  * You should have received a copy of the GNU General Public License       *
  18  * along with this program; if not, write to the Free Software             *
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *
  20  ***************************************************************************/
  21
  22 #include "sn9c102_sensor.h"
  23
  24
  25 static int ov7630_init(struct sn9c102_device* cam)
  26 {
  27         int err = 0;
  28
  29         switch (sn9c102_get_bridge(cam)) {
  30         case BRIDGE_SN9C101:
  31         case BRIDGE_SN9C102:
  32                 err = sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17},
  33                                                {0x0f, 0x18}, {0x50, 0x19});
  34
  35                 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  36                 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  37                 err += sn9c102_i2c_write(cam, 0x11, 0x00);
  38                 err += sn9c102_i2c_write(cam, 0x15, 0x35);
  39                 err += sn9c102_i2c_write(cam, 0x16, 0x03);
  40                 err += sn9c102_i2c_write(cam, 0x17, 0x1c);
  41                 err += sn9c102_i2c_write(cam, 0x18, 0xbd);
  42                 err += sn9c102_i2c_write(cam, 0x19, 0x06);
  43                 err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
  44                 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  45                 err += sn9c102_i2c_write(cam, 0x20, 0x44);
  46                 err += sn9c102_i2c_write(cam, 0x23, 0xee);
  47                 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  48                 err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  49                 err += sn9c102_i2c_write(cam, 0x28, 0x20);
  50                 err += sn9c102_i2c_write(cam, 0x29, 0x30);
  51                 err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  52                 err += sn9c102_i2c_write(cam, 0x30, 0x24);
  53                 err += sn9c102_i2c_write(cam, 0x32, 0x86);
  54                 err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  55                 err += sn9c102_i2c_write(cam, 0x61, 0x42);
  56                 err += sn9c102_i2c_write(cam, 0x65, 0x00);
  57                 err += sn9c102_i2c_write(cam, 0x69, 0x38);
  58                 err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  59                 err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  60                 err += sn9c102_i2c_write(cam, 0x71, 0x00);
  61                 err += sn9c102_i2c_write(cam, 0x74, 0x21);
  62                 err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  63                 break;
  64         case BRIDGE_SN9C103:
  65                 err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03},
  66                                                {0x1a, 0x04}, {0x20, 0x05},
  67                                                {0x20, 0x06}, {0x20, 0x07},
  68                                                {0x03, 0x10}, {0x0a, 0x14},
  69                                                {0x60, 0x17}, {0x0f, 0x18},
  70                                                {0x50, 0x19}, {0x1d, 0x1a},
  71                                                {0x10, 0x1b}, {0x02, 0x1c},
  72                                                {0x03, 0x1d}, {0x0f, 0x1e},
  73                                                {0x0c, 0x1f}, {0x00, 0x20},
  74                                                {0x10, 0x21}, {0x20, 0x22},
  75                                                {0x30, 0x23}, {0x40, 0x24},
  76                                                {0x50, 0x25}, {0x60, 0x26},
  77                                                {0x70, 0x27}, {0x80, 0x28},
  78                                                {0x90, 0x29}, {0xa0, 0x2a},
  79                                                {0xb0, 0x2b}, {0xc0, 0x2c},
  80                                                {0xd0, 0x2d}, {0xe0, 0x2e},
  81                                                {0xf0, 0x2f}, {0xff, 0x30});
  82
  83                 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  84                 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  85                 err += sn9c102_i2c_write(cam, 0x15, 0x34);
  86                 err += sn9c102_i2c_write(cam, 0x11, 0x01);
  87                 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  88                 err += sn9c102_i2c_write(cam, 0x20, 0x44);
  89                 err += sn9c102_i2c_write(cam, 0x23, 0xee);
  90                 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  91                 err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  92                 err += sn9c102_i2c_write(cam, 0x28, 0x20);
  93                 err += sn9c102_i2c_write(cam, 0x29, 0x30);
  94                 err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  95                 err += sn9c102_i2c_write(cam, 0x30, 0x24);
  96                 err += sn9c102_i2c_write(cam, 0x32, 0x86);
  97                 err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  98                 err += sn9c102_i2c_write(cam, 0x61, 0x42);
  99                 err += sn9c102_i2c_write(cam, 0x65, 0x00);
 100                 err += sn9c102_i2c_write(cam, 0x69, 0x38);
 101                 err += sn9c102_i2c_write(cam, 0x6f, 0x88);
 102                 err += sn9c102_i2c_write(cam, 0x70, 0x0b);
 103                 err += sn9c102_i2c_write(cam, 0x71, 0x00);
 104                 err += sn9c102_i2c_write(cam, 0x74, 0x21);
 105                 err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
 106                 break;
 107         case BRIDGE_SN9C105:
 108         case BRIDGE_SN9C120:
 109         err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03},
 110                                        {0x1a, 0x04}, {0x03, 0x10},
 111                                        {0x0a, 0x14}, {0xe2, 0x17},
 112                                        {0x0b, 0x18}, {0x00, 0x19},
 113                                        {0x1d, 0x1a}, {0x10, 0x1b},
 114                                        {0x02, 0x1c}, {0x03, 0x1d},
 115                                        {0x0f, 0x1e}, {0x0c, 0x1f},
 116                                        {0x00, 0x20}, {0x24, 0x21},
 117                                        {0x3b, 0x22}, {0x47, 0x23},
 118                                        {0x60, 0x24}, {0x71, 0x25},
 119                                        {0x80, 0x26}, {0x8f, 0x27},
 120                                        {0x9d, 0x28}, {0xaa, 0x29},
 121                                        {0xb8, 0x2a}, {0xc4, 0x2b},
 122                                        {0xd1, 0x2c}, {0xdd, 0x2d},
 123                                        {0xe8, 0x2e}, {0xf4, 0x2f},
 124                                        {0xff, 0x30}, {0x00, 0x3f},
 125                                        {0xc7, 0x40}, {0x01, 0x41},
 126                                        {0x44, 0x42}, {0x00, 0x43},
 127                                        {0x44, 0x44}, {0x00, 0x45},
 128                                        {0x44, 0x46}, {0x00, 0x47},
 129                                        {0xc7, 0x48}, {0x01, 0x49},
 130                                        {0xc7, 0x4a}, {0x01, 0x4b},
 131                                        {0xc7, 0x4c}, {0x01, 0x4d},
 132                                        {0x44, 0x4e}, {0x00, 0x4f},
 133                                        {0x44, 0x50}, {0x00, 0x51},
 134                                        {0x44, 0x52}, {0x00, 0x53},
 135                                        {0xc7, 0x54}, {0x01, 0x55},
 136                                        {0xc7, 0x56}, {0x01, 0x57},
 137                                        {0xc7, 0x58}, {0x01, 0x59},
 138                                        {0x44, 0x5a}, {0x00, 0x5b},
 139                                        {0x44, 0x5c}, {0x00, 0x5d},
 140                                        {0x44, 0x5e}, {0x00, 0x5f},
 141                                        {0xc7, 0x60}, {0x01, 0x61},
 142                                        {0xc7, 0x62}, {0x01, 0x63},
 143                                        {0xc7, 0x64}, {0x01, 0x65},
 144                                        {0x44, 0x66}, {0x00, 0x67},
 145                                        {0x44, 0x68}, {0x00, 0x69},
 146                                        {0x44, 0x6a}, {0x00, 0x6b},
 147                                        {0xc7, 0x6c}, {0x01, 0x6d},
 148                                        {0xc7, 0x6e}, {0x01, 0x6f},
 149                                        {0xc7, 0x70}, {0x01, 0x71},
 150                                        {0x44, 0x72}, {0x00, 0x73},
 151                                        {0x44, 0x74}, {0x00, 0x75},
 152                                        {0x44, 0x76}, {0x00, 0x77},
 153                                        {0xc7, 0x78}, {0x01, 0x79},
 154                                        {0xc7, 0x7a}, {0x01, 0x7b},
 155                                        {0xc7, 0x7c}, {0x01, 0x7d},
 156                                        {0x44, 0x7e}, {0x00, 0x7f},
 157                                        {0x17, 0x84}, {0x00, 0x85},
 158                                        {0x2e, 0x86}, {0x00, 0x87},
 159                                        {0x09, 0x88}, {0x00, 0x89},
 160                                        {0xe8, 0x8a}, {0x0f, 0x8b},
 161                                        {0xda, 0x8c}, {0x0f, 0x8d},
 162                                        {0x40, 0x8e}, {0x00, 0x8f},
 163                                        {0x37, 0x90}, {0x00, 0x91},
 164                                        {0xcf, 0x92}, {0x0f, 0x93},
 165                                        {0xfa, 0x94}, {0x0f, 0x95},
 166                                        {0x00, 0x96}, {0x00, 0x97},
 167                                        {0x00, 0x98}, {0x66, 0x99},
 168                                        {0x00, 0x9a}, {0x40, 0x9b},
 169                                        {0x20, 0x9c}, {0x00, 0x9d},
 170                                        {0x00, 0x9e}, {0x00, 0x9f},
 171                                        {0x2d, 0xc0}, {0x2d, 0xc1},
 172                                        {0x3a, 0xc2}, {0x00, 0xc3},
 173                                        {0x04, 0xc4}, {0x3f, 0xc5},
 174                                        {0x00, 0xc6}, {0x00, 0xc7},
 175                                        {0x50, 0xc8}, {0x3c, 0xc9},
 176                                        {0x28, 0xca}, {0xd8, 0xcb},
 177                                        {0x14, 0xcc}, {0xec, 0xcd},
 178                                        {0x32, 0xce}, {0xdd, 0xcf},
 179                                        {0x32, 0xd0}, {0xdd, 0xd1},
 180                                        {0x6a, 0xd2}, {0x50, 0xd3},
 181                                        {0x60, 0xd4}, {0x00, 0xd5},
 182                                        {0x00, 0xd6});
 183
 184                 err += sn9c102_i2c_write(cam, 0x12, 0x80);
 185                 err += sn9c102_i2c_write(cam, 0x12, 0x48);
 186                 err += sn9c102_i2c_write(cam, 0x01, 0x80);
 187                 err += sn9c102_i2c_write(cam, 0x02, 0x80);
 188                 err += sn9c102_i2c_write(cam, 0x03, 0x80);
 189                 err += sn9c102_i2c_write(cam, 0x04, 0x10);
 190                 err += sn9c102_i2c_write(cam, 0x05, 0x20);
 191                 err += sn9c102_i2c_write(cam, 0x06, 0x80);
 192                 err += sn9c102_i2c_write(cam, 0x11, 0x00);
 193                 err += sn9c102_i2c_write(cam, 0x0c, 0x20);
 194                 err += sn9c102_i2c_write(cam, 0x0d, 0x20);
 195                 err += sn9c102_i2c_write(cam, 0x15, 0x80);
 196                 err += sn9c102_i2c_write(cam, 0x16, 0x03);
 197                 err += sn9c102_i2c_write(cam, 0x17, 0x1b);
 198                 err += sn9c102_i2c_write(cam, 0x18, 0xbd);
 199                 err += sn9c102_i2c_write(cam, 0x19, 0x05);
 200                 err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
 201                 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
 202                 err += sn9c102_i2c_write(cam, 0x21, 0x1b);
 203                 err += sn9c102_i2c_write(cam, 0x22, 0x00);
 204                 err += sn9c102_i2c_write(cam, 0x23, 0xde);
 205                 err += sn9c102_i2c_write(cam, 0x24, 0x10);
 206                 err += sn9c102_i2c_write(cam, 0x25, 0x8a);
 207                 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
 208                 err += sn9c102_i2c_write(cam, 0x27, 0xca);
 209                 err += sn9c102_i2c_write(cam, 0x28, 0xa2);
 210                 err += sn9c102_i2c_write(cam, 0x29, 0x74);
 211                 err += sn9c102_i2c_write(cam, 0x2a, 0x88);
 212                 err += sn9c102_i2c_write(cam, 0x2b, 0x34);
 213                 err += sn9c102_i2c_write(cam, 0x2c, 0x88);
 214                 err += sn9c102_i2c_write(cam, 0x2e, 0x00);
 215                 err += sn9c102_i2c_write(cam, 0x2f, 0x00);
 216                 err += sn9c102_i2c_write(cam, 0x30, 0x00);
 217                 err += sn9c102_i2c_write(cam, 0x32, 0xc2);
 218                 err += sn9c102_i2c_write(cam, 0x33, 0x08);
 219                 err += sn9c102_i2c_write(cam, 0x4c, 0x40);
 220                 err += sn9c102_i2c_write(cam, 0x4d, 0xf3);
 221                 err += sn9c102_i2c_write(cam, 0x60, 0x05);
 222                 err += sn9c102_i2c_write(cam, 0x61, 0x40);
 223                 err += sn9c102_i2c_write(cam, 0x62, 0x12);
 224                 err += sn9c102_i2c_write(cam, 0x63, 0x57);
 225                 err += sn9c102_i2c_write(cam, 0x64, 0x73);
 226                 err += sn9c102_i2c_write(cam, 0x65, 0x00);
 227                 err += sn9c102_i2c_write(cam, 0x66, 0x55);
 228                 err += sn9c102_i2c_write(cam, 0x67, 0x01);
 229                 err += sn9c102_i2c_write(cam, 0x68, 0xac);
 230                 err += sn9c102_i2c_write(cam, 0x69, 0x38);
 231                 err += sn9c102_i2c_write(cam, 0x6f, 0x1f);
 232                 err += sn9c102_i2c_write(cam, 0x70, 0x01);
 233                 err += sn9c102_i2c_write(cam, 0x71, 0x00);
 234                 err += sn9c102_i2c_write(cam, 0x72, 0x10);
 235                 err += sn9c102_i2c_write(cam, 0x73, 0x50);
 236                 err += sn9c102_i2c_write(cam, 0x74, 0x20);
 237                 err += sn9c102_i2c_write(cam, 0x76, 0x01);
 238                 err += sn9c102_i2c_write(cam, 0x77, 0xf3);
 239                 err += sn9c102_i2c_write(cam, 0x78, 0x90);
 240                 err += sn9c102_i2c_write(cam, 0x79, 0x98);
 241                 err += sn9c102_i2c_write(cam, 0x7a, 0x98);
 242                 err += sn9c102_i2c_write(cam, 0x7b, 0x00);
 243                 err += sn9c102_i2c_write(cam, 0x7c, 0x38);
 244                 err += sn9c102_i2c_write(cam, 0x7d, 0xff);
 245                 break;
 246         default:
 247                 break;
 248         }
 249
 250         return err;
 251 }
 252
 253
 254 static int ov7630_get_ctrl(struct sn9c102_device* cam,
 255                            struct v4l2_control* ctrl)
 256 {
 257         enum sn9c102_bridge bridge = sn9c102_get_bridge(cam);
 258         int err = 0;
 259
 260         switch (ctrl->id) {
 261         case V4L2_CID_EXPOSURE:
 262                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
 263                         return -EIO;
 264                 break;
 265         case V4L2_CID_RED_BALANCE:
 266                 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
 267                         ctrl->value = sn9c102_pread_reg(cam, 0x05);
 268                 else
 269                         ctrl->value = sn9c102_pread_reg(cam, 0x07);
 270                 break;
 271         case V4L2_CID_BLUE_BALANCE:
 272                 ctrl->value = sn9c102_pread_reg(cam, 0x06);
 273                 break;
 274         case SN9C102_V4L2_CID_GREEN_BALANCE:
 275                 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
 276                         ctrl->value = sn9c102_pread_reg(cam, 0x07);
 277                 else
 278                         ctrl->value = sn9c102_pread_reg(cam, 0x05);
 279                 break;
 280                 break;
 281         case V4L2_CID_GAIN:
 282                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
 283                         return -EIO;
 284                 ctrl->value &= 0x3f;
 285                 break;
 286         case V4L2_CID_DO_WHITE_BALANCE:
 287                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
 288                         return -EIO;
 289                 ctrl->value &= 0x3f;
 290                 break;
 291         case V4L2_CID_WHITENESS:
 292                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x0d)) < 0)
 293                         return -EIO;
 294                 ctrl->value &= 0x3f;
 295                 break;
 296         case V4L2_CID_AUTOGAIN:
 297                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
 298                         return -EIO;
 299                 ctrl->value &= 0x01;
 300                 break;
 301         case V4L2_CID_VFLIP:
 302                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x75)) < 0)
 303                         return -EIO;
 304                 ctrl->value = (ctrl->value & 0x80) ? 1 : 0;
 305                 break;
 306         case SN9C102_V4L2_CID_GAMMA:
 307                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x14)) < 0)
 308                         return -EIO;
 309                 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
 310                 break;
 311         case SN9C102_V4L2_CID_BAND_FILTER:
 312                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x2d)) < 0)
 313                         return -EIO;
 314                 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
 315                 break;
 316         default:
 317                 return -EINVAL;
 318         }
 319
 320         return err ? -EIO : 0;
 321 }
 322
 323
 324 static int ov7630_set_ctrl(struct sn9c102_device* cam,
 325                            const struct v4l2_control* ctrl)
 326 {
 327         enum sn9c102_bridge bridge = sn9c102_get_bridge(cam);
 328         int err = 0;
 329
 330         switch (ctrl->id) {
 331         case V4L2_CID_EXPOSURE:
 332                 err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
 333                 break;
 334         case V4L2_CID_RED_BALANCE:
 335                 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
 336                         err += sn9c102_write_reg(cam, ctrl->value, 0x05);
 337                 else
 338                         err += sn9c102_write_reg(cam, ctrl->value, 0x07);
 339                 break;
 340         case V4L2_CID_BLUE_BALANCE:
 341                 err += sn9c102_write_reg(cam, ctrl->value, 0x06);
 342                 break;
 343         case SN9C102_V4L2_CID_GREEN_BALANCE:
 344                 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
 345                         err += sn9c102_write_reg(cam, ctrl->value, 0x07);
 346                 else
 347                         err += sn9c102_write_reg(cam, ctrl->value, 0x05);
 348                 break;
 349         case V4L2_CID_GAIN:
 350                 err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
 351                 break;
 352         case V4L2_CID_DO_WHITE_BALANCE:
 353                 err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
 354                 break;
 355         case V4L2_CID_WHITENESS:
 356                 err += sn9c102_i2c_write(cam, 0x0d, ctrl->value);
 357                 break;
 358         case V4L2_CID_AUTOGAIN:
 359                 err += sn9c102_i2c_write(cam, 0x13, ctrl->value |
 360                                                     (ctrl->value << 1));
 361                 break;
 362         case V4L2_CID_VFLIP:
 363                 err += sn9c102_i2c_write(cam, 0x75, 0x0e | (ctrl->value << 7));
 364                 break;
 365         case SN9C102_V4L2_CID_GAMMA:
 366                 err += sn9c102_i2c_write(cam, 0x14, ctrl->value << 2);
 367                 break;
 368         case SN9C102_V4L2_CID_BAND_FILTER:
 369                 err += sn9c102_i2c_write(cam, 0x2d, ctrl->value << 2);
 370                 break;
 371         default:
 372                 return -EINVAL;
 373         }
 374
 375         return err ? -EIO : 0;
 376 }
 377
 378
 379 static int ov7630_set_crop(struct sn9c102_device* cam,
 380                            const struct v4l2_rect* rect)
 381 {
 382         struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
 383         int err = 0;
 384         u8 h_start = 0, v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
 385
 386         switch (sn9c102_get_bridge(cam)) {
 387         case BRIDGE_SN9C101:
 388         case BRIDGE_SN9C102:
 389         case BRIDGE_SN9C103:
 390                 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1;
 391                 break;
 392         case BRIDGE_SN9C105:
 393         case BRIDGE_SN9C120:
 394                 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4;
 395                 break;
 396         default:
 397                 break;
 398         }
 399
 400         err += sn9c102_write_reg(cam, h_start, 0x12);
 401         err += sn9c102_write_reg(cam, v_start, 0x13);
 402
 403         return err;
 404 }
 405
 406
 407 static int ov7630_set_pix_format(struct sn9c102_device* cam,
 408                                  const struct v4l2_pix_format* pix)
 409 {
 410         int err = 0;
 411
 412         switch (sn9c102_get_bridge(cam)) {
 413         case BRIDGE_SN9C101:
 414         case BRIDGE_SN9C102:
 415         case BRIDGE_SN9C103:
 416                 if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8)
 417                         err += sn9c102_write_reg(cam, 0x50, 0x19);
 418                 else
 419                         err += sn9c102_write_reg(cam, 0x20, 0x19);
 420                 break;
 421         case BRIDGE_SN9C105:
 422         case BRIDGE_SN9C120:
 423                 if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8) {
 424                         err += sn9c102_write_reg(cam, 0xe5, 0x17);
 425                         err += sn9c102_i2c_write(cam, 0x11, 0x04);
 426                 } else {
 427                         err += sn9c102_write_reg(cam, 0xe2, 0x17);
 428                         err += sn9c102_i2c_write(cam, 0x11, 0x02);
 429                 }
 430                 break;
 431         default:
 432                 break;
 433         }
 434
 435         return err;
 436 }
 437
 438
 439 static const struct sn9c102_sensor ov7630 = {
 440         .name = "OV7630",
 441         .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
 442         .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103 |
 443                             BRIDGE_SN9C105 | BRIDGE_SN9C120,
 444         .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
 445         .frequency = SN9C102_I2C_100KHZ,
 446         .interface = SN9C102_I2C_2WIRES,
 447         .i2c_slave_id = 0x21,
 448         .init = &ov7630_init,
 449         .qctrl = {
 450                 {
 451                         .id = V4L2_CID_GAIN,
 452                         .type = V4L2_CTRL_TYPE_INTEGER,
 453                         .name = "global gain",
 454                         .minimum = 0x00,
 455                         .maximum = 0x3f,
 456                         .step = 0x01,
 457                         .default_value = 0x14,
 458                         .flags = 0,
 459                 },
 460                 {
 461                         .id = V4L2_CID_EXPOSURE,
 462                         .type = V4L2_CTRL_TYPE_INTEGER,
 463                         .name = "exposure",
 464                         .minimum = 0x00,
 465                         .maximum = 0xff,
 466                         .step = 0x01,
 467                         .default_value = 0x60,
 468                         .flags = 0,
 469                 },
 470                 {
 471                         .id = V4L2_CID_WHITENESS,
 472                         .type = V4L2_CTRL_TYPE_INTEGER,
 473                         .name = "white balance background: red",
 474                         .minimum = 0x00,
 475                         .maximum = 0x3f,
 476                         .step = 0x01,
 477                         .default_value = 0x20,
 478                         .flags = 0,
 479                 },
 480                 {
 481                         .id = V4L2_CID_DO_WHITE_BALANCE,
 482                         .type = V4L2_CTRL_TYPE_INTEGER,
 483                         .name = "white balance background: blue",
 484                         .minimum = 0x00,
 485                         .maximum = 0x3f,
 486                         .step = 0x01,
 487                         .default_value = 0x20,
 488                         .flags = 0,
 489                 },
 490                 {
 491                         .id = V4L2_CID_RED_BALANCE,
 492                         .type = V4L2_CTRL_TYPE_INTEGER,
 493                         .name = "red balance",
 494                         .minimum = 0x00,
 495                         .maximum = 0x7f,
 496                         .step = 0x01,
 497                         .default_value = 0x20,
 498                         .flags = 0,
 499                 },
 500                 {
 501                         .id = V4L2_CID_BLUE_BALANCE,
 502                         .type = V4L2_CTRL_TYPE_INTEGER,
 503                         .name = "blue balance",
 504                         .minimum = 0x00,
 505                         .maximum = 0x7f,
 506                         .step = 0x01,
 507                         .default_value = 0x20,
 508                         .flags = 0,
 509                 },
 510                 {
 511                         .id = V4L2_CID_AUTOGAIN,
 512                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 513                         .name = "auto adjust",
 514                         .minimum = 0x00,
 515                         .maximum = 0x01,
 516                         .step = 0x01,
 517                         .default_value = 0x00,
 518                         .flags = 0,
 519                 },
 520                 {
 521                         .id = V4L2_CID_VFLIP,
 522                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 523                         .name = "vertical flip",
 524                         .minimum = 0x00,
 525                         .maximum = 0x01,
 526                         .step = 0x01,
 527                         .default_value = 0x01,
 528                         .flags = 0,
 529                 },
 530                 {
 531                         .id = SN9C102_V4L2_CID_GREEN_BALANCE,
 532                         .type = V4L2_CTRL_TYPE_INTEGER,
 533                         .name = "green balance",
 534                         .minimum = 0x00,
 535                         .maximum = 0x7f,
 536                         .step = 0x01,
 537                         .default_value = 0x20,
 538                         .flags = 0,
 539                 },
 540                 {
 541                         .id = SN9C102_V4L2_CID_BAND_FILTER,
 542                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 543                         .name = "band filter",
 544                         .minimum = 0x00,
 545                         .maximum = 0x01,
 546                         .step = 0x01,
 547                         .default_value = 0x00,
 548                         .flags = 0,
 549                 },
 550                 {
 551                         .id = SN9C102_V4L2_CID_GAMMA,
 552                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 553                         .name = "rgb gamma",
 554                         .minimum = 0x00,
 555                         .maximum = 0x01,
 556                         .step = 0x01,
 557                         .default_value = 0x00,
 558                         .flags = 0,
 559                 },
 560         },
 561         .get_ctrl = &ov7630_get_ctrl,
 562         .set_ctrl = &ov7630_set_ctrl,
 563         .cropcap = {
 564                 .bounds = {
 565                         .left = 0,
 566                         .top = 0,
 567                         .width = 640,
 568                         .height = 480,
 569                 },
 570                 .defrect = {
 571                         .left = 0,
 572                         .top = 0,
 573                         .width = 640,
 574                         .height = 480,
 575                 },
 576         },
 577         .set_crop = &ov7630_set_crop,
 578         .pix_format = {
 579                 .width = 640,
 580                 .height = 480,
 581                 .pixelformat = V4L2_PIX_FMT_SN9C10X,
 582                 .priv = 8,
 583         },
 584         .set_pix_format = &ov7630_set_pix_format
 585 };
 586
 587
 588 int sn9c102_probe_ov7630(struct sn9c102_device* cam)
 589 {
 590         int pid, ver, err = 0;
 591
 592         switch (sn9c102_get_bridge(cam)) {
 593         case BRIDGE_SN9C101:
 594         case BRIDGE_SN9C102:
 595                 err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01},
 596                                                {0x28, 0x17});
 597                 break;
 598         case BRIDGE_SN9C103: /* do _not_ change anything! */
 599                 err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x42, 0x01},
 600                                                {0x28, 0x17}, {0x44, 0x02});
 601                 pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
 602                 if (err || pid < 0) /* try a different initialization */
 603                         err += sn9c102_write_const_regs(cam, {0x01, 0x01},
 604                                                         {0x00, 0x01});
 605                 break;
 606         case BRIDGE_SN9C105:
 607         case BRIDGE_SN9C120:
 608                 err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1},
 609                                                {0x29, 0x01}, {0x74, 0x02},
 610                                                {0x0e, 0x01}, {0x44, 0x01});
 611                 break;
 612         default:
 613                 break;
 614         }
 615
 616         pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
 617         ver = sn9c102_i2c_try_read(cam, &ov7630, 0x0b);
 618         if (err || pid < 0 || ver < 0)
 619                 return -EIO;
 620         if (pid != 0x76 || ver != 0x31)
 621                 return -ENODEV;
 622         sn9c102_attach_sensor(cam, &ov7630);
 623
 624         return 0;
 625 }