4 /* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
6 #include <linux/agp_backend.h>
9 #ifdef CONFIG_FB_INTEL_I2C
10 #include <linux/i2c.h>
11 #include <linux/i2c-algo-bit.h>
14 /*** Version/name ***/
15 #define INTELFB_VERSION "0.9.6"
16 #define INTELFB_MODULE_NAME "intelfb"
17 #define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM"
20 /*** Debug/feature defines ***/
34 #ifndef DETECT_VGA_CLASS_ONLY
35 #define DETECT_VGA_CLASS_ONLY 1
38 #ifndef ALLOCATE_FOR_PANNING
39 #define ALLOCATE_FOR_PANNING 1
42 #ifndef PREFERRED_MODE
43 #define PREFERRED_MODE "1024x768-32@70"
46 /*** hw-related values ***/
48 /* Resource Allocation */
49 #define INTELFB_FB_ACQUIRED 1
50 #define INTELFB_MMIO_ACQUIRED 2
52 /* PCI ids for supported devices */
53 #define PCI_DEVICE_ID_INTEL_830M 0x3577
54 #define PCI_DEVICE_ID_INTEL_845G 0x2562
55 #define PCI_DEVICE_ID_INTEL_85XGM 0x3582
56 #define PCI_DEVICE_ID_INTEL_865G 0x2572
57 #define PCI_DEVICE_ID_INTEL_915G 0x2582
58 #define PCI_DEVICE_ID_INTEL_915GM 0x2592
59 #define PCI_DEVICE_ID_INTEL_945G 0x2772
60 #define PCI_DEVICE_ID_INTEL_945GM 0x27A2
61 #define PCI_DEVICE_ID_INTEL_945GME 0x27AE
62 #define PCI_DEVICE_ID_INTEL_965G 0x29A2
63 #define PCI_DEVICE_ID_INTEL_965GM 0x2A02
65 /* Size of MMIO region */
66 #define INTEL_REG_SIZE 0x80000
68 #define STRIDE_ALIGNMENT 16
69 #define STRIDE_ALIGNMENT_I9XX 64
71 #define PALETTE_8_ENTRIES 256
76 /* basic arithmetic */
77 #define KB(x) ((x) * 1024)
78 #define MB(x) ((x) * 1024 * 1024)
79 #define BtoKB(x) ((x) / 1024)
80 #define BtoMB(x) ((x) / 1024 / 1024)
82 #define GTT_PAGE_SIZE KB(4)
84 #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
85 #define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
86 #define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
87 #define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
90 #define PFX INTELFB_MODULE_NAME ": "
92 #define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
93 #define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
94 #define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
95 #define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
97 #define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
99 #define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
102 /* get commonly used pointers */
103 #define GET_DINFO(info) (info)->par
106 #define ACCEL(d, i) \
107 ((d)->accel && !(d)->ring_lockup && \
108 ((i)->var.accel_flags & FB_ACCELF_TEXT))
110 /*#define NOACCEL_CHIPSET(d) \
111 ((d)->chipset != INTEL_865G)*/
112 #define NOACCEL_CHIPSET(d) \
115 #define FIXED_MODE(d) ((d)->fixed_mode)
117 /*** Driver parameters ***/
119 #define RINGBUFFER_SIZE KB(64)
120 #define HW_CURSOR_SIZE KB(4)
122 /* Intel agpgart driver */
123 #define AGP_PHYSICAL_MEMORY 2
125 /* store information about an Ixxx DVO */
126 /* The i830->i865 use multiple DVOs with multiple i2cs */
127 /* the i915, i945 have a single sDVO i2c bus - which is different */
128 #define MAX_OUTPUTS 6
130 /* these are outputs from the chip - integrated only
131 external chips are via DVO or SDVO output */
132 #define INTELFB_OUTPUT_UNUSED 0
133 #define INTELFB_OUTPUT_ANALOG 1
134 #define INTELFB_OUTPUT_DVO 2
135 #define INTELFB_OUTPUT_SDVO 3
136 #define INTELFB_OUTPUT_LVDS 4
137 #define INTELFB_OUTPUT_TVOUT 5
139 #define INTELFB_DVO_CHIP_NONE 0
140 #define INTELFB_DVO_CHIP_LVDS 1
141 #define INTELFB_DVO_CHIP_TMDS 2
142 #define INTELFB_DVO_CHIP_TVOUT 4
144 #define INTELFB_OUTPUT_PIPE_NC 0
145 #define INTELFB_OUTPUT_PIPE_A 1
146 #define INTELFB_OUTPUT_PIPE_B 2
150 /* supported chipsets */
169 struct intelfb_hwstate {
179 u32 palette_a[PALETTE_8_ENTRIES];
180 u32 palette_b[PALETTE_8_ENTRIES];
208 u32 cursor_a_control;
209 u32 cursor_b_control;
217 u32 cursor_a_palette[4];
218 u32 cursor_b_palette[4];
237 struct intelfb_heap_data {
240 u32 offset; /* in GATT pages */
241 u32 size; /* in bytes */
244 #ifdef CONFIG_FB_INTEL_I2C
245 struct intelfb_i2c_chan {
246 struct intelfb_info *dinfo;
248 struct i2c_adapter adapter;
249 struct i2c_algo_bit_data algo;
253 struct intelfb_output_rec {
258 #ifdef CONFIG_FB_INTEL_I2C
259 struct intelfb_i2c_chan i2c_bus;
260 struct intelfb_i2c_chan ddc_bus;
264 struct intelfb_vsync {
265 wait_queue_head_t wait;
271 struct intelfb_info {
272 struct fb_info *info;
273 struct fb_ops *fbops;
274 struct pci_dev *pdev;
276 struct intelfb_hwstate save_state;
278 /* agpgart structs */
279 struct agp_memory *gtt_fb_mem; /* use all stolen memory or vram */
280 struct agp_memory *gtt_ring_mem; /* ring buffer */
281 struct agp_memory *gtt_cursor_mem; /* hw cursor */
283 /* use a gart reserved fb mem */
291 struct intelfb_heap_data aperture;
292 struct intelfb_heap_data fb;
293 struct intelfb_heap_data ring;
294 struct intelfb_heap_data cursor;
298 u8 __iomem *mmio_base;
300 /* fb start offset (in bytes) */
311 u32 pseudo_palette[16];
322 int xres, yres, pitch;
334 unsigned long irq_flags;
338 struct intelfb_vsync vsync;
346 /* initial parameters */
348 struct fb_var_screeninfo initial_var;
350 u32 initial_video_ram;
353 /* driver registered */
356 /* index into plls */
361 struct intelfb_output_rec output[MAX_OUTPUTS];
364 #define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G) || \
365 ((dinfo)->chipset == INTEL_915GM) || \
366 ((dinfo)->chipset == INTEL_945G) || \
367 ((dinfo)->chipset == INTEL_945GM) || \
368 ((dinfo)->chipset == INTEL_945GME) || \
369 ((dinfo)->chipset == INTEL_965G) || \
370 ((dinfo)->chipset == INTEL_965GM))
372 #ifndef FBIO_WAITFORVSYNC
373 #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32)
376 /*** function prototypes ***/
378 extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
380 #ifdef CONFIG_FB_INTEL_I2C
381 extern void intelfb_create_i2c_busses(struct intelfb_info *dinfo);
382 extern void intelfb_delete_i2c_busses(struct intelfb_info *dinfo);
385 #endif /* _INTELFB_H */