2 * File: arch/blackfin/kernel/bfin_gpio.c
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
7 * Description: GPIO Abstraction Layer
10 * Copyright 2008 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
33 * GPIO_0 PF0 PF0 PF0 PA0...PJ13
43 * GPIO_10 PF10 PF10 PF10
44 * GPIO_11 PF11 PF11 PF11
45 * GPIO_12 PF12 PF12 PF12
46 * GPIO_13 PF13 PF13 PF13
47 * GPIO_14 PF14 PF14 PF14
48 * GPIO_15 PF15 PF15 PF15
83 #include <linux/delay.h>
84 #include <linux/module.h>
85 #include <linux/err.h>
86 #include <linux/proc_fs.h>
87 #include <asm/blackfin.h>
89 #include <asm/portmux.h>
90 #include <linux/irq.h>
92 #if ANOMALY_05000311 || ANOMALY_05000323
95 AWA_data_clear = SYSCR,
99 AWA_maska_clear = UART_SCR,
100 AWA_maska_set = UART_SCR,
101 AWA_maska_toggle = UART_SCR,
102 AWA_maskb = UART_GCTL,
103 AWA_maskb_clear = UART_GCTL,
104 AWA_maskb_set = UART_GCTL,
105 AWA_maskb_toggle = UART_GCTL,
106 AWA_dir = SPORT1_STAT,
107 AWA_polar = SPORT1_STAT,
108 AWA_edge = SPORT1_STAT,
109 AWA_both = SPORT1_STAT,
111 AWA_inen = TIMER_ENABLE,
112 #elif ANOMALY_05000323
113 AWA_inen = DMA1_1_CONFIG,
116 /* Anomaly Workaround */
117 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
119 #define AWA_DUMMY_READ(...) do { } while (0)
123 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
124 (struct gpio_port_t *) FIO_FLAG_D,
128 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
129 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
130 (struct gpio_port_t *) PORTFIO,
131 (struct gpio_port_t *) PORTGIO,
132 (struct gpio_port_t *) PORTHIO,
135 static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
136 (unsigned short *) PORTF_FER,
137 (unsigned short *) PORTG_FER,
138 (unsigned short *) PORTH_FER,
143 static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
144 (unsigned short *) PORTF_MUX,
145 (unsigned short *) PORTG_MUX,
146 (unsigned short *) PORTH_MUX,
150 u8 pmux_offset[][16] =
151 {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
152 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
153 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
158 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
159 (struct gpio_port_t *) FIO0_FLAG_D,
160 (struct gpio_port_t *) FIO1_FLAG_D,
161 (struct gpio_port_t *) FIO2_FLAG_D,
166 static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
167 (struct gpio_port_t *)PORTA_FER,
168 (struct gpio_port_t *)PORTB_FER,
169 (struct gpio_port_t *)PORTC_FER,
170 (struct gpio_port_t *)PORTD_FER,
171 (struct gpio_port_t *)PORTE_FER,
172 (struct gpio_port_t *)PORTF_FER,
173 (struct gpio_port_t *)PORTG_FER,
174 (struct gpio_port_t *)PORTH_FER,
175 (struct gpio_port_t *)PORTI_FER,
176 (struct gpio_port_t *)PORTJ_FER,
180 static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
181 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
183 #define RESOURCE_LABEL_SIZE 16
185 static struct str_ident {
186 char name[RESOURCE_LABEL_SIZE];
187 } str_ident[MAX_RESOURCES];
189 #if defined(CONFIG_PM) && !defined(CONFIG_BF54x)
190 static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
191 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
192 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
195 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
199 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
203 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
207 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
210 #endif /* CONFIG_PM */
212 #if defined(BF548_FAMILY)
213 inline int check_gpio(unsigned gpio)
215 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
216 || gpio == GPIO_PH14 || gpio == GPIO_PH15
217 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
218 || gpio > MAX_BLACKFIN_GPIOS)
223 inline int check_gpio(unsigned gpio)
225 if (gpio >= MAX_BLACKFIN_GPIOS)
231 void gpio_error(unsigned gpio)
233 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
236 static void set_label(unsigned short ident, const char *label)
238 if (label && str_ident) {
239 strncpy(str_ident[ident].name, label,
240 RESOURCE_LABEL_SIZE);
241 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
245 static char *get_label(unsigned short ident)
250 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
253 static int cmp_label(unsigned short ident, const char *label)
257 printk(KERN_ERR "Please provide none-null label\n");
260 if (label && str_ident)
261 return strncmp(str_ident[ident].name,
262 label, strlen(label));
267 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
268 static void port_setup(unsigned gpio, unsigned short usage)
270 if (!check_gpio(gpio)) {
271 if (usage == GPIO_USAGE)
272 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
274 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
278 #elif defined(BF548_FAMILY)
279 static void port_setup(unsigned gpio, unsigned short usage)
281 if (usage == GPIO_USAGE)
282 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
284 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
288 # define port_setup(...) do { } while (0)
294 unsigned short offset;
296 {.res = P_PPI0_D13, .offset = 11},
297 {.res = P_PPI0_D14, .offset = 11},
298 {.res = P_PPI0_D15, .offset = 11},
299 {.res = P_SPORT1_TFS, .offset = 11},
300 {.res = P_SPORT1_TSCLK, .offset = 11},
301 {.res = P_SPORT1_DTPRI, .offset = 11},
302 {.res = P_PPI0_D10, .offset = 10},
303 {.res = P_PPI0_D11, .offset = 10},
304 {.res = P_PPI0_D12, .offset = 10},
305 {.res = P_SPORT1_RSCLK, .offset = 10},
306 {.res = P_SPORT1_RFS, .offset = 10},
307 {.res = P_SPORT1_DRPRI, .offset = 10},
308 {.res = P_PPI0_D8, .offset = 9},
309 {.res = P_PPI0_D9, .offset = 9},
310 {.res = P_SPORT1_DRSEC, .offset = 9},
311 {.res = P_SPORT1_DTSEC, .offset = 9},
312 {.res = P_TMR2, .offset = 8},
313 {.res = P_PPI0_FS3, .offset = 8},
314 {.res = P_TMR3, .offset = 7},
315 {.res = P_SPI0_SSEL4, .offset = 7},
316 {.res = P_TMR4, .offset = 6},
317 {.res = P_SPI0_SSEL5, .offset = 6},
318 {.res = P_TMR5, .offset = 5},
319 {.res = P_SPI0_SSEL6, .offset = 5},
320 {.res = P_UART1_RX, .offset = 4},
321 {.res = P_UART1_TX, .offset = 4},
322 {.res = P_TMR6, .offset = 4},
323 {.res = P_TMR7, .offset = 4},
324 {.res = P_UART0_RX, .offset = 3},
325 {.res = P_UART0_TX, .offset = 3},
326 {.res = P_DMAR0, .offset = 3},
327 {.res = P_DMAR1, .offset = 3},
328 {.res = P_SPORT0_DTSEC, .offset = 1},
329 {.res = P_SPORT0_DRSEC, .offset = 1},
330 {.res = P_CAN0_RX, .offset = 1},
331 {.res = P_CAN0_TX, .offset = 1},
332 {.res = P_SPI0_SSEL7, .offset = 1},
333 {.res = P_SPORT0_TFS, .offset = 0},
334 {.res = P_SPORT0_DTPRI, .offset = 0},
335 {.res = P_SPI0_SSEL2, .offset = 0},
336 {.res = P_SPI0_SSEL3, .offset = 0},
339 static void portmux_setup(unsigned short per, unsigned short function)
341 u16 y, offset, muxreg;
343 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
344 if (port_mux_lut[y].res == per) {
346 /* SET PORTMUX REG */
348 offset = port_mux_lut[y].offset;
349 muxreg = bfin_read_PORT_MUX();
352 muxreg &= ~(1 << offset);
357 muxreg |= (function << offset);
358 bfin_write_PORT_MUX(muxreg);
362 #elif defined(BF548_FAMILY)
363 inline void portmux_setup(unsigned short portno, unsigned short function)
367 pmux = gpio_array[gpio_bank(portno)]->port_mux;
369 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
370 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
372 gpio_array[gpio_bank(portno)]->port_mux = pmux;
375 inline u16 get_portmux(unsigned short portno)
379 pmux = gpio_array[gpio_bank(portno)]->port_mux;
381 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
383 #elif defined(BF527_FAMILY)
384 inline void portmux_setup(unsigned short portno, unsigned short function)
386 u16 pmux, ident = P_IDENT(portno);
387 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
389 pmux = *port_mux[gpio_bank(ident)];
390 pmux &= ~(3 << offset);
391 pmux |= (function & 3) << offset;
392 *port_mux[gpio_bank(ident)] = pmux;
396 # define portmux_setup(...) do { } while (0)
400 static void default_gpio(unsigned gpio)
402 unsigned short bank, bitmask;
405 bank = gpio_bank(gpio);
406 bitmask = gpio_bit(gpio);
408 local_irq_save(flags);
410 gpio_bankb[bank]->maska_clear = bitmask;
411 gpio_bankb[bank]->maskb_clear = bitmask;
413 gpio_bankb[bank]->inen &= ~bitmask;
414 gpio_bankb[bank]->dir &= ~bitmask;
415 gpio_bankb[bank]->polar &= ~bitmask;
416 gpio_bankb[bank]->both &= ~bitmask;
417 gpio_bankb[bank]->edge &= ~bitmask;
418 AWA_DUMMY_READ(edge);
419 local_irq_restore(flags);
422 # define default_gpio(...) do { } while (0)
425 static int __init bfin_gpio_init(void)
428 printk(KERN_INFO "Blackfin GPIO Controller\n");
433 arch_initcall(bfin_gpio_init);
437 /***********************************************************
439 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
442 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
445 * DESCRIPTION: These functions abstract direct register access
446 * to Blackfin processor General Purpose
449 * CAUTION: These functions do not belong to the GPIO Driver API
450 *************************************************************
451 * MODIFICATION HISTORY :
452 **************************************************************/
454 /* Set a specific bit */
456 #define SET_GPIO(name) \
457 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
459 unsigned long flags; \
460 local_irq_save(flags); \
462 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
464 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
465 AWA_DUMMY_READ(name); \
466 local_irq_restore(flags); \
468 EXPORT_SYMBOL(set_gpio_ ## name);
477 #if ANOMALY_05000311 || ANOMALY_05000323
478 #define SET_GPIO_SC(name) \
479 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
481 unsigned long flags; \
482 local_irq_save(flags); \
484 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
486 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
487 AWA_DUMMY_READ(name); \
488 local_irq_restore(flags); \
490 EXPORT_SYMBOL(set_gpio_ ## name);
492 #define SET_GPIO_SC(name) \
493 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
496 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
498 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
500 EXPORT_SYMBOL(set_gpio_ ## name);
507 #if ANOMALY_05000311 || ANOMALY_05000323
508 void set_gpio_toggle(unsigned gpio)
511 local_irq_save(flags);
512 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
513 AWA_DUMMY_READ(toggle);
514 local_irq_restore(flags);
517 void set_gpio_toggle(unsigned gpio)
519 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
522 EXPORT_SYMBOL(set_gpio_toggle);
525 /*Set current PORT date (16-bit word)*/
527 #if ANOMALY_05000311 || ANOMALY_05000323
528 #define SET_GPIO_P(name) \
529 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
531 unsigned long flags; \
532 local_irq_save(flags); \
533 gpio_bankb[gpio_bank(gpio)]->name = arg; \
534 AWA_DUMMY_READ(name); \
535 local_irq_restore(flags); \
537 EXPORT_SYMBOL(set_gpiop_ ## name);
539 #define SET_GPIO_P(name) \
540 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
542 gpio_bankb[gpio_bank(gpio)]->name = arg; \
544 EXPORT_SYMBOL(set_gpiop_ ## name);
556 /* Get a specific bit */
557 #if ANOMALY_05000311 || ANOMALY_05000323
558 #define GET_GPIO(name) \
559 unsigned short get_gpio_ ## name(unsigned gpio) \
561 unsigned long flags; \
562 unsigned short ret; \
563 local_irq_save(flags); \
564 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
565 AWA_DUMMY_READ(name); \
566 local_irq_restore(flags); \
569 EXPORT_SYMBOL(get_gpio_ ## name);
571 #define GET_GPIO(name) \
572 unsigned short get_gpio_ ## name(unsigned gpio) \
574 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
576 EXPORT_SYMBOL(get_gpio_ ## name);
588 /*Get current PORT date (16-bit word)*/
590 #if ANOMALY_05000311 || ANOMALY_05000323
591 #define GET_GPIO_P(name) \
592 unsigned short get_gpiop_ ## name(unsigned gpio) \
594 unsigned long flags; \
595 unsigned short ret; \
596 local_irq_save(flags); \
597 ret = (gpio_bankb[gpio_bank(gpio)]->name); \
598 AWA_DUMMY_READ(name); \
599 local_irq_restore(flags); \
602 EXPORT_SYMBOL(get_gpiop_ ## name);
604 #define GET_GPIO_P(name) \
605 unsigned short get_gpiop_ ## name(unsigned gpio) \
607 return (gpio_bankb[gpio_bank(gpio)]->name);\
609 EXPORT_SYMBOL(get_gpiop_ ## name);
623 /***********************************************************
625 * FUNCTIONS: Blackfin PM Setup API
628 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
636 * DESCRIPTION: Blackfin PM Driver API
639 *************************************************************
640 * MODIFICATION HISTORY :
641 **************************************************************/
642 int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
646 if ((check_gpio(gpio) < 0) || !type)
649 local_irq_save(flags);
650 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
651 wakeup_flags_map[gpio] = type;
652 local_irq_restore(flags);
656 EXPORT_SYMBOL(gpio_pm_wakeup_request);
658 void gpio_pm_wakeup_free(unsigned gpio)
662 if (check_gpio(gpio) < 0)
665 local_irq_save(flags);
667 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
669 local_irq_restore(flags);
671 EXPORT_SYMBOL(gpio_pm_wakeup_free);
673 static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
675 port_setup(gpio, GPIO_USAGE);
676 set_gpio_dir(gpio, 0);
677 set_gpio_inen(gpio, 1);
679 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
680 set_gpio_edge(gpio, 1);
682 set_gpio_edge(gpio, 0);
684 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
685 set_gpio_both(gpio, 1);
687 set_gpio_both(gpio, 0);
689 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
690 set_gpio_polar(gpio, 1);
692 set_gpio_polar(gpio, 0);
699 u32 bfin_pm_setup(void)
701 u16 bank, mask, i, gpio;
703 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
704 mask = wakeup_map[gpio_bank(i)];
707 gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
708 gpio_bankb[bank]->maskb = 0;
712 gpio_bank_saved[bank].fer = *port_fer[bank];
714 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
715 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
716 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
717 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
718 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
719 gpio_bank_saved[bank].reserved =
720 reserved_gpio_map[bank];
725 if ((mask & 1) && (wakeup_flags_map[gpio] !=
727 reserved_gpio_map[gpio_bank(gpio)] |=
729 bfin_gpio_wakeup_type(gpio,
730 wakeup_flags_map[gpio]);
731 set_gpio_data(gpio, 0); /*Clear*/
737 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
738 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
742 AWA_DUMMY_READ(maskb_set);
747 void bfin_pm_restore(void)
751 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
752 mask = wakeup_map[gpio_bank(i)];
757 *port_fer[bank] = gpio_bank_saved[bank].fer;
759 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
760 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
761 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
762 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
763 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
765 reserved_gpio_map[bank] =
766 gpio_bank_saved[bank].reserved;
767 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
770 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
772 AWA_DUMMY_READ(maskb);
776 #else /* BF548_FAMILY */
778 unsigned short get_gpio_dir(unsigned gpio)
780 return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
782 EXPORT_SYMBOL(get_gpio_dir);
784 #endif /* BF548_FAMILY */
786 /***********************************************************
788 * FUNCTIONS: Blackfin Peripheral Resource Allocation
792 * per Peripheral Identifier
795 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
798 *************************************************************
799 * MODIFICATION HISTORY :
800 **************************************************************/
803 int peripheral_request(unsigned short per, const char *label)
806 unsigned short ident = P_IDENT(per);
809 * Don't cares are pins with only one dedicated function
812 if (per & P_DONTCARE)
815 if (!(per & P_DEFINED))
818 if (check_gpio(ident) < 0)
821 local_irq_save(flags);
823 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
825 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
826 __FUNCTION__, ident, get_label(ident));
828 local_irq_restore(flags);
832 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
834 u16 funct = get_portmux(ident);
837 * Pin functions like AMC address strobes my
838 * be requested and used by several drivers
841 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
844 * Allow that the identical pin function can
845 * be requested from the same driver twice
848 if (cmp_label(ident, label) == 0)
852 "%s: Peripheral %d function %d is already reserved by %s !\n",
853 __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
855 local_irq_restore(flags);
861 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
863 portmux_setup(ident, P_FUNCT2MUX(per));
864 port_setup(ident, PERIPHERAL_USAGE);
866 local_irq_restore(flags);
867 set_label(ident, label);
871 EXPORT_SYMBOL(peripheral_request);
874 int peripheral_request(unsigned short per, const char *label)
877 unsigned short ident = P_IDENT(per);
880 * Don't cares are pins with only one dedicated function
883 if (per & P_DONTCARE)
886 if (!(per & P_DEFINED))
889 local_irq_save(flags);
891 if (!check_gpio(ident)) {
893 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
895 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
896 __FUNCTION__, ident, get_label(ident));
898 local_irq_restore(flags);
904 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
907 * Pin functions like AMC address strobes my
908 * be requested and used by several drivers
911 if (!(per & P_MAYSHARE)) {
914 * Allow that the identical pin function can
915 * be requested from the same driver twice
918 if (cmp_label(ident, label) == 0)
922 "%s: Peripheral %d function %d is already"
923 " reserved by %s !\n",
924 __FUNCTION__, ident, P_FUNCT2MUX(per),
927 local_irq_restore(flags);
934 portmux_setup(per, P_FUNCT2MUX(per));
936 port_setup(ident, PERIPHERAL_USAGE);
938 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
939 local_irq_restore(flags);
940 set_label(ident, label);
944 EXPORT_SYMBOL(peripheral_request);
947 int peripheral_request_list(unsigned short per[], const char *label)
952 for (cnt = 0; per[cnt] != 0; cnt++) {
954 ret = peripheral_request(per[cnt], label);
957 for ( ; cnt > 0; cnt--) {
958 peripheral_free(per[cnt - 1]);
966 EXPORT_SYMBOL(peripheral_request_list);
968 void peripheral_free(unsigned short per)
971 unsigned short ident = P_IDENT(per);
973 if (per & P_DONTCARE)
976 if (!(per & P_DEFINED))
979 if (check_gpio(ident) < 0)
982 local_irq_save(flags);
984 if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
985 & gpio_bit(ident)))) {
986 local_irq_restore(flags);
990 if (!(per & P_MAYSHARE)) {
991 port_setup(ident, GPIO_USAGE);
994 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
996 set_label(ident, "free");
998 local_irq_restore(flags);
1000 EXPORT_SYMBOL(peripheral_free);
1002 void peripheral_free_list(unsigned short per[])
1006 for (cnt = 0; per[cnt] != 0; cnt++) {
1007 peripheral_free(per[cnt]);
1011 EXPORT_SYMBOL(peripheral_free_list);
1013 /***********************************************************
1015 * FUNCTIONS: Blackfin GPIO Driver
1018 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
1021 * DESCRIPTION: Blackfin GPIO Driver API
1024 *************************************************************
1025 * MODIFICATION HISTORY :
1026 **************************************************************/
1028 int gpio_request(unsigned gpio, const char *label)
1030 unsigned long flags;
1032 if (check_gpio(gpio) < 0)
1035 local_irq_save(flags);
1038 * Allow that the identical GPIO can
1039 * be requested from the same driver twice
1040 * Do nothing and return -
1043 if (cmp_label(gpio, label) == 0) {
1044 local_irq_restore(flags);
1048 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1049 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1050 gpio, get_label(gpio));
1052 local_irq_restore(flags);
1055 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1057 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1058 gpio, get_label(gpio));
1060 local_irq_restore(flags);
1064 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1066 local_irq_restore(flags);
1068 port_setup(gpio, GPIO_USAGE);
1069 set_label(gpio, label);
1073 EXPORT_SYMBOL(gpio_request);
1075 void gpio_free(unsigned gpio)
1077 unsigned long flags;
1079 if (check_gpio(gpio) < 0)
1082 local_irq_save(flags);
1084 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1087 local_irq_restore(flags);
1093 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1095 set_label(gpio, "free");
1097 local_irq_restore(flags);
1099 EXPORT_SYMBOL(gpio_free);
1103 int gpio_direction_input(unsigned gpio)
1105 unsigned long flags;
1107 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1112 local_irq_save(flags);
1113 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1114 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1115 local_irq_restore(flags);
1119 EXPORT_SYMBOL(gpio_direction_input);
1121 int gpio_direction_output(unsigned gpio, int value)
1123 unsigned long flags;
1125 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1130 local_irq_save(flags);
1131 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
1132 gpio_set_value(gpio, value);
1133 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
1134 local_irq_restore(flags);
1138 EXPORT_SYMBOL(gpio_direction_output);
1140 void gpio_set_value(unsigned gpio, int arg)
1143 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
1145 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
1147 EXPORT_SYMBOL(gpio_set_value);
1149 int gpio_get_value(unsigned gpio)
1151 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
1153 EXPORT_SYMBOL(gpio_get_value);
1157 int gpio_direction_input(unsigned gpio)
1159 unsigned long flags;
1161 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1166 local_irq_save(flags);
1167 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1168 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1169 AWA_DUMMY_READ(inen);
1170 local_irq_restore(flags);
1174 EXPORT_SYMBOL(gpio_direction_input);
1176 int gpio_direction_output(unsigned gpio, int value)
1178 unsigned long flags;
1180 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1185 local_irq_save(flags);
1186 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1189 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1191 gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1193 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1194 AWA_DUMMY_READ(dir);
1195 local_irq_restore(flags);
1199 EXPORT_SYMBOL(gpio_direction_output);
1201 /* If we are booting from SPI and our board lacks a strong enough pull up,
1202 * the core can reset and execute the bootrom faster than the resistor can
1203 * pull the signal logically high. To work around this (common) error in
1204 * board design, we explicitly set the pin back to GPIO mode, force /CS
1205 * high, and wait for the electrons to do their thing.
1207 * This function only makes sense to be called from reset code, but it
1208 * lives here as we need to force all the GPIO states w/out going through
1209 * BUG() checks and such.
1211 void bfin_gpio_reset_spi0_ssel1(void)
1213 u16 gpio = P_IDENT(P_SPI0_SSEL1);
1215 port_setup(gpio, GPIO_USAGE);
1216 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1217 AWA_DUMMY_READ(data_set);
1221 #endif /*BF548_FAMILY */
1223 #if defined(CONFIG_PROC_FS)
1224 static int gpio_proc_read(char *buf, char **start, off_t offset,
1225 int len, int *unused_i, void *unused_v)
1229 for (c = 0; c < MAX_RESOURCES; c++) {
1230 if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
1231 len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c,
1232 get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1233 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1234 len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c));
1243 static __init int gpio_register_proc(void)
1245 struct proc_dir_entry *proc_gpio;
1247 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1249 proc_gpio->read_proc = gpio_proc_read;
1250 return proc_gpio != NULL;
1252 __initcall(gpio_register_proc);