2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
38 #include "pasemi_mac.h"
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
48 * - Other performance improvements
52 /* Must be a power of two */
53 #define RX_RING_SIZE 512
54 #define TX_RING_SIZE 512
56 #define DEFAULT_MSG_ENABLE \
66 #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67 #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68 #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69 #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
72 #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
74 #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
76 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
78 MODULE_LICENSE("GPL");
79 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
80 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
82 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
83 module_param(debug, int, 0);
84 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
86 static struct pasdma_status *dma_status;
88 static unsigned int read_iob_reg(struct pasemi_mac *mac, unsigned int reg)
90 return in_le32(mac->iob_regs+reg);
93 static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
96 out_le32(mac->iob_regs+reg, val);
99 static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
101 return in_le32(mac->regs+reg);
104 static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
107 out_le32(mac->regs+reg, val);
110 static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
112 return in_le32(mac->dma_regs+reg);
115 static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
118 out_le32(mac->dma_regs+reg, val);
121 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
123 struct pci_dev *pdev = mac->pdev;
124 struct device_node *dn = pci_device_to_OF_node(pdev);
131 "No device node for mac, not configuring\n");
135 maddr = of_get_property(dn, "local-mac-address", &len);
137 if (maddr && len == 6) {
138 memcpy(mac->mac_addr, maddr, 6);
142 /* Some old versions of firmware mistakenly uses mac-address
143 * (and as a string) instead of a byte array in local-mac-address.
147 maddr = of_get_property(dn, "mac-address", NULL);
151 "no mac address in device tree, not configuring\n");
156 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
157 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
159 "can't parse mac address, not configuring\n");
163 memcpy(mac->mac_addr, addr, 6);
168 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
170 struct pasemi_mac_rxring *ring;
171 struct pasemi_mac *mac = netdev_priv(dev);
172 int chan_id = mac->dma_rxch;
174 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
179 spin_lock_init(&ring->lock);
181 ring->size = RX_RING_SIZE;
182 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
183 RX_RING_SIZE, GFP_KERNEL);
185 if (!ring->desc_info)
188 /* Allocate descriptors */
189 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
191 sizeof(struct pas_dma_xct_descr),
192 &ring->dma, GFP_KERNEL);
197 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
199 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
200 RX_RING_SIZE * sizeof(u64),
201 &ring->buf_dma, GFP_KERNEL);
205 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
207 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
209 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
210 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
211 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
213 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
214 PAS_DMA_RXCHAN_CFG_HBU(2));
216 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
217 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
219 write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
220 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
221 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
223 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
224 PAS_DMA_RXINT_CFG_DHL(2));
226 ring->next_to_fill = 0;
227 ring->next_to_clean = 0;
229 snprintf(ring->irq_name, sizeof(ring->irq_name),
236 dma_free_coherent(&mac->dma_pdev->dev,
237 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
238 mac->rx->desc, mac->rx->dma);
240 kfree(ring->desc_info);
248 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
250 struct pasemi_mac *mac = netdev_priv(dev);
252 int chan_id = mac->dma_txch;
253 struct pasemi_mac_txring *ring;
255 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
259 spin_lock_init(&ring->lock);
261 ring->size = TX_RING_SIZE;
262 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
263 TX_RING_SIZE, GFP_KERNEL);
264 if (!ring->desc_info)
267 /* Allocate descriptors */
268 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
270 sizeof(struct pas_dma_xct_descr),
271 &ring->dma, GFP_KERNEL);
275 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
277 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
278 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
279 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
280 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
282 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
284 write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
285 PAS_DMA_TXCHAN_CFG_TY_IFACE |
286 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
287 PAS_DMA_TXCHAN_CFG_UP |
288 PAS_DMA_TXCHAN_CFG_WT(2));
290 ring->next_to_fill = 0;
291 ring->next_to_clean = 0;
293 snprintf(ring->irq_name, sizeof(ring->irq_name),
300 kfree(ring->desc_info);
307 static void pasemi_mac_free_tx_resources(struct net_device *dev)
309 struct pasemi_mac *mac = netdev_priv(dev);
311 struct pasemi_mac_buffer *info;
312 struct pas_dma_xct_descr *dp;
314 for (i = 0; i < TX_RING_SIZE; i++) {
315 info = &TX_DESC_INFO(mac, i);
316 dp = &TX_DESC(mac, i);
319 pci_unmap_single(mac->dma_pdev,
323 dev_kfree_skb_any(info->skb);
332 dma_free_coherent(&mac->dma_pdev->dev,
333 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
334 mac->tx->desc, mac->tx->dma);
336 kfree(mac->tx->desc_info);
341 static void pasemi_mac_free_rx_resources(struct net_device *dev)
343 struct pasemi_mac *mac = netdev_priv(dev);
345 struct pasemi_mac_buffer *info;
346 struct pas_dma_xct_descr *dp;
348 for (i = 0; i < RX_RING_SIZE; i++) {
349 info = &RX_DESC_INFO(mac, i);
350 dp = &RX_DESC(mac, i);
353 pci_unmap_single(mac->dma_pdev,
357 dev_kfree_skb_any(info->skb);
366 dma_free_coherent(&mac->dma_pdev->dev,
367 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
368 mac->rx->desc, mac->rx->dma);
370 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
371 mac->rx->buffers, mac->rx->buf_dma);
373 kfree(mac->rx->desc_info);
378 static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
380 struct pasemi_mac *mac = netdev_priv(dev);
382 int start = mac->rx->next_to_fill;
383 unsigned int limit, count;
385 limit = RING_AVAIL(mac->rx);
386 /* Check to see if we're doing first-time setup */
387 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
388 limit = RX_RING_SIZE;
394 for (count = limit; count; count--) {
395 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
396 u64 *buff = &RX_BUFF(mac, i);
400 /* skb might still be in there for recycle on short receives */
404 skb = dev_alloc_skb(BUF_SIZE);
409 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
412 if (unlikely(dma_mapping_error(dma))) {
413 dev_kfree_skb_irq(info->skb);
419 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
425 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
426 write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
428 mac->rx->next_to_fill += limit - count;
431 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
433 unsigned int reg, pcnt;
434 /* Re-enable packet count interrupts: finally
435 * ack the packet count interrupt we got in rx_intr.
438 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
440 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
442 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
445 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
447 unsigned int reg, pcnt;
449 /* Re-enable packet count interrupts */
450 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
452 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
454 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
458 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
462 struct pas_dma_xct_descr *dp;
463 struct pasemi_mac_buffer *info;
469 spin_lock(&mac->rx->lock);
471 n = mac->rx->next_to_clean;
473 for (count = limit; count; count--) {
477 dp = &RX_DESC(mac, n);
481 if (!(macrx & XCT_MACRX_O))
487 /* We have to scan for our skb since there's no way
488 * to back-map them from the descriptor, and if we
489 * have several receive channels then they might not
490 * show up in the same order as they were put on the
494 dma = (dp->ptr & XCT_PTR_ADDR_M);
495 for (i = n; i < (n + RX_RING_SIZE); i++) {
496 info = &RX_DESC_INFO(mac, i);
497 if (info->dma == dma)
506 pci_unmap_single(mac->dma_pdev, dma, skb->len,
509 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
512 struct sk_buff *new_skb =
513 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
515 skb_reserve(new_skb, NET_IP_ALIGN);
516 memcpy(new_skb->data, skb->data, len);
517 /* save the skb in buffer_info as good */
520 /* else just continue with the old one */
526 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
527 skb->ip_summed = CHECKSUM_UNNECESSARY;
528 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
531 skb->ip_summed = CHECKSUM_NONE;
533 mac->netdev->stats.rx_bytes += len;
534 mac->netdev->stats.rx_packets++;
536 skb->protocol = eth_type_trans(skb, mac->netdev);
537 netif_receive_skb(skb);
545 mac->rx->next_to_clean += limit - count;
546 pasemi_mac_replenish_rx_ring(mac->netdev);
548 spin_unlock(&mac->rx->lock);
553 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
556 struct pasemi_mac_buffer *info;
557 struct pas_dma_xct_descr *dp;
558 unsigned int start, count, limit;
559 unsigned int total_count;
561 struct sk_buff *skbs[32];
566 spin_lock_irqsave(&mac->tx->lock, flags);
568 start = mac->tx->next_to_clean;
569 limit = min(mac->tx->next_to_fill, start+32);
573 for (i = start; i < limit; i++) {
574 dp = &TX_DESC(mac, i);
576 if (unlikely(dp->mactx & XCT_MACTX_O))
577 /* Not yet transmitted */
580 info = &TX_DESC_INFO(mac, i);
581 skbs[count] = info->skb;
582 dmas[count] = info->dma;
591 mac->tx->next_to_clean += count;
592 spin_unlock_irqrestore(&mac->tx->lock, flags);
593 netif_wake_queue(mac->netdev);
595 for (i = 0; i < count; i++) {
596 pci_unmap_single(mac->dma_pdev, dmas[i],
597 skbs[i]->len, PCI_DMA_TODEVICE);
598 dev_kfree_skb_irq(skbs[i]);
601 total_count += count;
603 /* If the batch was full, try to clean more */
611 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
613 struct net_device *dev = data;
614 struct pasemi_mac *mac = netdev_priv(dev);
617 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
620 if (*mac->rx_status & PAS_STATUS_ERROR)
621 printk("rx_status reported error\n");
623 /* Don't reset packet count so it won't fire again but clear
628 if (*mac->rx_status & PAS_STATUS_SOFT)
629 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
630 if (*mac->rx_status & PAS_STATUS_ERROR)
631 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
632 if (*mac->rx_status & PAS_STATUS_TIMER)
633 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
635 netif_rx_schedule(dev, &mac->napi);
637 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
642 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
644 struct net_device *dev = data;
645 struct pasemi_mac *mac = netdev_priv(dev);
646 unsigned int reg, pcnt;
648 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
651 pasemi_mac_clean_tx(mac);
653 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
655 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
657 if (*mac->tx_status & PAS_STATUS_SOFT)
658 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
659 if (*mac->tx_status & PAS_STATUS_ERROR)
660 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
662 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
667 static void pasemi_adjust_link(struct net_device *dev)
669 struct pasemi_mac *mac = netdev_priv(dev);
672 unsigned int new_flags;
674 if (!mac->phydev->link) {
675 /* If no link, MAC speed settings don't matter. Just report
676 * link down and return.
678 if (mac->link && netif_msg_link(mac))
679 printk(KERN_INFO "%s: Link is down.\n", dev->name);
681 netif_carrier_off(dev);
686 netif_carrier_on(dev);
688 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
689 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
690 PAS_MAC_CFG_PCFG_TSR_M);
692 if (!mac->phydev->duplex)
693 new_flags |= PAS_MAC_CFG_PCFG_HD;
695 switch (mac->phydev->speed) {
697 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
698 PAS_MAC_CFG_PCFG_TSR_1G;
701 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
702 PAS_MAC_CFG_PCFG_TSR_100M;
705 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
706 PAS_MAC_CFG_PCFG_TSR_10M;
709 printk("Unsupported speed %d\n", mac->phydev->speed);
712 /* Print on link or speed/duplex change */
713 msg = mac->link != mac->phydev->link || flags != new_flags;
715 mac->duplex = mac->phydev->duplex;
716 mac->speed = mac->phydev->speed;
717 mac->link = mac->phydev->link;
719 if (new_flags != flags)
720 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
722 if (msg && netif_msg_link(mac))
723 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
724 dev->name, mac->speed, mac->duplex ? "full" : "half");
727 static int pasemi_mac_phy_init(struct net_device *dev)
729 struct pasemi_mac *mac = netdev_priv(dev);
730 struct device_node *dn, *phy_dn;
731 struct phy_device *phydev;
734 const unsigned int *prop;
738 dn = pci_device_to_OF_node(mac->pdev);
739 ph = of_get_property(dn, "phy-handle", NULL);
742 phy_dn = of_find_node_by_phandle(*ph);
744 prop = of_get_property(phy_dn, "reg", NULL);
745 ret = of_address_to_resource(phy_dn->parent, 0, &r);
750 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
758 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
760 if (IS_ERR(phydev)) {
761 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
762 return PTR_ERR(phydev);
765 mac->phydev = phydev;
775 static int pasemi_mac_open(struct net_device *dev)
777 struct pasemi_mac *mac = netdev_priv(dev);
782 /* enable rx section */
783 write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
785 /* enable tx section */
786 write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
788 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
789 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
790 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
792 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
794 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
795 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
797 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
799 write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
800 PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
802 write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
803 PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
805 /* Clear out any residual packet count state from firmware */
806 pasemi_mac_restart_rx_intr(mac);
807 pasemi_mac_restart_tx_intr(mac);
809 /* 0xffffff is max value, about 16ms */
810 write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
811 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
813 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
815 ret = pasemi_mac_setup_rx_resources(dev);
817 goto out_rx_resources;
819 ret = pasemi_mac_setup_tx_resources(dev);
821 goto out_tx_resources;
823 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
824 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
825 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
828 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
829 PAS_DMA_RXINT_RCMDSTA_EN);
831 /* enable rx channel */
832 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
833 PAS_DMA_RXCHAN_CCMDSTA_EN |
834 PAS_DMA_RXCHAN_CCMDSTA_DU);
836 /* enable tx channel */
837 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
838 PAS_DMA_TXCHAN_TCMDSTA_EN);
840 pasemi_mac_replenish_rx_ring(dev);
842 ret = pasemi_mac_phy_init(dev);
843 /* Some configs don't have PHYs (XAUI etc), so don't complain about
844 * failed init due to -ENODEV.
846 if (ret && ret != -ENODEV)
847 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
849 netif_start_queue(dev);
850 napi_enable(&mac->napi);
852 /* Interrupts are a bit different for our DMA controller: While
853 * it's got one a regular PCI device header, the interrupt there
854 * is really the base of the range it's using. Each tx and rx
855 * channel has it's own interrupt source.
858 base_irq = virq_to_hw(mac->dma_pdev->irq);
860 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
861 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
863 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
864 mac->tx->irq_name, dev);
866 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
867 base_irq + mac->dma_txch, ret);
871 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
872 mac->rx->irq_name, dev);
874 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
875 base_irq + 20 + mac->dma_rxch, ret);
880 phy_start(mac->phydev);
885 free_irq(mac->tx_irq, dev);
887 napi_disable(&mac->napi);
888 netif_stop_queue(dev);
889 pasemi_mac_free_tx_resources(dev);
891 pasemi_mac_free_rx_resources(dev);
897 #define MAX_RETRIES 5000
899 static int pasemi_mac_close(struct net_device *dev)
901 struct pasemi_mac *mac = netdev_priv(dev);
906 phy_stop(mac->phydev);
907 phy_disconnect(mac->phydev);
910 netif_stop_queue(dev);
911 napi_disable(&mac->napi);
913 /* Clean out any pending buffers */
914 pasemi_mac_clean_tx(mac);
915 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
917 /* Disable interface */
918 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
919 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
920 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
922 for (retries = 0; retries < MAX_RETRIES; retries++) {
923 stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
924 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
929 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
930 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
932 for (retries = 0; retries < MAX_RETRIES; retries++) {
933 stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
934 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
939 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
940 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
942 for (retries = 0; retries < MAX_RETRIES; retries++) {
943 stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
944 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
949 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
950 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
952 /* Then, disable the channel. This must be done separately from
953 * stopping, since you can't disable when active.
956 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
957 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
958 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
960 free_irq(mac->tx_irq, dev);
961 free_irq(mac->rx_irq, dev);
964 pasemi_mac_free_rx_resources(dev);
965 pasemi_mac_free_tx_resources(dev);
970 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
972 struct pasemi_mac *mac = netdev_priv(dev);
973 struct pasemi_mac_txring *txring;
974 struct pasemi_mac_buffer *info;
975 struct pas_dma_xct_descr *dp;
976 u64 dflags, mactx, ptr;
980 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
982 if (skb->ip_summed == CHECKSUM_PARTIAL) {
983 const unsigned char *nh = skb_network_header(skb);
985 switch (ip_hdr(skb)->protocol) {
987 dflags |= XCT_MACTX_CSUM_TCP;
988 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
989 dflags |= XCT_MACTX_IPO(nh - skb->data);
992 dflags |= XCT_MACTX_CSUM_UDP;
993 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
994 dflags |= XCT_MACTX_IPO(nh - skb->data);
999 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1001 if (dma_mapping_error(map))
1002 return NETDEV_TX_BUSY;
1004 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1005 ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
1009 spin_lock_irqsave(&txring->lock, flags);
1011 if (RING_AVAIL(txring) <= 1) {
1012 spin_unlock_irqrestore(&txring->lock, flags);
1013 pasemi_mac_clean_tx(mac);
1014 pasemi_mac_restart_tx_intr(mac);
1015 spin_lock_irqsave(&txring->lock, flags);
1017 if (RING_AVAIL(txring) <= 1) {
1018 /* Still no room -- stop the queue and wait for tx
1019 * intr when there's room.
1021 netif_stop_queue(dev);
1026 dp = &TX_DESC(mac, txring->next_to_fill);
1027 info = &TX_DESC_INFO(mac, txring->next_to_fill);
1034 txring->next_to_fill++;
1035 dev->stats.tx_packets++;
1036 dev->stats.tx_bytes += skb->len;
1038 spin_unlock_irqrestore(&txring->lock, flags);
1040 write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
1042 return NETDEV_TX_OK;
1045 spin_unlock_irqrestore(&txring->lock, flags);
1046 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
1047 return NETDEV_TX_BUSY;
1050 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1052 struct pasemi_mac *mac = netdev_priv(dev);
1055 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1057 /* Set promiscuous */
1058 if (dev->flags & IFF_PROMISC)
1059 flags |= PAS_MAC_CFG_PCFG_PR;
1061 flags &= ~PAS_MAC_CFG_PCFG_PR;
1063 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1067 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1069 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1070 struct net_device *dev = mac->netdev;
1073 pasemi_mac_clean_tx(mac);
1074 pkts = pasemi_mac_clean_rx(mac, budget);
1075 if (pkts < budget) {
1076 /* all done, no more packets present */
1077 netif_rx_complete(dev, napi);
1079 pasemi_mac_restart_rx_intr(mac);
1084 static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
1086 struct device_node *dn;
1089 dn = pci_device_to_OF_node(p);
1093 ret = of_iomap(dn, index);
1099 /* This is hardcoded and ugly, but we have some firmware versions
1100 * that don't provide the register space in the device tree. Luckily
1101 * they are at well-known locations so we can just do the math here.
1103 return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
1106 static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
1108 struct resource res;
1109 struct device_node *dn;
1112 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1113 if (!mac->dma_pdev) {
1114 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1118 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1119 if (!mac->iob_pdev) {
1120 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1124 mac->regs = map_onedev(mac->pdev, 0);
1125 mac->dma_regs = map_onedev(mac->dma_pdev, 0);
1126 mac->iob_regs = map_onedev(mac->iob_pdev, 0);
1128 if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
1129 dev_err(&mac->pdev->dev, "Can't map registers\n");
1133 /* The dma status structure is located in the I/O bridge, and
1134 * is cache coherent.
1137 dn = pci_device_to_OF_node(mac->iob_pdev);
1139 err = of_address_to_resource(dn, 1, &res);
1141 /* Fallback for old firmware */
1142 res.start = 0xfd800000;
1143 res.end = res.start + 0x1000;
1145 dma_status = __ioremap(res.start, res.end-res.start, 0);
1151 static int __devinit
1152 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1154 static int index = 0;
1155 struct net_device *dev;
1156 struct pasemi_mac *mac;
1159 err = pci_enable_device(pdev);
1163 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1166 "pasemi_mac: Could not allocate ethernet device.\n");
1168 goto out_disable_device;
1171 pci_set_drvdata(pdev, dev);
1172 SET_NETDEV_DEV(dev, &pdev->dev);
1174 mac = netdev_priv(dev);
1179 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1181 dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX;
1183 /* These should come out of the device tree eventually */
1184 mac->dma_txch = index;
1185 mac->dma_rxch = index;
1187 /* We probe GMAC before XAUI, but the DMA interfaces are
1188 * in XAUI, GMAC order.
1191 mac->dma_if = index + 2;
1193 mac->dma_if = index - 4;
1196 switch (pdev->device) {
1198 mac->type = MAC_TYPE_GMAC;
1201 mac->type = MAC_TYPE_XAUI;
1208 /* get mac addr from device tree */
1209 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1213 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1215 dev->open = pasemi_mac_open;
1216 dev->stop = pasemi_mac_close;
1217 dev->hard_start_xmit = pasemi_mac_start_tx;
1218 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1220 err = pasemi_mac_map_regs(mac);
1224 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1225 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1227 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1229 /* Enable most messages by default */
1230 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1232 err = register_netdev(dev);
1235 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1239 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1240 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1241 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1242 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1243 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1244 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1250 pci_dev_put(mac->iob_pdev);
1252 pci_dev_put(mac->dma_pdev);
1254 iounmap(mac->dma_regs);
1256 iounmap(mac->iob_regs);
1262 pci_disable_device(pdev);
1267 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1269 struct net_device *netdev = pci_get_drvdata(pdev);
1270 struct pasemi_mac *mac;
1275 mac = netdev_priv(netdev);
1277 unregister_netdev(netdev);
1279 pci_disable_device(pdev);
1280 pci_dev_put(mac->dma_pdev);
1281 pci_dev_put(mac->iob_pdev);
1284 iounmap(mac->dma_regs);
1285 iounmap(mac->iob_regs);
1287 pci_set_drvdata(pdev, NULL);
1288 free_netdev(netdev);
1291 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1292 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1293 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1297 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1299 static struct pci_driver pasemi_mac_driver = {
1300 .name = "pasemi_mac",
1301 .id_table = pasemi_mac_pci_tbl,
1302 .probe = pasemi_mac_probe,
1303 .remove = __devexit_p(pasemi_mac_remove),
1306 static void __exit pasemi_mac_cleanup_module(void)
1308 pci_unregister_driver(&pasemi_mac_driver);
1309 __iounmap(dma_status);
1313 int pasemi_mac_init_module(void)
1315 return pci_register_driver(&pasemi_mac_driver);
1318 module_init(pasemi_mac_init_module);
1319 module_exit(pasemi_mac_cleanup_module);