2 * linux/arch/arm/mach-realview/platsmp.c
4 * Copyright (C) 2002 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/smp.h>
17 #include <asm/cacheflush.h>
18 #include <asm/hardware/arm_scu.h>
19 #include <asm/hardware.h>
22 extern void realview_secondary_startup(void);
25 * control for which core is the next to come out of the secondary
28 volatile int __cpuinitdata pen_release = -1;
30 static unsigned int __init get_core_count(void)
34 ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
36 return (ncores & 0x03) + 1;
39 static DEFINE_SPINLOCK(boot_lock);
41 void __cpuinit platform_secondary_init(unsigned int cpu)
44 * the primary core may have used a "cross call" soft interrupt
45 * to get this processor out of WFI in the BootMonitor - make
46 * sure that we are no longer being sent this soft interrupt
48 smp_cross_call_done(cpumask_of_cpu(cpu));
51 * if any interrupts are already enabled for the primary
52 * core (e.g. timer irq), then they will not have been enabled
55 gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE));
58 * let the primary processor know we're out of the
59 * pen, then head off into the C entry point
64 * Synchronise with the boot thread.
66 spin_lock(&boot_lock);
67 spin_unlock(&boot_lock);
70 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
72 unsigned long timeout;
75 * set synchronisation state between this boot processor
76 * and the secondary one
78 spin_lock(&boot_lock);
81 * The secondary processor is waiting to be released from
82 * the holding pen - release it, then wait for it to flag
83 * that it has been released by resetting pen_release.
85 * Note that "pen_release" is the hardware CPU ID, whereas
86 * "cpu" is Linux's internal ID.
94 * This is a later addition to the booting protocol: the
95 * bootMonitor now puts secondary cores into WFI, so
96 * poke_milo() no longer gets the cores moving; we need
97 * to send a soft interrupt to wake the secondary core.
98 * Use smp_cross_call() for this, since there's little
99 * point duplicating the code here
101 smp_cross_call(cpumask_of_cpu(cpu));
103 timeout = jiffies + (1 * HZ);
104 while (time_before(jiffies, timeout)) {
105 if (pen_release == -1)
112 * now the secondary core is starting up let it run its
113 * calibrations, then wait for it to finish
115 spin_unlock(&boot_lock);
117 return pen_release != -1 ? -ENOSYS : 0;
120 static void __init poke_milo(void)
122 extern void secondary_startup(void);
124 /* nobody is to be released from the pen yet */
128 * write the address of secondary startup into the system-wide
129 * flags register, then clear the bottom two bits, which is what
130 * BootMonitor is waiting for
133 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
134 __raw_writel(virt_to_phys(realview_secondary_startup),
135 __io_address(REALVIEW_SYS_BASE) +
136 REALVIEW_SYS_FLAGSS_OFFSET);
137 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
139 __io_address(REALVIEW_SYS_BASE) +
140 REALVIEW_SYS_FLAGSC_OFFSET);
146 void __init smp_prepare_cpus(unsigned int max_cpus)
148 unsigned int ncores = get_core_count();
149 unsigned int cpu = smp_processor_id();
155 "Realview: strange CM count of 0? Default to 1\n");
160 if (ncores > NR_CPUS) {
162 "Realview: no. of cores (%d) greater than configured "
163 "maximum of %d - clipping\n",
168 smp_store_cpu_info(cpu);
171 * are we trying to boot more cores than exist?
173 if (max_cpus > ncores)
177 * Enable the local timer for primary CPU
179 local_timer_setup(cpu);
182 * Initialise the possible/present maps.
183 * cpu_possible_map describes the set of CPUs which may be present
184 * cpu_present_map describes the set of CPUs populated
186 for (i = 0; i < max_cpus; i++) {
187 cpu_set(i, cpu_possible_map);
188 cpu_set(i, cpu_present_map);
192 * Do we need any more CPUs? If so, then let them know where
193 * to start. Note that, on modern versions of MILO, the "poke"
194 * doesn't actually do anything until each individual core is
195 * sent a soft interrupt to get it out of WFI