git.oblomov.eu Git - linux-2.6/blob - drivers/media/dvb/frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
   5  *    Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net>
   6  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   7  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19  *    You should have received a copy of the GNU General Public License
  20  *    along with this program; if not, write to the Free Software
  21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23 */
  24
  25 /*
  26  *                      NOTES ABOUT THIS DRIVER
  27  *
  28  * This Linux driver supports:
  29  *   B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
  30  *   AverTVHD MCE A180 (NXT2004)
  31  *   ATI HDTV Wonder (NXT2004)
  32  *
  33  * This driver needs external firmware. Please use the command
  34  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
  35  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
  36  * download/extract the appropriate firmware, and then copy it to
  37  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  38  * (depending on configuration of firmware hotplug).
  39  */
  40 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
  41 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
  42 #define CRC_CCIT_MASK 0x1021
  43
  44 #include <linux/kernel.h>
  45 #include <linux/init.h>
  46 #include <linux/module.h>
  47 #include <linux/moduleparam.h>
  48 #include <linux/slab.h>
  49 #include <linux/string.h>
  50
  51 #include "dvb_frontend.h"
  52 #include "dvb-pll.h"
  53 #include "nxt200x.h"
  54
  55 struct nxt200x_state {
  56
  57         struct i2c_adapter* i2c;
  58         const struct nxt200x_config* config;
  59         struct dvb_frontend frontend;
  60
  61         /* demodulator private data */
  62         nxt_chip_type demod_chip;
  63         u8 initialised:1;
  64 };
  65
  66 static int debug;
  67 #define dprintk(args...) \
  68         do { \
  69                 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
  70         } while (0)
  71
  72 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  73 {
  74         int err;
  75         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  76
  77         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  78                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
  79                         __FUNCTION__, addr, err);
  80                 return -EREMOTEIO;
  81         }
  82         return 0;
  83 }
  84
  85 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
  86 {
  87         int err;
  88         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  89
  90         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  91                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
  92                         __FUNCTION__, addr, err);
  93                 return -EREMOTEIO;
  94         }
  95         return 0;
  96 }
  97
  98 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
  99 {
 100         u8 buf2 [len+1];
 101         int err;
 102         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
 103
 104         buf2[0] = reg;
 105         memcpy(&buf2[1], buf, len);
 106
 107         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
 108                 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
 109                         __FUNCTION__, state->config->demod_address, err);
 110                 return -EREMOTEIO;
 111         }
 112         return 0;
 113 }
 114
 115 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
 116 {
 117         u8 reg2 [] = { reg };
 118
 119         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 120                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 121
 122         int err;
 123
 124         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 125                 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
 126                         __FUNCTION__, state->config->demod_address, err);
 127                 return -EREMOTEIO;
 128         }
 129         return 0;
 130 }
 131
 132 static u16 nxt200x_crc(u16 crc, u8 c)
 133 {
 134         u8 i;
 135         u16 input = (u16) c & 0xFF;
 136
 137         input<<=8;
 138         for(i=0; i<8; i++) {
 139                 if((crc^input) & 0x8000)
 140                         crc=(crc<<1)^CRC_CCIT_MASK;
 141                 else
 142                         crc<<=1;
 143                 input<<=1;
 144         }
 145         return crc;
 146 }
 147
 148 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 149 {
 150         u8 attr, len2, buf;
 151         dprintk("%s\n", __FUNCTION__);
 152
 153         /* set mutli register register */
 154         nxt200x_writebytes(state, 0x35, &reg, 1);
 155
 156         /* send the actual data */
 157         nxt200x_writebytes(state, 0x36, data, len);
 158
 159         switch (state->demod_chip) {
 160                 case NXT2002:
 161                         len2 = len;
 162                         buf = 0x02;
 163                         break;
 164                 case NXT2004:
 165                         /* probably not right, but gives correct values */
 166                         attr = 0x02;
 167                         if (reg & 0x80) {
 168                                 attr = attr << 1;
 169                                 if (reg & 0x04)
 170                                         attr = attr >> 1;
 171                         }
 172                         /* set write bit */
 173                         len2 = ((attr << 4) | 0x10) | len;
 174                         buf = 0x80;
 175                         break;
 176                 default:
 177                         return -EINVAL;
 178                         break;
 179         }
 180
 181         /* set multi register length */
 182         nxt200x_writebytes(state, 0x34, &len2, 1);
 183
 184         /* toggle the multireg write bit */
 185         nxt200x_writebytes(state, 0x21, &buf, 1);
 186
 187         nxt200x_readbytes(state, 0x21, &buf, 1);
 188
 189         switch (state->demod_chip) {
 190                 case NXT2002:
 191                         if ((buf & 0x02) == 0)
 192                                 return 0;
 193                         break;
 194                 case NXT2004:
 195                         if (buf == 0)
 196                                 return 0;
 197                         break;
 198                 default:
 199                         return -EINVAL;
 200                         break;
 201         }
 202
 203         printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
 204
 205         return 0;
 206 }
 207
 208 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 209 {
 210         int i;
 211         u8 buf, len2, attr;
 212         dprintk("%s\n", __FUNCTION__);
 213
 214         /* set mutli register register */
 215         nxt200x_writebytes(state, 0x35, &reg, 1);
 216
 217         switch (state->demod_chip) {
 218                 case NXT2002:
 219                         /* set multi register length */
 220                         len2 = len & 0x80;
 221                         nxt200x_writebytes(state, 0x34, &len2, 1);
 222
 223                         /* read the actual data */
 224                         nxt200x_readbytes(state, reg, data, len);
 225                         return 0;
 226                         break;
 227                 case NXT2004:
 228                         /* probably not right, but gives correct values */
 229                         attr = 0x02;
 230                         if (reg & 0x80) {
 231                                 attr = attr << 1;
 232                                 if (reg & 0x04)
 233                                         attr = attr >> 1;
 234                         }
 235
 236                         /* set multi register length */
 237                         len2 = (attr << 4) | len;
 238                         nxt200x_writebytes(state, 0x34, &len2, 1);
 239
 240                         /* toggle the multireg bit*/
 241                         buf = 0x80;
 242                         nxt200x_writebytes(state, 0x21, &buf, 1);
 243
 244                         /* read the actual data */
 245                         for(i = 0; i < len; i++) {
 246                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 247                         }
 248                         return 0;
 249                         break;
 250                 default:
 251                         return -EINVAL;
 252                         break;
 253         }
 254 }
 255
 256 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 257 {
 258         u8 buf, stopval, counter = 0;
 259         dprintk("%s\n", __FUNCTION__);
 260
 261         /* set correct stop value */
 262         switch (state->demod_chip) {
 263                 case NXT2002:
 264                         stopval = 0x40;
 265                         break;
 266                 case NXT2004:
 267                         stopval = 0x10;
 268                         break;
 269                 default:
 270                         stopval = 0;
 271                         break;
 272         }
 273
 274         buf = 0x80;
 275         nxt200x_writebytes(state, 0x22, &buf, 1);
 276
 277         while (counter < 20) {
 278                 nxt200x_readbytes(state, 0x31, &buf, 1);
 279                 if (buf & stopval)
 280                         return;
 281                 msleep(10);
 282                 counter++;
 283         }
 284
 285         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 286         return;
 287 }
 288
 289 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 290 {
 291         u8 buf;
 292         dprintk("%s\n", __FUNCTION__);
 293
 294         buf = 0x00;
 295         nxt200x_writebytes(state, 0x22, &buf, 1);
 296 }
 297
 298 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 299 {
 300         u8 buf[9];
 301         u8 counter = 0;
 302         dprintk("%s\n", __FUNCTION__);
 303
 304         buf[0] = 0x00;
 305         nxt200x_writebytes(state, 0x2b, buf, 1);
 306         buf[0] = 0x70;
 307         nxt200x_writebytes(state, 0x34, buf, 1);
 308         buf[0] = 0x04;
 309         nxt200x_writebytes(state, 0x35, buf, 1);
 310         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 311         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 312         nxt200x_writebytes(state, 0x36, buf, 9);
 313         buf[0] = 0x80;
 314         nxt200x_writebytes(state, 0x21, buf, 1);
 315
 316         while (counter < 20) {
 317                 nxt200x_readbytes(state, 0x21, buf, 1);
 318                 if (buf[0] == 0)
 319                         return;
 320                 msleep(10);
 321                 counter++;
 322         }
 323
 324         printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
 325
 326         return;
 327 }
 328
 329 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 330 {
 331         u8 buf, count = 0;
 332
 333         dprintk("%s\n", __FUNCTION__);
 334
 335         dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[1], data[2], data[3], data[4]);
 336
 337         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 338          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 339         switch (state->demod_chip) {
 340                 case NXT2004:
 341                         if (i2c_writebytes(state, data[0], data+1, 4))
 342                                 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
 343                         /* wait until we have a lock */
 344                         while (count < 20) {
 345                                 i2c_readbytes(state, data[0], &buf, 1);
 346                                 if (buf & 0x40)
 347                                         return 0;
 348                                 msleep(100);
 349                                 count++;
 350                         }
 351                         printk("nxt2004: timeout waiting for tuner lock\n");
 352                         break;
 353                 case NXT2002:
 354                         /* set the i2c transfer speed to the tuner */
 355                         buf = 0x03;
 356                         nxt200x_writebytes(state, 0x20, &buf, 1);
 357
 358                         /* setup to transfer 4 bytes via i2c */
 359                         buf = 0x04;
 360                         nxt200x_writebytes(state, 0x34, &buf, 1);
 361
 362                         /* write actual tuner bytes */
 363                         nxt200x_writebytes(state, 0x36, data+1, 4);
 364
 365                         /* set tuner i2c address */
 366                         buf = data[0] << 1;
 367                         nxt200x_writebytes(state, 0x35, &buf, 1);
 368
 369                         /* write UC Opmode to begin transfer */
 370                         buf = 0x80;
 371                         nxt200x_writebytes(state, 0x21, &buf, 1);
 372
 373                         while (count < 20) {
 374                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 375                                 if ((buf & 0x80)== 0x00)
 376                                         return 0;
 377                                 msleep(100);
 378                                 count++;
 379                         }
 380                         printk("nxt2002: timeout error writing tuner\n");
 381                         break;
 382                 default:
 383                         return -EINVAL;
 384                         break;
 385         }
 386         return 0;
 387 }
 388
 389 static void nxt200x_agc_reset(struct nxt200x_state* state)
 390 {
 391         u8 buf;
 392         dprintk("%s\n", __FUNCTION__);
 393
 394         switch (state->demod_chip) {
 395                 case NXT2002:
 396                         buf = 0x08;
 397                         nxt200x_writebytes(state, 0x08, &buf, 1);
 398                         buf = 0x00;
 399                         nxt200x_writebytes(state, 0x08, &buf, 1);
 400                         break;
 401                 case NXT2004:
 402                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 403                         buf = 0x08;
 404                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 405                         buf = 0x00;
 406                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 407                         break;
 408                 default:
 409                         break;
 410         }
 411         return;
 412 }
 413
 414 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 415 {
 416
 417         struct nxt200x_state* state = fe->demodulator_priv;
 418         u8 buf[3], written = 0, chunkpos = 0;
 419         u16 rambase, position, crc = 0;
 420
 421         dprintk("%s\n", __FUNCTION__);
 422         dprintk("Firmware is %zu bytes\n", fw->size);
 423
 424         /* Get the RAM base for this nxt2002 */
 425         nxt200x_readbytes(state, 0x10, buf, 1);
 426
 427         if (buf[0] & 0x10)
 428                 rambase = 0x1000;
 429         else
 430                 rambase = 0x0000;
 431
 432         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 433
 434         /* Hold the micro in reset while loading firmware */
 435         buf[0] = 0x80;
 436         nxt200x_writebytes(state, 0x2B, buf, 1);
 437
 438         for (position = 0; position < fw->size; position++) {
 439                 if (written == 0) {
 440                         crc = 0;
 441                         chunkpos = 0x28;
 442                         buf[0] = ((rambase + position) >> 8);
 443                         buf[1] = (rambase + position) & 0xFF;
 444                         buf[2] = 0x81;
 445                         /* write starting address */
 446                         nxt200x_writebytes(state, 0x29, buf, 3);
 447                 }
 448                 written++;
 449                 chunkpos++;
 450
 451                 if ((written % 4) == 0)
 452                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 453
 454                 crc = nxt200x_crc(crc, fw->data[position]);
 455
 456                 if ((written == 255) || (position+1 == fw->size)) {
 457                         /* write remaining bytes of firmware */
 458                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 459                                 &fw->data[position-(written %4) + 1],
 460                                 written %4);
 461                         buf[0] = crc << 8;
 462                         buf[1] = crc & 0xFF;
 463
 464                         /* write crc */
 465                         nxt200x_writebytes(state, 0x2C, buf, 2);
 466
 467                         /* do a read to stop things */
 468                         nxt200x_readbytes(state, 0x2A, buf, 1);
 469
 470                         /* set transfer mode to complete */
 471                         buf[0] = 0x80;
 472                         nxt200x_writebytes(state, 0x2B, buf, 1);
 473
 474                         written = 0;
 475                 }
 476         }
 477
 478         return 0;
 479 };
 480
 481 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 482 {
 483
 484         struct nxt200x_state* state = fe->demodulator_priv;
 485         u8 buf[3];
 486         u16 rambase, position, crc=0;
 487
 488         dprintk("%s\n", __FUNCTION__);
 489         dprintk("Firmware is %zu bytes\n", fw->size);
 490
 491         /* set rambase */
 492         rambase = 0x1000;
 493
 494         /* hold the micro in reset while loading firmware */
 495         buf[0] = 0x80;
 496         nxt200x_writebytes(state, 0x2B, buf,1);
 497
 498         /* calculate firmware CRC */
 499         for (position = 0; position < fw->size; position++) {
 500                 crc = nxt200x_crc(crc, fw->data[position]);
 501         }
 502
 503         buf[0] = rambase >> 8;
 504         buf[1] = rambase & 0xFF;
 505         buf[2] = 0x81;
 506         /* write starting address */
 507         nxt200x_writebytes(state,0x29,buf,3);
 508
 509         for (position = 0; position < fw->size;) {
 510                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 511                         fw->size-position > 255 ? 255 : fw->size-position);
 512                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 513         }
 514         buf[0] = crc >> 8;
 515         buf[1] = crc & 0xFF;
 516
 517         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 518
 519         /* write crc */
 520         nxt200x_writebytes(state, 0x2C, buf,2);
 521
 522         /* do a read to stop things */
 523         nxt200x_readbytes(state, 0x2C, buf, 1);
 524
 525         /* set transfer mode to complete */
 526         buf[0] = 0x80;
 527         nxt200x_writebytes(state, 0x2B, buf,1);
 528
 529         return 0;
 530 };
 531
 532 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
 533                                              struct dvb_frontend_parameters *p)
 534 {
 535         struct nxt200x_state* state = fe->demodulator_priv;
 536         u8 buf[5];
 537
 538         /* stop the micro first */
 539         nxt200x_microcontroller_stop(state);
 540
 541         if (state->demod_chip == NXT2004) {
 542                 /* make sure demod is set to digital */
 543                 buf[0] = 0x04;
 544                 nxt200x_writebytes(state, 0x14, buf, 1);
 545                 buf[0] = 0x00;
 546                 nxt200x_writebytes(state, 0x17, buf, 1);
 547         }
 548
 549         /* get tuning information */
 550         if (fe->ops.tuner_ops.calc_regs) {
 551                 fe->ops.tuner_ops.calc_regs(fe, p, buf, 5);
 552         }
 553
 554         /* set additional params */
 555         switch (p->u.vsb.modulation) {
 556                 case QAM_64:
 557                 case QAM_256:
 558                         /* Set punctured clock for QAM */
 559                         /* This is just a guess since I am unable to test it */
 560                         if (state->config->set_ts_params)
 561                                 state->config->set_ts_params(fe, 1);
 562
 563                         /* set input */
 564                         if (state->config->set_pll_input)
 565                                 state->config->set_pll_input(buf, 1);
 566                         break;
 567                 case VSB_8:
 568                         /* Set non-punctured clock for VSB */
 569                         if (state->config->set_ts_params)
 570                                 state->config->set_ts_params(fe, 0);
 571
 572                         /* set input */
 573                         if (state->config->set_pll_input)
 574                                 state->config->set_pll_input(buf, 0);
 575                         break;
 576                 default:
 577                         return -EINVAL;
 578                         break;
 579         }
 580
 581         /* write frequency information */
 582         nxt200x_writetuner(state, buf);
 583
 584         /* reset the agc now that tuning has been completed */
 585         nxt200x_agc_reset(state);
 586
 587         /* set target power level */
 588         switch (p->u.vsb.modulation) {
 589                 case QAM_64:
 590                 case QAM_256:
 591                         buf[0] = 0x74;
 592                         break;
 593                 case VSB_8:
 594                         buf[0] = 0x70;
 595                         break;
 596                 default:
 597                         return -EINVAL;
 598                         break;
 599         }
 600         nxt200x_writebytes(state, 0x42, buf, 1);
 601
 602         /* configure sdm */
 603         switch (state->demod_chip) {
 604                 case NXT2002:
 605                         buf[0] = 0x87;
 606                         break;
 607                 case NXT2004:
 608                         buf[0] = 0x07;
 609                         break;
 610                 default:
 611                         return -EINVAL;
 612                         break;
 613         }
 614         nxt200x_writebytes(state, 0x57, buf, 1);
 615
 616         /* write sdm1 input */
 617         buf[0] = 0x10;
 618         buf[1] = 0x00;
 619         switch (state->demod_chip) {
 620                 case NXT2002:
 621                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
 622                         break;
 623                 case NXT2004:
 624                         nxt200x_writebytes(state, 0x58, buf, 2);
 625                         break;
 626                 default:
 627                         return -EINVAL;
 628                         break;
 629         }
 630
 631         /* write sdmx input */
 632         switch (p->u.vsb.modulation) {
 633                 case QAM_64:
 634                                 buf[0] = 0x68;
 635                                 break;
 636                 case QAM_256:
 637                                 buf[0] = 0x64;
 638                                 break;
 639                 case VSB_8:
 640                                 buf[0] = 0x60;
 641                                 break;
 642                 default:
 643                                 return -EINVAL;
 644                                 break;
 645         }
 646         buf[1] = 0x00;
 647         switch (state->demod_chip) {
 648                 case NXT2002:
 649                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
 650                         break;
 651                 case NXT2004:
 652                         nxt200x_writebytes(state, 0x5C, buf, 2);
 653                         break;
 654                 default:
 655                         return -EINVAL;
 656                         break;
 657         }
 658
 659         /* write adc power lpf fc */
 660         buf[0] = 0x05;
 661         nxt200x_writebytes(state, 0x43, buf, 1);
 662
 663         if (state->demod_chip == NXT2004) {
 664                 /* write ??? */
 665                 buf[0] = 0x00;
 666                 buf[1] = 0x00;
 667                 nxt200x_writebytes(state, 0x46, buf, 2);
 668         }
 669
 670         /* write accumulator2 input */
 671         buf[0] = 0x80;
 672         buf[1] = 0x00;
 673         switch (state->demod_chip) {
 674                 case NXT2002:
 675                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 676                         break;
 677                 case NXT2004:
 678                         nxt200x_writebytes(state, 0x4B, buf, 2);
 679                         break;
 680                 default:
 681                         return -EINVAL;
 682                         break;
 683         }
 684
 685         /* write kg1 */
 686         buf[0] = 0x00;
 687         nxt200x_writebytes(state, 0x4D, buf, 1);
 688
 689         /* write sdm12 lpf fc */
 690         buf[0] = 0x44;
 691         nxt200x_writebytes(state, 0x55, buf, 1);
 692
 693         /* write agc control reg */
 694         buf[0] = 0x04;
 695         nxt200x_writebytes(state, 0x41, buf, 1);
 696
 697         if (state->demod_chip == NXT2004) {
 698                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 699                 buf[0] = 0x24;
 700                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 701
 702                 /* soft reset? */
 703                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 704                 buf[0] = 0x10;
 705                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 706                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 707                 buf[0] = 0x00;
 708                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 709
 710                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 711                 buf[0] = 0x04;
 712                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 713                 buf[0] = 0x00;
 714                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 715                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 716                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 717                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 718                 buf[0] = 0x11;
 719                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 720                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 721                 buf[0] = 0x44;
 722                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 723         }
 724
 725         /* write agc ucgp0 */
 726         switch (p->u.vsb.modulation) {
 727                 case QAM_64:
 728                                 buf[0] = 0x02;
 729                                 break;
 730                 case QAM_256:
 731                                 buf[0] = 0x03;
 732                                 break;
 733                 case VSB_8:
 734                                 buf[0] = 0x00;
 735                                 break;
 736                 default:
 737                                 return -EINVAL;
 738                                 break;
 739         }
 740         nxt200x_writebytes(state, 0x30, buf, 1);
 741
 742         /* write agc control reg */
 743         buf[0] = 0x00;
 744         nxt200x_writebytes(state, 0x41, buf, 1);
 745
 746         /* write accumulator2 input */
 747         buf[0] = 0x80;
 748         buf[1] = 0x00;
 749         switch (state->demod_chip) {
 750                 case NXT2002:
 751                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
 752                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 753                         break;
 754                 case NXT2004:
 755                         nxt200x_writebytes(state, 0x49, buf, 2);
 756                         nxt200x_writebytes(state, 0x4B, buf, 2);
 757                         break;
 758                 default:
 759                         return -EINVAL;
 760                         break;
 761         }
 762
 763         /* write agc control reg */
 764         buf[0] = 0x04;
 765         nxt200x_writebytes(state, 0x41, buf, 1);
 766
 767         nxt200x_microcontroller_start(state);
 768
 769         if (state->demod_chip == NXT2004) {
 770                 nxt2004_microcontroller_init(state);
 771
 772                 /* ???? */
 773                 buf[0] = 0xF0;
 774                 buf[1] = 0x00;
 775                 nxt200x_writebytes(state, 0x5C, buf, 2);
 776         }
 777
 778         /* adjacent channel detection should be done here, but I don't
 779         have any stations with this need so I cannot test it */
 780
 781         return 0;
 782 }
 783
 784 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 785 {
 786         struct nxt200x_state* state = fe->demodulator_priv;
 787         u8 lock;
 788         nxt200x_readbytes(state, 0x31, &lock, 1);
 789
 790         *status = 0;
 791         if (lock & 0x20) {
 792                 *status |= FE_HAS_SIGNAL;
 793                 *status |= FE_HAS_CARRIER;
 794                 *status |= FE_HAS_VITERBI;
 795                 *status |= FE_HAS_SYNC;
 796                 *status |= FE_HAS_LOCK;
 797         }
 798         return 0;
 799 }
 800
 801 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 802 {
 803         struct nxt200x_state* state = fe->demodulator_priv;
 804         u8 b[3];
 805
 806         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 807
 808         *ber = ((b[0] << 8) + b[1]) * 8;
 809
 810         return 0;
 811 }
 812
 813 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 814 {
 815         struct nxt200x_state* state = fe->demodulator_priv;
 816         u8 b[2];
 817         u16 temp = 0;
 818
 819         /* setup to read cluster variance */
 820         b[0] = 0x00;
 821         nxt200x_writebytes(state, 0xA1, b, 1);
 822
 823         /* get multreg val */
 824         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 825
 826         temp = (b[0] << 8) | b[1];
 827         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 828
 829         return 0;
 830 }
 831
 832 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 833 {
 834
 835         struct nxt200x_state* state = fe->demodulator_priv;
 836         u8 b[2];
 837         u16 temp = 0, temp2;
 838         u32 snrdb = 0;
 839
 840         /* setup to read cluster variance */
 841         b[0] = 0x00;
 842         nxt200x_writebytes(state, 0xA1, b, 1);
 843
 844         /* get multreg val from 0xA6 */
 845         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 846
 847         temp = (b[0] << 8) | b[1];
 848         temp2 = 0x7FFF - temp;
 849
 850         /* snr will be in db */
 851         if (temp2 > 0x7F00)
 852                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 853         else if (temp2 > 0x7EC0)
 854                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 855         else if (temp2 > 0x7C00)
 856                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 857         else
 858                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 859
 860         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 861         *snr = snrdb * (0xFFFF/32000);
 862
 863         return 0;
 864 }
 865
 866 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 867 {
 868         struct nxt200x_state* state = fe->demodulator_priv;
 869         u8 b[3];
 870
 871         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 872         *ucblocks = b[2];
 873
 874         return 0;
 875 }
 876
 877 static int nxt200x_sleep(struct dvb_frontend* fe)
 878 {
 879         return 0;
 880 }
 881
 882 static int nxt2002_init(struct dvb_frontend* fe)
 883 {
 884         struct nxt200x_state* state = fe->demodulator_priv;
 885         const struct firmware *fw;
 886         int ret;
 887         u8 buf[2];
 888
 889         /* request the firmware, this will block until someone uploads it */
 890         printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
 891         ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
 892         printk("nxt2002: Waiting for firmware upload(2)...\n");
 893         if (ret) {
 894                 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
 895                 return ret;
 896         }
 897
 898         ret = nxt2002_load_firmware(fe, fw);
 899         if (ret) {
 900                 printk("nxt2002: Writing firmware to device failed\n");
 901                 release_firmware(fw);
 902                 return ret;
 903         }
 904         printk("nxt2002: Firmware upload complete\n");
 905
 906         /* Put the micro into reset */
 907         nxt200x_microcontroller_stop(state);
 908
 909         /* ensure transfer is complete */
 910         buf[0]=0x00;
 911         nxt200x_writebytes(state, 0x2B, buf, 1);
 912
 913         /* Put the micro into reset for real this time */
 914         nxt200x_microcontroller_stop(state);
 915
 916         /* soft reset everything (agc,frontend,eq,fec)*/
 917         buf[0] = 0x0F;
 918         nxt200x_writebytes(state, 0x08, buf, 1);
 919         buf[0] = 0x00;
 920         nxt200x_writebytes(state, 0x08, buf, 1);
 921
 922         /* write agc sdm configure */
 923         buf[0] = 0xF1;
 924         nxt200x_writebytes(state, 0x57, buf, 1);
 925
 926         /* write mod output format */
 927         buf[0] = 0x20;
 928         nxt200x_writebytes(state, 0x09, buf, 1);
 929
 930         /* write fec mpeg mode */
 931         buf[0] = 0x7E;
 932         buf[1] = 0x00;
 933         nxt200x_writebytes(state, 0xE9, buf, 2);
 934
 935         /* write mux selection */
 936         buf[0] = 0x00;
 937         nxt200x_writebytes(state, 0xCC, buf, 1);
 938
 939         return 0;
 940 }
 941
 942 static int nxt2004_init(struct dvb_frontend* fe)
 943 {
 944         struct nxt200x_state* state = fe->demodulator_priv;
 945         const struct firmware *fw;
 946         int ret;
 947         u8 buf[3];
 948
 949         /* ??? */
 950         buf[0]=0x00;
 951         nxt200x_writebytes(state, 0x1E, buf, 1);
 952
 953         /* request the firmware, this will block until someone uploads it */
 954         printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
 955         ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
 956         printk("nxt2004: Waiting for firmware upload(2)...\n");
 957         if (ret) {
 958                 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
 959                 return ret;
 960         }
 961
 962         ret = nxt2004_load_firmware(fe, fw);
 963         if (ret) {
 964                 printk("nxt2004: Writing firmware to device failed\n");
 965                 release_firmware(fw);
 966                 return ret;
 967         }
 968         printk("nxt2004: Firmware upload complete\n");
 969
 970         /* ensure transfer is complete */
 971         buf[0] = 0x01;
 972         nxt200x_writebytes(state, 0x19, buf, 1);
 973
 974         nxt2004_microcontroller_init(state);
 975         nxt200x_microcontroller_stop(state);
 976         nxt200x_microcontroller_stop(state);
 977         nxt2004_microcontroller_init(state);
 978         nxt200x_microcontroller_stop(state);
 979
 980         /* soft reset everything (agc,frontend,eq,fec)*/
 981         buf[0] = 0xFF;
 982         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 983         buf[0] = 0x00;
 984         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 985
 986         /* write agc sdm configure */
 987         buf[0] = 0xD7;
 988         nxt200x_writebytes(state, 0x57, buf, 1);
 989
 990         /* ???*/
 991         buf[0] = 0x07;
 992         buf[1] = 0xfe;
 993         nxt200x_writebytes(state, 0x35, buf, 2);
 994         buf[0] = 0x12;
 995         nxt200x_writebytes(state, 0x34, buf, 1);
 996         buf[0] = 0x80;
 997         nxt200x_writebytes(state, 0x21, buf, 1);
 998
 999         /* ???*/
1000         buf[0] = 0x21;
1001         nxt200x_writebytes(state, 0x0A, buf, 1);
1002
1003         /* ???*/
1004         buf[0] = 0x01;
1005         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1006
1007         /* write fec mpeg mode */
1008         buf[0] = 0x7E;
1009         buf[1] = 0x00;
1010         nxt200x_writebytes(state, 0xE9, buf, 2);
1011
1012         /* write mux selection */
1013         buf[0] = 0x00;
1014         nxt200x_writebytes(state, 0xCC, buf, 1);
1015
1016         /* ???*/
1017         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1018         buf[0] = 0x00;
1019         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1020
1021         /* soft reset? */
1022         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1023         buf[0] = 0x10;
1024         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1025         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1026         buf[0] = 0x00;
1027         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1028
1029         /* ???*/
1030         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1031         buf[0] = 0x01;
1032         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1033         buf[0] = 0x70;
1034         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1035         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1036         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1037
1038         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1039         buf[0] = 0x11;
1040         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1041         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1042         buf[0] = 0x40;
1043         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1044
1045         nxt200x_readbytes(state, 0x10, buf, 1);
1046         buf[0] = 0x10;
1047         nxt200x_writebytes(state, 0x10, buf, 1);
1048         nxt200x_readbytes(state, 0x0A, buf, 1);
1049         buf[0] = 0x21;
1050         nxt200x_writebytes(state, 0x0A, buf, 1);
1051
1052         nxt2004_microcontroller_init(state);
1053
1054         buf[0] = 0x21;
1055         nxt200x_writebytes(state, 0x0A, buf, 1);
1056         buf[0] = 0x7E;
1057         nxt200x_writebytes(state, 0xE9, buf, 1);
1058         buf[0] = 0x00;
1059         nxt200x_writebytes(state, 0xEA, buf, 1);
1060
1061         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1062         buf[0] = 0x00;
1063         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1064         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1065         buf[0] = 0x00;
1066         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1067
1068         /* soft reset? */
1069         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1070         buf[0] = 0x10;
1071         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1072         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1073         buf[0] = 0x00;
1074         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1075
1076         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1077         buf[0] = 0x04;
1078         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1079         buf[0] = 0x00;
1080         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1081         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1082         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1083
1084         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1085         buf[0] = 0x11;
1086         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1087
1088         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1089         buf[0] = 0x44;
1090         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1091
1092         /* initialize tuner */
1093         nxt200x_readbytes(state, 0x10, buf, 1);
1094         buf[0] = 0x12;
1095         nxt200x_writebytes(state, 0x10, buf, 1);
1096         buf[0] = 0x04;
1097         nxt200x_writebytes(state, 0x13, buf, 1);
1098         buf[0] = 0x00;
1099         nxt200x_writebytes(state, 0x16, buf, 1);
1100         buf[0] = 0x04;
1101         nxt200x_writebytes(state, 0x14, buf, 1);
1102         buf[0] = 0x00;
1103         nxt200x_writebytes(state, 0x14, buf, 1);
1104         nxt200x_writebytes(state, 0x17, buf, 1);
1105         nxt200x_writebytes(state, 0x14, buf, 1);
1106         nxt200x_writebytes(state, 0x17, buf, 1);
1107
1108         return 0;
1109 }
1110
1111 static int nxt200x_init(struct dvb_frontend* fe)
1112 {
1113         struct nxt200x_state* state = fe->demodulator_priv;
1114         int ret = 0;
1115
1116         if (!state->initialised) {
1117                 switch (state->demod_chip) {
1118                         case NXT2002:
1119                                 ret = nxt2002_init(fe);
1120                                 break;
1121                         case NXT2004:
1122                                 ret = nxt2004_init(fe);
1123                                 break;
1124                         default:
1125                                 return -EINVAL;
1126                                 break;
1127                 }
1128                 state->initialised = 1;
1129         }
1130         return ret;
1131 }
1132
1133 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1134 {
1135         fesettings->min_delay_ms = 500;
1136         fesettings->step_size = 0;
1137         fesettings->max_drift = 0;
1138         return 0;
1139 }
1140
1141 static void nxt200x_release(struct dvb_frontend* fe)
1142 {
1143         struct nxt200x_state* state = fe->demodulator_priv;
1144         kfree(state);
1145 }
1146
1147 static struct dvb_frontend_ops nxt200x_ops;
1148
1149 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1150                                    struct i2c_adapter* i2c)
1151 {
1152         struct nxt200x_state* state = NULL;
1153         u8 buf [] = {0,0,0,0,0};
1154
1155         /* allocate memory for the internal state */
1156         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1157         if (state == NULL)
1158                 goto error;
1159
1160         /* setup the state */
1161         state->config = config;
1162         state->i2c = i2c;
1163         state->initialised = 0;
1164
1165         /* read card id */
1166         nxt200x_readbytes(state, 0x00, buf, 5);
1167         dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1168                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1169
1170         /* set demod chip */
1171         switch (buf[0]) {
1172                 case 0x04:
1173                         state->demod_chip = NXT2002;
1174                         printk("nxt200x: NXT2002 Detected\n");
1175                         break;
1176                 case 0x05:
1177                         state->demod_chip = NXT2004;
1178                         printk("nxt200x: NXT2004 Detected\n");
1179                         break;
1180                 default:
1181                         goto error;
1182         }
1183
1184         /* make sure demod chip is supported */
1185         switch (state->demod_chip) {
1186                 case NXT2002:
1187                         if (buf[0] != 0x04) goto error;         /* device id */
1188                         if (buf[1] != 0x02) goto error;         /* fab id */
1189                         if (buf[2] != 0x11) goto error;         /* month */
1190                         if (buf[3] != 0x20) goto error;         /* year msb */
1191                         if (buf[4] != 0x00) goto error;         /* year lsb */
1192                         break;
1193                 case NXT2004:
1194                         if (buf[0] != 0x05) goto error;         /* device id */
1195                         break;
1196                 default:
1197                         goto error;
1198         }
1199
1200         /* create dvb_frontend */
1201         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1202         state->frontend.demodulator_priv = state;
1203         return &state->frontend;
1204
1205 error:
1206         kfree(state);
1207         printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1208                 buf[0], buf[1], buf[2], buf[3], buf[4]);
1209         return NULL;
1210 }
1211
1212 static struct dvb_frontend_ops nxt200x_ops = {
1213
1214         .info = {
1215                 .name = "Nextwave NXT200X VSB/QAM frontend",
1216                 .type = FE_ATSC,
1217                 .frequency_min =  54000000,
1218                 .frequency_max = 860000000,
1219                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1220                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1221                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1222                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1223         },
1224
1225         .release = nxt200x_release,
1226
1227         .init = nxt200x_init,
1228         .sleep = nxt200x_sleep,
1229
1230         .set_frontend = nxt200x_setup_frontend_parameters,
1231         .get_tune_settings = nxt200x_get_tune_settings,
1232
1233         .read_status = nxt200x_read_status,
1234         .read_ber = nxt200x_read_ber,
1235         .read_signal_strength = nxt200x_read_signal_strength,
1236         .read_snr = nxt200x_read_snr,
1237         .read_ucblocks = nxt200x_read_ucblocks,
1238 };
1239
1240 module_param(debug, int, 0644);
1241 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1242
1243 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1244 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1245 MODULE_LICENSE("GPL");
1246
1247 EXPORT_SYMBOL(nxt200x_attach);
1248