git.oblomov.eu Git - linux-2.6/blob - drivers/scsi/aacraid/rx.c

   1 /*
   2  *      Adaptec AAC series RAID controller driver
   3  *      (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
   4  *
   5  * based on the old aacraid driver that is..
   6  * Adaptec aacraid device driver for Linux.
   7  *
   8  * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2, or (at your option)
  13  * any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; see the file COPYING.  If not, write to
  22  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23  *
  24  * Module Name:
  25  *  rx.c
  26  *
  27  * Abstract: Hardware miniport for Drawbridge specific hardware functions.
  28  *
  29  */
  30
  31 #include <linux/kernel.h>
  32 #include <linux/init.h>
  33 #include <linux/types.h>
  34 #include <linux/sched.h>
  35 #include <linux/pci.h>
  36 #include <linux/spinlock.h>
  37 #include <linux/slab.h>
  38 #include <linux/blkdev.h>
  39 #include <linux/delay.h>
  40 #include <linux/completion.h>
  41 #include <linux/time.h>
  42 #include <linux/interrupt.h>
  43 #include <asm/semaphore.h>
  44
  45 #include <scsi/scsi_host.h>
  46
  47 #include "aacraid.h"
  48
  49 static irqreturn_t aac_rx_intr(int irq, void *dev_id, struct pt_regs *regs)
  50 {
  51         struct aac_dev *dev = dev_id;
  52
  53         dprintk((KERN_DEBUG "aac_rx_intr(%d,%p,%p)\n", irq, dev_id, regs));
  54         if (dev->new_comm_interface) {
  55                 u32 Index = rx_readl(dev, MUnit.OutboundQueue);
  56                 if (Index == 0xFFFFFFFFL)
  57                         Index = rx_readl(dev, MUnit.OutboundQueue);
  58                 if (Index != 0xFFFFFFFFL) {
  59                         do {
  60                                 if (aac_intr_normal(dev, Index)) {
  61                                         rx_writel(dev, MUnit.OutboundQueue, Index);
  62                                         rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady);
  63                                 }
  64                                 Index = rx_readl(dev, MUnit.OutboundQueue);
  65                         } while (Index != 0xFFFFFFFFL);
  66                         return IRQ_HANDLED;
  67                 }
  68         } else {
  69                 unsigned long bellbits;
  70                 u8 intstat;
  71                 intstat = rx_readb(dev, MUnit.OISR);
  72                 /*
  73                  *      Read mask and invert because drawbridge is reversed.
  74                  *      This allows us to only service interrupts that have
  75                  *      been enabled.
  76                  *      Check to see if this is our interrupt.  If it isn't just return
  77                  */
  78                 if (intstat & ~(dev->OIMR))
  79                 {
  80                         bellbits = rx_readl(dev, OutboundDoorbellReg);
  81                         if (bellbits & DoorBellPrintfReady) {
  82                                 aac_printf(dev, rx_readl (dev, IndexRegs.Mailbox[5]));
  83                                 rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);
  84                                 rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);
  85                         }
  86                         else if (bellbits & DoorBellAdapterNormCmdReady) {
  87                                 rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);
  88                                 aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);
  89                         }
  90                         else if (bellbits & DoorBellAdapterNormRespReady) {
  91                                 rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);
  92                                 aac_response_normal(&dev->queues->queue[HostNormRespQueue]);
  93                         }
  94                         else if (bellbits & DoorBellAdapterNormCmdNotFull) {
  95                                 rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  96                         }
  97                         else if (bellbits & DoorBellAdapterNormRespNotFull) {
  98                                 rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  99                                 rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);
 100                         }
 101                         return IRQ_HANDLED;
 102                 }
 103         }
 104         return IRQ_NONE;
 105 }
 106
 107 /**
 108  *      aac_rx_disable_interrupt        -       Disable interrupts
 109  *      @dev: Adapter
 110  */
 111
 112 static void aac_rx_disable_interrupt(struct aac_dev *dev)
 113 {
 114         rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
 115 }
 116
 117 /**
 118  *      rx_sync_cmd     -       send a command and wait
 119  *      @dev: Adapter
 120  *      @command: Command to execute
 121  *      @p1: first parameter
 122  *      @ret: adapter status
 123  *
 124  *      This routine will send a synchronous command to the adapter and wait
 125  *      for its completion.
 126  */
 127
 128 static int rx_sync_cmd(struct aac_dev *dev, u32 command,
 129         u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
 130         u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
 131 {
 132         unsigned long start;
 133         int ok;
 134         /*
 135          *      Write the command into Mailbox 0
 136          */
 137         rx_writel(dev, InboundMailbox0, command);
 138         /*
 139          *      Write the parameters into Mailboxes 1 - 6
 140          */
 141         rx_writel(dev, InboundMailbox1, p1);
 142         rx_writel(dev, InboundMailbox2, p2);
 143         rx_writel(dev, InboundMailbox3, p3);
 144         rx_writel(dev, InboundMailbox4, p4);
 145         /*
 146          *      Clear the synch command doorbell to start on a clean slate.
 147          */
 148         rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
 149         /*
 150          *      Disable doorbell interrupts
 151          */
 152         rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
 153         /*
 154          *      Force the completion of the mask register write before issuing
 155          *      the interrupt.
 156          */
 157         rx_readb (dev, MUnit.OIMR);
 158         /*
 159          *      Signal that there is a new synch command
 160          */
 161         rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);
 162
 163         ok = 0;
 164         start = jiffies;
 165
 166         /*
 167          *      Wait up to 30 seconds
 168          */
 169         while (time_before(jiffies, start+30*HZ))
 170         {
 171                 udelay(5);      /* Delay 5 microseconds to let Mon960 get info. */
 172                 /*
 173                  *      Mon960 will set doorbell0 bit when it has completed the command.
 174                  */
 175                 if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {
 176                         /*
 177                          *      Clear the doorbell.
 178                          */
 179                         rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
 180                         ok = 1;
 181                         break;
 182                 }
 183                 /*
 184                  *      Yield the processor in case we are slow
 185                  */
 186                 schedule_timeout_uninterruptible(1);
 187         }
 188         if (ok != 1) {
 189                 /*
 190                  *      Restore interrupt mask even though we timed out
 191                  */
 192                 if (dev->new_comm_interface)
 193                         rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
 194                 else
 195                         rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
 196                 return -ETIMEDOUT;
 197         }
 198         /*
 199          *      Pull the synch status from Mailbox 0.
 200          */
 201         if (status)
 202                 *status = rx_readl(dev, IndexRegs.Mailbox[0]);
 203         if (r1)
 204                 *r1 = rx_readl(dev, IndexRegs.Mailbox[1]);
 205         if (r2)
 206                 *r2 = rx_readl(dev, IndexRegs.Mailbox[2]);
 207         if (r3)
 208                 *r3 = rx_readl(dev, IndexRegs.Mailbox[3]);
 209         if (r4)
 210                 *r4 = rx_readl(dev, IndexRegs.Mailbox[4]);
 211         /*
 212          *      Clear the synch command doorbell.
 213          */
 214         rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
 215         /*
 216          *      Restore interrupt mask
 217          */
 218         if (dev->new_comm_interface)
 219                 rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
 220         else
 221                 rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
 222         return 0;
 223
 224 }
 225
 226 /**
 227  *      aac_rx_interrupt_adapter        -       interrupt adapter
 228  *      @dev: Adapter
 229  *
 230  *      Send an interrupt to the i960 and breakpoint it.
 231  */
 232
 233 static void aac_rx_interrupt_adapter(struct aac_dev *dev)
 234 {
 235         rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
 236 }
 237
 238 /**
 239  *      aac_rx_notify_adapter           -       send an event to the adapter
 240  *      @dev: Adapter
 241  *      @event: Event to send
 242  *
 243  *      Notify the i960 that something it probably cares about has
 244  *      happened.
 245  */
 246
 247 static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event)
 248 {
 249         switch (event) {
 250
 251         case AdapNormCmdQue:
 252                 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);
 253                 break;
 254         case HostNormRespNotFull:
 255                 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);
 256                 break;
 257         case AdapNormRespQue:
 258                 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);
 259                 break;
 260         case HostNormCmdNotFull:
 261                 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);
 262                 break;
 263         case HostShutdown:
 264 //              rx_sync_cmd(dev, HOST_CRASHING, 0, 0, 0, 0, 0, 0,
 265 //                NULL, NULL, NULL, NULL, NULL);
 266                 break;
 267         case FastIo:
 268                 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);
 269                 break;
 270         case AdapPrintfDone:
 271                 rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);
 272                 break;
 273         default:
 274                 BUG();
 275                 break;
 276         }
 277 }
 278
 279 /**
 280  *      aac_rx_start_adapter            -       activate adapter
 281  *      @dev:   Adapter
 282  *
 283  *      Start up processing on an i960 based AAC adapter
 284  */
 285
 286 static void aac_rx_start_adapter(struct aac_dev *dev)
 287 {
 288         struct aac_init *init;
 289
 290         init = dev->init;
 291         init->HostElapsedSeconds = cpu_to_le32(get_seconds());
 292         // We can only use a 32 bit address here
 293         rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
 294           0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
 295 }
 296
 297 /**
 298  *      aac_rx_check_health
 299  *      @dev: device to check if healthy
 300  *
 301  *      Will attempt to determine if the specified adapter is alive and
 302  *      capable of handling requests, returning 0 if alive.
 303  */
 304 static int aac_rx_check_health(struct aac_dev *dev)
 305 {
 306         u32 status = rx_readl(dev, MUnit.OMRx[0]);
 307
 308         /*
 309          *      Check to see if the board failed any self tests.
 310          */
 311         if (status & SELF_TEST_FAILED)
 312                 return -1;
 313         /*
 314          *      Check to see if the board panic'd.
 315          */
 316         if (status & KERNEL_PANIC) {
 317                 char * buffer;
 318                 struct POSTSTATUS {
 319                         __le32 Post_Command;
 320                         __le32 Post_Address;
 321                 } * post;
 322                 dma_addr_t paddr, baddr;
 323                 int ret;
 324
 325                 if ((status & 0xFF000000L) == 0xBC000000L)
 326                         return (status >> 16) & 0xFF;
 327                 buffer = pci_alloc_consistent(dev->pdev, 512, &baddr);
 328                 ret = -2;
 329                 if (buffer == NULL)
 330                         return ret;
 331                 post = pci_alloc_consistent(dev->pdev,
 332                   sizeof(struct POSTSTATUS), &paddr);
 333                 if (post == NULL) {
 334                         pci_free_consistent(dev->pdev, 512, buffer, baddr);
 335                         return ret;
 336                 }
 337                 memset(buffer, 0, 512);
 338                 post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
 339                 post->Post_Address = cpu_to_le32(baddr);
 340                 rx_writel(dev, MUnit.IMRx[0], paddr);
 341                 rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
 342                   NULL, NULL, NULL, NULL, NULL);
 343                 pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS),
 344                   post, paddr);
 345                 if ((buffer[0] == '0') && (buffer[1] == 'x')) {
 346                         ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10);
 347                         ret <<= 4;
 348                         ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10);
 349                 }
 350                 pci_free_consistent(dev->pdev, 512, buffer, baddr);
 351                 return ret;
 352         }
 353         /*
 354          *      Wait for the adapter to be up and running.
 355          */
 356         if (!(status & KERNEL_UP_AND_RUNNING))
 357                 return -3;
 358         /*
 359          *      Everything is OK
 360          */
 361         return 0;
 362 }
 363
 364 /**
 365  *      aac_rx_send
 366  *      @fib: fib to issue
 367  *
 368  *      Will send a fib, returning 0 if successful.
 369  */
 370 static int aac_rx_send(struct fib * fib)
 371 {
 372         u64 addr = fib->hw_fib_pa;
 373         struct aac_dev *dev = fib->dev;
 374         volatile void __iomem *device = dev->regs.rx;
 375         u32 Index;
 376
 377         dprintk((KERN_DEBUG "%p->aac_rx_send(%p->%llx)\n", dev, fib, addr));
 378         Index = rx_readl(dev, MUnit.InboundQueue);
 379         if (Index == 0xFFFFFFFFL)
 380                 Index = rx_readl(dev, MUnit.InboundQueue);
 381         dprintk((KERN_DEBUG "Index = 0x%x\n", Index));
 382         if (Index == 0xFFFFFFFFL)
 383                 return Index;
 384         device += Index;
 385         dprintk((KERN_DEBUG "entry = %x %x %u\n", (u32)(addr & 0xffffffff),
 386           (u32)(addr >> 32), (u32)le16_to_cpu(fib->hw_fib->header.Size)));
 387         writel((u32)(addr & 0xffffffff), device);
 388         device += sizeof(u32);
 389         writel((u32)(addr >> 32), device);
 390         device += sizeof(u32);
 391         writel(le16_to_cpu(fib->hw_fib->header.Size), device);
 392         rx_writel(dev, MUnit.InboundQueue, Index);
 393         dprintk((KERN_DEBUG "aac_rx_send - return 0\n"));
 394         return 0;
 395 }
 396
 397 /**
 398  *      aac_rx_init     -       initialize an i960 based AAC card
 399  *      @dev: device to configure
 400  *
 401  *      Allocate and set up resources for the i960 based AAC variants. The
 402  *      device_interface in the commregion will be allocated and linked
 403  *      to the comm region.
 404  */
 405
 406 int aac_rx_init(struct aac_dev *dev)
 407 {
 408         unsigned long start;
 409         unsigned long status;
 410         int instance;
 411         const char * name;
 412
 413         instance = dev->id;
 414         name     = dev->name;
 415
 416         /*
 417          *      Check to see if the board panic'd while booting.
 418          */
 419         /*
 420          *      Check to see if the board failed any self tests.
 421          */
 422         if (rx_readl(dev, MUnit.OMRx[0]) & SELF_TEST_FAILED) {
 423                 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
 424                 goto error_iounmap;
 425         }
 426         /*
 427          *      Check to see if the board panic'd while booting.
 428          */
 429         if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) {
 430                 printk(KERN_ERR "%s%d: adapter kernel panic.\n", dev->name, instance);
 431                 goto error_iounmap;
 432         }
 433         /*
 434          *      Check to see if the monitor panic'd while booting.
 435          */
 436         if (rx_readl(dev, MUnit.OMRx[0]) & MONITOR_PANIC) {
 437                 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
 438                 goto error_iounmap;
 439         }
 440         start = jiffies;
 441         /*
 442          *      Wait for the adapter to be up and running. Wait up to 3 minutes
 443          */
 444         while ((!(rx_readl(dev, IndexRegs.Mailbox[7]) & KERNEL_UP_AND_RUNNING))
 445                 || (!(rx_readl(dev, MUnit.OMRx[0]) & KERNEL_UP_AND_RUNNING)))
 446         {
 447                 if(time_after(jiffies, start+180*HZ))
 448                 {
 449                         status = rx_readl(dev, IndexRegs.Mailbox[7]);
 450                         printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
 451                                         dev->name, instance, status);
 452                         goto error_iounmap;
 453                 }
 454                 schedule_timeout_uninterruptible(1);
 455         }
 456         if (request_irq(dev->scsi_host_ptr->irq, aac_rx_intr, SA_SHIRQ|SA_INTERRUPT, "aacraid", (void *)dev)<0)
 457         {
 458                 printk(KERN_ERR "%s%d: Interrupt unavailable.\n", name, instance);
 459                 goto error_iounmap;
 460         }
 461         /*
 462          *      Fill in the function dispatch table.
 463          */
 464         dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter;
 465         dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt;
 466         dev->a_ops.adapter_notify = aac_rx_notify_adapter;
 467         dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
 468         dev->a_ops.adapter_check_health = aac_rx_check_health;
 469         dev->a_ops.adapter_send = aac_rx_send;
 470
 471         /*
 472          *      First clear out all interrupts.  Then enable the one's that we
 473          *      can handle.
 474          */
 475         rx_writeb(dev, MUnit.OIMR, 0xff);
 476         rx_writel(dev, MUnit.ODR, 0xffffffff);
 477         rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
 478
 479         if (aac_init_adapter(dev) == NULL)
 480                 goto error_irq;
 481         if (dev->new_comm_interface)
 482                 rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
 483
 484         /*
 485          *      Tell the adapter that all is configured, and it can start
 486          *      accepting requests
 487          */
 488         aac_rx_start_adapter(dev);
 489         return 0;
 490
 491 error_irq:
 492         rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
 493         free_irq(dev->scsi_host_ptr->irq, (void *)dev);
 494
 495 error_iounmap:
 496
 497         return -1;
 498 }