2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 * Interrupt exception dispatch code.
21 #include <asm/mipsregs.h>
22 #include <asm/regdef.h>
23 #include <asm/stackframe.h>
28 NESTED(lasatIRQ, PT_SIZE, sp)
35 mfc0 s0, CP0_CAUSE # get irq mask
37 /* First we check for r4k counter/timer IRQ. */
38 andi a0, s0, CAUSEF_IP7
40 andi a0, s0, CAUSEF_IP2 # delay slot, check hw0 interrupt
42 /* Wheee, a timer interrupt. */
44 jal ll_timer_interrupt
51 /* Wheee, combined hardware level zero interrupt. */
52 jal lasat_hw0_irqdispatch
53 move a0, sp # delay slot
60 * Here by mistake? This is possible, what can happen is that by the
61 * time we take the exception the IRQ pin goes low, so just leave if