Merge branch 'upstream-fixes' of git://lost.foo-projects.org/~ahkok/git/netdev-2...
[linux-2.6] / drivers / char / agp / via-agp.c
1 /*
2  * VIA AGPGART routines.
3  */
4
5 #include <linux/types.h>
6 #include <linux/module.h>
7 #include <linux/pci.h>
8 #include <linux/init.h>
9 #include <linux/agp_backend.h>
10 #include "agp.h"
11
12 static const struct pci_device_id agp_via_pci_table[];
13
14 #define VIA_GARTCTRL    0x80
15 #define VIA_APSIZE      0x84
16 #define VIA_ATTBASE     0x88
17
18 #define VIA_AGP3_GARTCTRL       0x90
19 #define VIA_AGP3_APSIZE         0x94
20 #define VIA_AGP3_ATTBASE        0x98
21 #define VIA_AGPSEL              0xfd
22
23 static int via_fetch_size(void)
24 {
25         int i;
26         u8 temp;
27         struct aper_size_info_8 *values;
28
29         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
30         pci_read_config_byte(agp_bridge->dev, VIA_APSIZE, &temp);
31         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
32                 if (temp == values[i].size_value) {
33                         agp_bridge->previous_size =
34                             agp_bridge->current_size = (void *) (values + i);
35                         agp_bridge->aperture_size_idx = i;
36                         return values[i].size;
37                 }
38         }
39         printk(KERN_ERR PFX "Unknown aperture size from AGP bridge (0x%x)\n", temp);
40         return 0;
41 }
42
43
44 static int via_configure(void)
45 {
46         u32 temp;
47         struct aper_size_info_8 *current_size;
48
49         current_size = A_SIZE_8(agp_bridge->current_size);
50         /* aperture size */
51         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
52                               current_size->size_value);
53         /* address to map too */
54         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
55         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
56
57         /* GART control register */
58         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
59
60         /* attbase - aperture GATT base */
61         pci_write_config_dword(agp_bridge->dev, VIA_ATTBASE,
62                             (agp_bridge->gatt_bus_addr & 0xfffff000) | 3);
63         return 0;
64 }
65
66
67 static void via_cleanup(void)
68 {
69         struct aper_size_info_8 *previous_size;
70
71         previous_size = A_SIZE_8(agp_bridge->previous_size);
72         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
73                               previous_size->size_value);
74         /* Do not disable by writing 0 to VIA_ATTBASE, it screws things up
75          * during reinitialization.
76          */
77 }
78
79
80 static void via_tlbflush(struct agp_memory *mem)
81 {
82         u32 temp;
83
84         pci_read_config_dword(agp_bridge->dev, VIA_GARTCTRL, &temp);
85         temp |= (1<<7);
86         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
87         temp &= ~(1<<7);
88         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
89 }
90
91
92 static struct aper_size_info_8 via_generic_sizes[9] =
93 {
94         {256, 65536, 6, 0},
95         {128, 32768, 5, 128},
96         {64, 16384, 4, 192},
97         {32, 8192, 3, 224},
98         {16, 4096, 2, 240},
99         {8, 2048, 1, 248},
100         {4, 1024, 0, 252},
101         {2, 512, 0, 254},
102         {1, 256, 0, 255}
103 };
104
105
106 static int via_fetch_size_agp3(void)
107 {
108         int i;
109         u16 temp;
110         struct aper_size_info_16 *values;
111
112         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
113         pci_read_config_word(agp_bridge->dev, VIA_AGP3_APSIZE, &temp);
114         temp &= 0xfff;
115
116         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
117                 if (temp == values[i].size_value) {
118                         agp_bridge->previous_size =
119                                 agp_bridge->current_size = (void *) (values + i);
120                         agp_bridge->aperture_size_idx = i;
121                         return values[i].size;
122                 }
123         }
124         return 0;
125 }
126
127
128 static int via_configure_agp3(void)
129 {
130         u32 temp;
131         struct aper_size_info_16 *current_size;
132
133         current_size = A_SIZE_16(agp_bridge->current_size);
134
135         /* address to map too */
136         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
137         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
138
139         /* attbase - aperture GATT base */
140         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE,
141                 agp_bridge->gatt_bus_addr & 0xfffff000);
142
143         /* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
144          *    translation table first.
145          * 2. Enable AGP aperture in RX91<0>. This bit controls the enabling of the
146          *    graphics AGP aperture for the AGP3.0 port.
147          */
148         pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
149         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7));
150         return 0;
151 }
152
153
154 static void via_cleanup_agp3(void)
155 {
156         struct aper_size_info_16 *previous_size;
157
158         previous_size = A_SIZE_16(agp_bridge->previous_size);
159         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE, previous_size->size_value);
160 }
161
162
163 static void via_tlbflush_agp3(struct agp_memory *mem)
164 {
165         u32 temp;
166
167         pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
168         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp & ~(1<<7));
169         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp);
170 }
171
172
173 static struct agp_bridge_driver via_agp3_driver = {
174         .owner                  = THIS_MODULE,
175         .aperture_sizes         = agp3_generic_sizes,
176         .size_type              = U8_APER_SIZE,
177         .num_aperture_sizes     = 10,
178         .configure              = via_configure_agp3,
179         .fetch_size             = via_fetch_size_agp3,
180         .cleanup                = via_cleanup_agp3,
181         .tlb_flush              = via_tlbflush_agp3,
182         .mask_memory            = agp_generic_mask_memory,
183         .masks                  = NULL,
184         .agp_enable             = agp_generic_enable,
185         .cache_flush            = global_cache_flush,
186         .create_gatt_table      = agp_generic_create_gatt_table,
187         .free_gatt_table        = agp_generic_free_gatt_table,
188         .insert_memory          = agp_generic_insert_memory,
189         .remove_memory          = agp_generic_remove_memory,
190         .alloc_by_type          = agp_generic_alloc_by_type,
191         .free_by_type           = agp_generic_free_by_type,
192         .agp_alloc_page         = agp_generic_alloc_page,
193         .agp_destroy_page       = agp_generic_destroy_page,
194 };
195
196 static struct agp_bridge_driver via_driver = {
197         .owner                  = THIS_MODULE,
198         .aperture_sizes         = via_generic_sizes,
199         .size_type              = U8_APER_SIZE,
200         .num_aperture_sizes     = 9,
201         .configure              = via_configure,
202         .fetch_size             = via_fetch_size,
203         .cleanup                = via_cleanup,
204         .tlb_flush              = via_tlbflush,
205         .mask_memory            = agp_generic_mask_memory,
206         .masks                  = NULL,
207         .agp_enable             = agp_generic_enable,
208         .cache_flush            = global_cache_flush,
209         .create_gatt_table      = agp_generic_create_gatt_table,
210         .free_gatt_table        = agp_generic_free_gatt_table,
211         .insert_memory          = agp_generic_insert_memory,
212         .remove_memory          = agp_generic_remove_memory,
213         .alloc_by_type          = agp_generic_alloc_by_type,
214         .free_by_type           = agp_generic_free_by_type,
215         .agp_alloc_page         = agp_generic_alloc_page,
216         .agp_destroy_page       = agp_generic_destroy_page,
217 };
218
219 static struct agp_device_ids via_agp_device_ids[] __devinitdata =
220 {
221         {
222                 .device_id      = PCI_DEVICE_ID_VIA_82C597_0,
223                 .chipset_name   = "Apollo VP3",
224         },
225
226         {
227                 .device_id      = PCI_DEVICE_ID_VIA_82C598_0,
228                 .chipset_name   = "Apollo MVP3",
229         },
230
231         {
232                 .device_id      = PCI_DEVICE_ID_VIA_8501_0,
233                 .chipset_name   = "Apollo MVP4",
234         },
235
236         /* VT8601 */
237         {
238                 .device_id      = PCI_DEVICE_ID_VIA_8601_0,
239                 .chipset_name   = "Apollo ProMedia/PLE133Ta",
240         },
241
242         /* VT82C693A / VT28C694T */
243         {
244                 .device_id      = PCI_DEVICE_ID_VIA_82C691_0,
245                 .chipset_name   = "Apollo Pro 133",
246         },
247
248         {
249                 .device_id      = PCI_DEVICE_ID_VIA_8371_0,
250                 .chipset_name   = "KX133",
251         },
252
253         /* VT8633 */
254         {
255                 .device_id      = PCI_DEVICE_ID_VIA_8633_0,
256                 .chipset_name   = "Pro 266",
257         },
258
259         {
260                 .device_id      = PCI_DEVICE_ID_VIA_XN266,
261                 .chipset_name   = "Apollo Pro266",
262         },
263
264         /* VT8361 */
265         {
266                 .device_id      = PCI_DEVICE_ID_VIA_8361,
267                 .chipset_name   = "KLE133",
268         },
269
270         /* VT8365 / VT8362 */
271         {
272                 .device_id      = PCI_DEVICE_ID_VIA_8363_0,
273                 .chipset_name   = "Twister-K/KT133x/KM133",
274         },
275
276         /* VT8753A */
277         {
278                 .device_id      = PCI_DEVICE_ID_VIA_8753_0,
279                 .chipset_name   = "P4X266",
280         },
281
282         /* VT8366 */
283         {
284                 .device_id      = PCI_DEVICE_ID_VIA_8367_0,
285                 .chipset_name   = "KT266/KY266x/KT333",
286         },
287
288         /* VT8633 (for CuMine/ Celeron) */
289         {
290                 .device_id      = PCI_DEVICE_ID_VIA_8653_0,
291                 .chipset_name   = "Pro266T",
292         },
293
294         /* KM266 / PM266 */
295         {
296                 .device_id      = PCI_DEVICE_ID_VIA_XM266,
297                 .chipset_name   = "PM266/KM266",
298         },
299
300         /* CLE266 */
301         {
302                 .device_id      = PCI_DEVICE_ID_VIA_862X_0,
303                 .chipset_name   = "CLE266",
304         },
305
306         {
307                 .device_id      = PCI_DEVICE_ID_VIA_8377_0,
308                 .chipset_name   = "KT400/KT400A/KT600",
309         },
310
311         /* VT8604 / VT8605 / VT8603
312          * (Apollo Pro133A chipset with S3 Savage4) */
313         {
314                 .device_id      = PCI_DEVICE_ID_VIA_8605_0,
315                 .chipset_name   = "ProSavage PM133/PL133/PN133"
316         },
317
318         /* P4M266x/P4N266 */
319         {
320                 .device_id      = PCI_DEVICE_ID_VIA_8703_51_0,
321                 .chipset_name   = "P4M266x/P4N266",
322         },
323
324         /* VT8754 */
325         {
326                 .device_id      = PCI_DEVICE_ID_VIA_8754C_0,
327                 .chipset_name   = "PT800",
328         },
329
330         /* P4X600 */
331         {
332                 .device_id      = PCI_DEVICE_ID_VIA_8763_0,
333                 .chipset_name   = "P4X600"
334         },
335
336         /* KM400 */
337         {
338                 .device_id      = PCI_DEVICE_ID_VIA_8378_0,
339                 .chipset_name   = "KM400/KM400A",
340         },
341
342         /* PT880 */
343         {
344                 .device_id      = PCI_DEVICE_ID_VIA_PT880,
345                 .chipset_name   = "PT880",
346         },
347
348         /* PT880 Ultra */
349         {
350                 .device_id      = PCI_DEVICE_ID_VIA_PT880ULTRA,
351                 .chipset_name   = "PT880 Ultra",
352         },
353
354         /* PT890 */
355         {
356                 .device_id      = PCI_DEVICE_ID_VIA_8783_0,
357                 .chipset_name   = "PT890",
358         },
359
360         /* PM800/PN800/PM880/PN880 */
361         {
362                 .device_id      = PCI_DEVICE_ID_VIA_PX8X0_0,
363                 .chipset_name   = "PM800/PN800/PM880/PN880",
364         },
365         /* KT880 */
366         {
367                 .device_id      = PCI_DEVICE_ID_VIA_3269_0,
368                 .chipset_name   = "KT880",
369         },
370         /* KTxxx/Px8xx */
371         {
372                 .device_id      = PCI_DEVICE_ID_VIA_83_87XX_1,
373                 .chipset_name   = "VT83xx/VT87xx/KTxxx/Px8xx",
374         },
375         /* P4M800 */
376         {
377                 .device_id      = PCI_DEVICE_ID_VIA_3296_0,
378                 .chipset_name   = "P4M800",
379         },
380         /* P4M800CE */
381         {
382                 .device_id      = PCI_DEVICE_ID_VIA_P4M800CE,
383                 .chipset_name   = "P4M800CE",
384         },
385
386         { }, /* dummy final entry, always present */
387 };
388
389
390 /*
391  * VIA's AGP3 chipsets do magick to put the AGP bridge compliant
392  * with the same standards version as the graphics card.
393  */
394 static void check_via_agp3 (struct agp_bridge_data *bridge)
395 {
396         u8 reg;
397
398         pci_read_config_byte(bridge->dev, VIA_AGPSEL, &reg);
399         /* Check AGP 2.0 compatibility mode. */
400         if ((reg & (1<<1))==0)
401                 bridge->driver = &via_agp3_driver;
402 }
403
404
405 static int __devinit agp_via_probe(struct pci_dev *pdev,
406                                    const struct pci_device_id *ent)
407 {
408         struct agp_device_ids *devs = via_agp_device_ids;
409         struct agp_bridge_data *bridge;
410         int j = 0;
411         u8 cap_ptr;
412
413         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
414         if (!cap_ptr)
415                 return -ENODEV;
416
417         j = ent - agp_via_pci_table;
418         printk (KERN_INFO PFX "Detected VIA %s chipset\n", devs[j].chipset_name);
419
420         bridge = agp_alloc_bridge();
421         if (!bridge)
422                 return -ENOMEM;
423
424         bridge->dev = pdev;
425         bridge->capndx = cap_ptr;
426         bridge->driver = &via_driver;
427
428         /*
429          * Garg, there are KT400s with KT266 IDs.
430          */
431         if (pdev->device == PCI_DEVICE_ID_VIA_8367_0) {
432                 /* Is there a KT400 subsystem ? */
433                 if (pdev->subsystem_device == PCI_DEVICE_ID_VIA_8377_0) {
434                         printk(KERN_INFO PFX "Found KT400 in disguise as a KT266.\n");
435                         check_via_agp3(bridge);
436                 }
437         }
438
439         /* If this is an AGP3 bridge, check which mode its in and adjust. */
440         get_agp_version(bridge);
441         if (bridge->major_version >= 3)
442                 check_via_agp3(bridge);
443
444         /* Fill in the mode register */
445         pci_read_config_dword(pdev,
446                         bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
447
448         pci_set_drvdata(pdev, bridge);
449         return agp_add_bridge(bridge);
450 }
451
452 static void __devexit agp_via_remove(struct pci_dev *pdev)
453 {
454         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
455
456         agp_remove_bridge(bridge);
457         agp_put_bridge(bridge);
458 }
459
460 #ifdef CONFIG_PM
461
462 static int agp_via_suspend(struct pci_dev *pdev, pm_message_t state)
463 {
464         pci_save_state (pdev);
465         pci_set_power_state (pdev, PCI_D3hot);
466
467         return 0;
468 }
469
470 static int agp_via_resume(struct pci_dev *pdev)
471 {
472         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
473
474         pci_set_power_state (pdev, PCI_D0);
475         pci_restore_state(pdev);
476
477         if (bridge->driver == &via_agp3_driver)
478                 return via_configure_agp3();
479         else if (bridge->driver == &via_driver)
480                 return via_configure();
481
482         return 0;
483 }
484
485 #endif /* CONFIG_PM */
486
487 /* must be the same order as name table above */
488 static const struct pci_device_id agp_via_pci_table[] = {
489 #define ID(x) \
490         {                                               \
491         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
492         .class_mask     = ~0,                           \
493         .vendor         = PCI_VENDOR_ID_VIA,            \
494         .device         = x,                            \
495         .subvendor      = PCI_ANY_ID,                   \
496         .subdevice      = PCI_ANY_ID,                   \
497         }
498         ID(PCI_DEVICE_ID_VIA_82C597_0),
499         ID(PCI_DEVICE_ID_VIA_82C598_0),
500         ID(PCI_DEVICE_ID_VIA_8501_0),
501         ID(PCI_DEVICE_ID_VIA_8601_0),
502         ID(PCI_DEVICE_ID_VIA_82C691_0),
503         ID(PCI_DEVICE_ID_VIA_8371_0),
504         ID(PCI_DEVICE_ID_VIA_8633_0),
505         ID(PCI_DEVICE_ID_VIA_XN266),
506         ID(PCI_DEVICE_ID_VIA_8361),
507         ID(PCI_DEVICE_ID_VIA_8363_0),
508         ID(PCI_DEVICE_ID_VIA_8753_0),
509         ID(PCI_DEVICE_ID_VIA_8367_0),
510         ID(PCI_DEVICE_ID_VIA_8653_0),
511         ID(PCI_DEVICE_ID_VIA_XM266),
512         ID(PCI_DEVICE_ID_VIA_862X_0),
513         ID(PCI_DEVICE_ID_VIA_8377_0),
514         ID(PCI_DEVICE_ID_VIA_8605_0),
515         ID(PCI_DEVICE_ID_VIA_8703_51_0),
516         ID(PCI_DEVICE_ID_VIA_8754C_0),
517         ID(PCI_DEVICE_ID_VIA_8763_0),
518         ID(PCI_DEVICE_ID_VIA_8378_0),
519         ID(PCI_DEVICE_ID_VIA_PT880),
520         ID(PCI_DEVICE_ID_VIA_PT880ULTRA),
521         ID(PCI_DEVICE_ID_VIA_8783_0),
522         ID(PCI_DEVICE_ID_VIA_PX8X0_0),
523         ID(PCI_DEVICE_ID_VIA_3269_0),
524         ID(PCI_DEVICE_ID_VIA_83_87XX_1),
525         ID(PCI_DEVICE_ID_VIA_3296_0),
526         ID(PCI_DEVICE_ID_VIA_P4M800CE),
527         { }
528 };
529
530 MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
531
532
533 static struct pci_driver agp_via_pci_driver = {
534         .name           = "agpgart-via",
535         .id_table       = agp_via_pci_table,
536         .probe          = agp_via_probe,
537         .remove         = agp_via_remove,
538 #ifdef CONFIG_PM
539         .suspend        = agp_via_suspend,
540         .resume         = agp_via_resume,
541 #endif
542 };
543
544
545 static int __init agp_via_init(void)
546 {
547         if (agp_off)
548                 return -EINVAL;
549         return pci_register_driver(&agp_via_pci_driver);
550 }
551
552 static void __exit agp_via_cleanup(void)
553 {
554         pci_unregister_driver(&agp_via_pci_driver);
555 }
556
557 module_init(agp_via_init);
558 module_exit(agp_via_cleanup);
559
560 MODULE_LICENSE("GPL");
561 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");