Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
[linux-2.6] / arch / powerpc / boot / dts / lite5200.dts
1 /*
2  * Lite5200 board Device Tree Source
3  *
4  * Copyright 2006 Secret Lab Technologies Ltd.
5  * Grant Likely <grant.likely@secretlab.ca>
6  *
7  * This program is free software; you can redistribute  it and/or modify it
8  * under  the terms of  the GNU General  Public License as published by the
9  * Free Software Foundation;  either version 2 of the  License, or (at your
10  * option) any later version.
11  */
12
13 /*
14  * WARNING: Do not depend on this tree layout remaining static just yet.
15  * The MPC5200 device tree conventions are still in flux
16  * Keep an eye on the linuxppc-dev mailing list for more details
17  */
18
19 / {
20         model = "Lite5200";
21         compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx";
22         #address-cells = <1>;
23         #size-cells = <1>;
24
25         cpus {
26                 #cpus = <1>;
27                 #address-cells = <1>;
28                 #size-cells = <0>;
29
30                 PowerPC,5200@0 {
31                         device_type = "cpu";
32                         reg = <0>;
33                         d-cache-line-size = <20>;
34                         i-cache-line-size = <20>;
35                         d-cache-size = <4000>;          // L1, 16K
36                         i-cache-size = <4000>;          // L1, 16K
37                         timebase-frequency = <0>;       // from bootloader
38                         bus-frequency = <0>;            // from bootloader
39                         clock-frequency = <0>;          // from bootloader
40                         32-bit;
41                 };
42         };
43
44         memory {
45                 device_type = "memory";
46                 reg = <00000000 04000000>;      // 64MB
47         };
48
49         soc5200@f0000000 {
50                 #interrupt-cells = <3>;
51                 device_type = "soc";
52                 ranges = <0 f0000000 f0010000>;
53                 reg = <f0000000 00010000>;
54                 bus-frequency = <0>;            // from bootloader
55
56                 cdm@200 {
57                         compatible = "mpc5200-cdm\0mpc52xx-cdm";
58                         reg = <200 38>;
59                 };
60
61                 pic@500 {
62                         // 5200 interrupts are encoded into two levels;
63                         linux,phandle = <500>;
64                         interrupt-controller;
65                         #interrupt-cells = <3>;
66                         device_type = "interrupt-controller";
67                         compatible = "mpc5200-pic\0mpc52xx-pic";
68                         reg = <500 80>;
69                         built-in;
70                 };
71
72                 gpt@600 {       // General Purpose Timer
73                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
74                         device_type = "gpt";
75                         reg = <600 10>;
76                         interrupts = <1 9 0>;
77                         interrupt-parent = <500>;
78                 };
79
80                 gpt@610 {       // General Purpose Timer
81                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
82                         device_type = "gpt";
83                         reg = <610 10>;
84                         interrupts = <1 a 0>;
85                         interrupt-parent = <500>;
86                 };
87
88                 gpt@620 {       // General Purpose Timer
89                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
90                         device_type = "gpt";
91                         reg = <620 10>;
92                         interrupts = <1 b 0>;
93                         interrupt-parent = <500>;
94                 };
95
96                 gpt@630 {       // General Purpose Timer
97                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
98                         device_type = "gpt";
99                         reg = <630 10>;
100                         interrupts = <1 c 0>;
101                         interrupt-parent = <500>;
102                 };
103
104                 gpt@640 {       // General Purpose Timer
105                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
106                         device_type = "gpt";
107                         reg = <640 10>;
108                         interrupts = <1 d 0>;
109                         interrupt-parent = <500>;
110                 };
111
112                 gpt@650 {       // General Purpose Timer
113                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
114                         device_type = "gpt";
115                         reg = <650 10>;
116                         interrupts = <1 e 0>;
117                         interrupt-parent = <500>;
118                 };
119
120                 gpt@660 {       // General Purpose Timer
121                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
122                         device_type = "gpt";
123                         reg = <660 10>;
124                         interrupts = <1 f 0>;
125                         interrupt-parent = <500>;
126                 };
127
128                 gpt@670 {       // General Purpose Timer
129                         compatible = "mpc5200-gpt\0mpc52xx-gpt";
130                         device_type = "gpt";
131                         reg = <670 10>;
132                         interrupts = <1 10 0>;
133                         interrupt-parent = <500>;
134                 };
135
136                 rtc@800 {       // Real time clock
137                         compatible = "mpc5200-rtc\0mpc52xx-rtc";
138                         device_type = "rtc";
139                         reg = <800 100>;
140                         interrupts = <1 5 0 1 6 0>;
141                         interrupt-parent = <500>;
142                 };
143
144                 mscan@900 {
145                         device_type = "mscan";
146                         compatible = "mpc5200-mscan\0mpc52xx-mscan";
147                         interrupts = <2 11 0>;
148                         interrupt-parent = <500>;
149                         reg = <900 80>;
150                 };
151
152                 mscan@980 {
153                         device_type = "mscan";
154                         compatible = "mpc5200-mscan\0mpc52xx-mscan";
155                         interrupts = <1 12 0>;
156                         interrupt-parent = <500>;
157                         reg = <980 80>;
158                 };
159
160                 gpio@b00 {
161                         compatible = "mpc5200-gpio\0mpc52xx-gpio";
162                         reg = <b00 40>;
163                         interrupts = <1 7 0>;
164                         interrupt-parent = <500>;
165                 };
166
167                 gpio-wkup@b00 {
168                         compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup";
169                         reg = <c00 40>;
170                         interrupts = <1 8 0 0 3 0>;
171                         interrupt-parent = <500>;
172                 };
173
174                 pci@0d00 {
175                         #interrupt-cells = <1>;
176                         #size-cells = <2>;
177                         #address-cells = <3>;
178                         device_type = "pci";
179                         compatible = "mpc5200-pci\0mpc52xx-pci";
180                         reg = <d00 100>;
181                         interrupt-map-mask = <f800 0 0 7>;
182                         interrupt-map = <c000 0 0 1 500 0 0 3
183                                          c000 0 0 2 500 0 0 3
184                                          c000 0 0 3 500 0 0 3
185                                          c000 0 0 4 500 0 0 3>;
186                         clock-frequency = <0>; // From boot loader
187                         interrupts = <2 8 0 2 9 0 2 a 0>;
188                         interrupt-parent = <500>;
189                         bus-range = <0 0>;
190                         ranges = <42000000 0 80000000 80000000 0 20000000
191                                   02000000 0 a0000000 a0000000 0 10000000
192                                   01000000 0 00000000 b0000000 0 01000000>;
193                 };
194
195                 spi@f00 {
196                         device_type = "spi";
197                         compatible = "mpc5200-spi\0mpc52xx-spi";
198                         reg = <f00 20>;
199                         interrupts = <2 d 0 2 e 0>;
200                         interrupt-parent = <500>;
201                 };
202
203                 usb@1000 {
204                         device_type = "usb-ohci-be";
205                         compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be";
206                         reg = <1000 ff>;
207                         interrupts = <2 6 0>;
208                         interrupt-parent = <500>;
209                 };
210
211                 bestcomm@1200 {
212                         device_type = "dma-controller";
213                         compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm";
214                         reg = <1200 80>;
215                         interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
216                                       3 4 0  3 5 0  3 6 0  3 7 0
217                                       3 8 0  3 9 0  3 a 0  3 b 0
218                                       3 c 0  3 d 0  3 e 0  3 f 0>;
219                         interrupt-parent = <500>;
220                 };
221
222                 xlb@1f00 {
223                         compatible = "mpc5200-xlb\0mpc52xx-xlb";
224                         reg = <1f00 100>;
225                 };
226
227                 serial@2000 {           // PSC1
228                         device_type = "serial";
229                         compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
230                         port-number = <0>;  // Logical port assignment
231                         reg = <2000 100>;
232                         interrupts = <2 1 0>;
233                         interrupt-parent = <500>;
234                 };
235
236                 // PSC2 in spi mode example
237                 spi@2200 {              // PSC2
238                         device_type = "spi";
239                         compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi";
240                         reg = <2200 100>;
241                         interrupts = <2 2 0>;
242                         interrupt-parent = <500>;
243                 };
244
245                 // PSC3 in CODEC mode example
246                 i2s@2400 {              // PSC3
247                         device_type = "sound";
248                         compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s";
249                         reg = <2400 100>;
250                         interrupts = <2 3 0>;
251                         interrupt-parent = <500>;
252                 };
253
254                 // PSC4 unconfigured
255                 //serial@2600 {         // PSC4
256                 //      device_type = "serial";
257                 //      compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
258                 //      reg = <2600 100>;
259                 //      interrupts = <2 b 0>;
260                 //      interrupt-parent = <500>;
261                 //};
262
263                 // PSC5 unconfigured
264                 //serial@2800 {         // PSC5
265                 //      device_type = "serial";
266                 //      compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
267                 //      reg = <2800 100>;
268                 //      interrupts = <2 c 0>;
269                 //      interrupt-parent = <500>;
270                 //};
271
272                 // PSC6 in AC97 mode example
273                 ac97@2c00 {             // PSC6
274                         device_type = "sound";
275                         compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97";
276                         reg = <2c00 100>;
277                         interrupts = <2 4 0>;
278                         interrupt-parent = <500>;
279                 };
280
281                 ethernet@3000 {
282                         device_type = "network";
283                         compatible = "mpc5200-fec\0mpc52xx-fec";
284                         reg = <3000 800>;
285                         mac-address = [ 02 03 04 05 06 07 ]; // Bad!
286                         interrupts = <2 5 0>;
287                         interrupt-parent = <500>;
288                 };
289
290                 ata@3a00 {
291                         device_type = "ata";
292                         compatible = "mpc5200-ata\0mpc52xx-ata";
293                         reg = <3a00 100>;
294                         interrupts = <2 7 0>;
295                         interrupt-parent = <500>;
296                 };
297
298                 i2c@3d00 {
299                         device_type = "i2c";
300                         compatible = "mpc5200-i2c\0mpc52xx-i2c";
301                         reg = <3d00 40>;
302                         interrupts = <2 f 0>;
303                         interrupt-parent = <500>;
304                 };
305
306                 i2c@3d40 {
307                         device_type = "i2c";
308                         compatible = "mpc5200-i2c\0mpc52xx-i2c";
309                         reg = <3d40 40>;
310                         interrupts = <2 10 0>;
311                         interrupt-parent = <500>;
312                 };
313                 sram@8000 {
314                         device_type = "sram";
315                         compatible = "mpc5200-sram\0mpc52xx-sram\0sram";
316                         reg = <8000 4000>;
317                 };
318         };
319 };