git.oblomov.eu Git - linux-2.6/blob - drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46
  47 #include <asm/current.h>
  48
  49 #include "ehca_classes.h"
  50 #include "ehca_tools.h"
  51 #include "ehca_qes.h"
  52 #include "ehca_iverbs.h"
  53 #include "hcp_if.h"
  54 #include "hipz_fns.h"
  55
  56 static struct kmem_cache *qp_cache;
  57
  58 /*
  59  * attributes not supported by query qp
  60  */
  61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  63                                      IB_QP_ACCESS_FLAGS       | \
  64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  65
  66 /*
  67  * ehca (internal) qp state values
  68  */
  69 enum ehca_qp_state {
  70         EHCA_QPS_RESET = 1,
  71         EHCA_QPS_INIT = 2,
  72         EHCA_QPS_RTR = 3,
  73         EHCA_QPS_RTS = 5,
  74         EHCA_QPS_SQD = 6,
  75         EHCA_QPS_SQE = 8,
  76         EHCA_QPS_ERR = 128
  77 };
  78
  79 /*
  80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  81  */
  82 enum ib_qp_statetrans {
  83         IB_QPST_ANY2RESET,
  84         IB_QPST_ANY2ERR,
  85         IB_QPST_RESET2INIT,
  86         IB_QPST_INIT2RTR,
  87         IB_QPST_INIT2INIT,
  88         IB_QPST_RTR2RTS,
  89         IB_QPST_RTS2SQD,
  90         IB_QPST_RTS2RTS,
  91         IB_QPST_SQD2RTS,
  92         IB_QPST_SQE2RTS,
  93         IB_QPST_SQD2SQD,
  94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  95 };
  96
  97 /*
  98  * ib2ehca_qp_state maps IB to ehca qp_state
  99  * returns ehca qp state corresponding to given ib qp state
 100  */
 101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 102 {
 103         switch (ib_qp_state) {
 104         case IB_QPS_RESET:
 105                 return EHCA_QPS_RESET;
 106         case IB_QPS_INIT:
 107                 return EHCA_QPS_INIT;
 108         case IB_QPS_RTR:
 109                 return EHCA_QPS_RTR;
 110         case IB_QPS_RTS:
 111                 return EHCA_QPS_RTS;
 112         case IB_QPS_SQD:
 113                 return EHCA_QPS_SQD;
 114         case IB_QPS_SQE:
 115                 return EHCA_QPS_SQE;
 116         case IB_QPS_ERR:
 117                 return EHCA_QPS_ERR;
 118         default:
 119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 120                 return -EINVAL;
 121         }
 122 }
 123
 124 /*
 125  * ehca2ib_qp_state maps ehca to IB qp_state
 126  * returns ib qp state corresponding to given ehca qp state
 127  */
 128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 129                                                 ehca_qp_state)
 130 {
 131         switch (ehca_qp_state) {
 132         case EHCA_QPS_RESET:
 133                 return IB_QPS_RESET;
 134         case EHCA_QPS_INIT:
 135                 return IB_QPS_INIT;
 136         case EHCA_QPS_RTR:
 137                 return IB_QPS_RTR;
 138         case EHCA_QPS_RTS:
 139                 return IB_QPS_RTS;
 140         case EHCA_QPS_SQD:
 141                 return IB_QPS_SQD;
 142         case EHCA_QPS_SQE:
 143                 return IB_QPS_SQE;
 144         case EHCA_QPS_ERR:
 145                 return IB_QPS_ERR;
 146         default:
 147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 148                 return -EINVAL;
 149         }
 150 }
 151
 152 /*
 153  * ehca_qp_type used as index for req_attr and opt_attr of
 154  * struct ehca_modqp_statetrans
 155  */
 156 enum ehca_qp_type {
 157         QPT_RC = 0,
 158         QPT_UC = 1,
 159         QPT_UD = 2,
 160         QPT_SQP = 3,
 161         QPT_MAX
 162 };
 163
 164 /*
 165  * ib2ehcaqptype maps Ib to ehca qp_type
 166  * returns ehca qp type corresponding to ib qp type
 167  */
 168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 169 {
 170         switch (ibqptype) {
 171         case IB_QPT_SMI:
 172         case IB_QPT_GSI:
 173                 return QPT_SQP;
 174         case IB_QPT_RC:
 175                 return QPT_RC;
 176         case IB_QPT_UC:
 177                 return QPT_UC;
 178         case IB_QPT_UD:
 179                 return QPT_UD;
 180         default:
 181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 182                 return -EINVAL;
 183         }
 184 }
 185
 186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 187                                                          int ib_tostate)
 188 {
 189         int index = -EINVAL;
 190         switch (ib_tostate) {
 191         case IB_QPS_RESET:
 192                 index = IB_QPST_ANY2RESET;
 193                 break;
 194         case IB_QPS_INIT:
 195                 switch (ib_fromstate) {
 196                 case IB_QPS_RESET:
 197                         index = IB_QPST_RESET2INIT;
 198                         break;
 199                 case IB_QPS_INIT:
 200                         index = IB_QPST_INIT2INIT;
 201                         break;
 202                 }
 203                 break;
 204         case IB_QPS_RTR:
 205                 if (ib_fromstate == IB_QPS_INIT)
 206                         index = IB_QPST_INIT2RTR;
 207                 break;
 208         case IB_QPS_RTS:
 209                 switch (ib_fromstate) {
 210                 case IB_QPS_RTR:
 211                         index = IB_QPST_RTR2RTS;
 212                         break;
 213                 case IB_QPS_RTS:
 214                         index = IB_QPST_RTS2RTS;
 215                         break;
 216                 case IB_QPS_SQD:
 217                         index = IB_QPST_SQD2RTS;
 218                         break;
 219                 case IB_QPS_SQE:
 220                         index = IB_QPST_SQE2RTS;
 221                         break;
 222                 }
 223                 break;
 224         case IB_QPS_SQD:
 225                 if (ib_fromstate == IB_QPS_RTS)
 226                         index = IB_QPST_RTS2SQD;
 227                 break;
 228         case IB_QPS_SQE:
 229                 break;
 230         case IB_QPS_ERR:
 231                 index = IB_QPST_ANY2ERR;
 232                 break;
 233         default:
 234                 break;
 235         }
 236         return index;
 237 }
 238
 239 /*
 240  * ibqptype2servicetype returns hcp service type corresponding to given
 241  * ib qp type used by create_qp()
 242  */
 243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 244 {
 245         switch (ibqptype) {
 246         case IB_QPT_SMI:
 247         case IB_QPT_GSI:
 248                 return ST_UD;
 249         case IB_QPT_RC:
 250                 return ST_RC;
 251         case IB_QPT_UC:
 252                 return ST_UC;
 253         case IB_QPT_UD:
 254                 return ST_UD;
 255         case IB_QPT_RAW_IPV6:
 256                 return -EINVAL;
 257         case IB_QPT_RAW_ETY:
 258                 return -EINVAL;
 259         default:
 260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 261                 return -EINVAL;
 262         }
 263 }
 264
 265 /*
 266  * init userspace queue info from ipz_queue data
 267  */
 268 static inline void queue2resp(struct ipzu_queue_resp *resp,
 269                               struct ipz_queue *queue)
 270 {
 271         resp->qe_size = queue->qe_size;
 272         resp->act_nr_of_sg = queue->act_nr_of_sg;
 273         resp->queue_length = queue->queue_length;
 274         resp->pagesize = queue->pagesize;
 275         resp->toggle_state = queue->toggle_state;
 276 }
 277
 278 static inline int ll_qp_msg_size(int nr_sge)
 279 {
 280         return 128 << nr_sge;
 281 }
 282
 283 /*
 284  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 285  */
 286 static inline int init_qp_queue(struct ehca_shca *shca,
 287                                 struct ehca_qp *my_qp,
 288                                 struct ipz_queue *queue,
 289                                 int q_type,
 290                                 u64 expected_hret,
 291                                 int nr_q_pages,
 292                                 int wqe_size,
 293                                 int nr_sges)
 294 {
 295         int ret, cnt, ipz_rc;
 296         void *vpage;
 297         u64 rpage, h_ret;
 298         struct ib_device *ib_dev = &shca->ib_device;
 299         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 300
 301         if (!nr_q_pages)
 302                 return 0;
 303
 304         ipz_rc = ipz_queue_ctor(queue, nr_q_pages, EHCA_PAGESIZE,
 305                                 wqe_size, nr_sges);
 306         if (!ipz_rc) {
 307                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
 308                          ipz_rc);
 309                 return -EBUSY;
 310         }
 311
 312         /* register queue pages */
 313         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 314                 vpage = ipz_qpageit_get_inc(queue);
 315                 if (!vpage) {
 316                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 317                                  "failed p_vpage= %p", vpage);
 318                         ret = -EINVAL;
 319                         goto init_qp_queue1;
 320                 }
 321                 rpage = virt_to_abs(vpage);
 322
 323                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 324                                                  my_qp->ipz_qp_handle,
 325                                                  NULL, 0, q_type,
 326                                                  rpage, 1,
 327                                                  my_qp->galpas.kernel);
 328                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 329                         if (h_ret != expected_hret) {
 330                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 331                                          "h_ret= %lx ", h_ret);
 332                                 ret = ehca2ib_return_code(h_ret);
 333                                 goto init_qp_queue1;
 334                         }
 335                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 336                         if (vpage) {
 337                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 338                                          "should not succeed vpage=%p", vpage);
 339                                 ret = -EINVAL;
 340                                 goto init_qp_queue1;
 341                         }
 342                 } else {
 343                         if (h_ret != H_PAGE_REGISTERED) {
 344                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 345                                          "h_ret= %lx ", h_ret);
 346                                 ret = ehca2ib_return_code(h_ret);
 347                                 goto init_qp_queue1;
 348                         }
 349                 }
 350         }
 351
 352         ipz_qeit_reset(queue);
 353
 354         return 0;
 355
 356 init_qp_queue1:
 357         ipz_queue_dtor(queue);
 358         return ret;
 359 }
 360
 361 /*
 362  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 363  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 364  * fields, the field out of init_attr is used.
 365  */
 366 static struct ehca_qp *internal_create_qp(
 367         struct ib_pd *pd,
 368         struct ib_qp_init_attr *init_attr,
 369         struct ib_srq_init_attr *srq_init_attr,
 370         struct ib_udata *udata, int is_srq)
 371 {
 372         struct ehca_qp *my_qp;
 373         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 374         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 375                                               ib_device);
 376         struct ib_ucontext *context = NULL;
 377         u64 h_ret;
 378         int is_llqp = 0, has_srq = 0;
 379         int qp_type, max_send_sge, max_recv_sge, ret;
 380
 381         /* h_call's out parameters */
 382         struct ehca_alloc_qp_parms parms;
 383         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 384         unsigned long flags;
 385
 386         memset(&parms, 0, sizeof(parms));
 387         qp_type = init_attr->qp_type;
 388
 389         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 390                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 391                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 392                          init_attr->sq_sig_type);
 393                 return ERR_PTR(-EINVAL);
 394         }
 395
 396         /* save LLQP info */
 397         if (qp_type & 0x80) {
 398                 is_llqp = 1;
 399                 parms.ext_type = EQPT_LLQP;
 400                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 401         }
 402         qp_type &= 0x1F;
 403         init_attr->qp_type &= 0x1F;
 404
 405         /* handle SRQ base QPs */
 406         if (init_attr->srq) {
 407                 struct ehca_qp *my_srq =
 408                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 409
 410                 has_srq = 1;
 411                 parms.ext_type = EQPT_SRQBASE;
 412                 parms.srq_qpn = my_srq->real_qp_num;
 413                 parms.srq_token = my_srq->token;
 414         }
 415
 416         if (is_llqp && has_srq) {
 417                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 418                 return ERR_PTR(-EINVAL);
 419         }
 420
 421         /* handle SRQs */
 422         if (is_srq) {
 423                 parms.ext_type = EQPT_SRQ;
 424                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 425                 if (init_attr->cap.max_recv_sge > 3) {
 426                         ehca_err(pd->device, "no more than three SGEs "
 427                                  "supported for SRQ  pd=%p  max_sge=%x",
 428                                  pd, init_attr->cap.max_recv_sge);
 429                         return ERR_PTR(-EINVAL);
 430                 }
 431         }
 432
 433         /* check QP type */
 434         if (qp_type != IB_QPT_UD &&
 435             qp_type != IB_QPT_UC &&
 436             qp_type != IB_QPT_RC &&
 437             qp_type != IB_QPT_SMI &&
 438             qp_type != IB_QPT_GSI) {
 439                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 440                 return ERR_PTR(-EINVAL);
 441         }
 442
 443         if (is_llqp) {
 444                 switch (qp_type) {
 445                 case IB_QPT_RC:
 446                         if ((init_attr->cap.max_send_wr > 255) ||
 447                             (init_attr->cap.max_recv_wr > 255)) {
 448                                 ehca_err(pd->device,
 449                                          "Invalid Number of max_sq_wr=%x "
 450                                          "or max_rq_wr=%x for RC LLQP",
 451                                          init_attr->cap.max_send_wr,
 452                                          init_attr->cap.max_recv_wr);
 453                                 return ERR_PTR(-EINVAL);
 454                         }
 455                         break;
 456                 case IB_QPT_UD:
 457                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
 458                                 ehca_err(pd->device, "UD LLQP not supported "
 459                                          "by this adapter");
 460                                 return ERR_PTR(-ENOSYS);
 461                         }
 462                         if (!(init_attr->cap.max_send_sge <= 5
 463                             && init_attr->cap.max_send_sge >= 1
 464                             && init_attr->cap.max_recv_sge <= 5
 465                             && init_attr->cap.max_recv_sge >= 1)) {
 466                                 ehca_err(pd->device,
 467                                          "Invalid Number of max_send_sge=%x "
 468                                          "or max_recv_sge=%x for UD LLQP",
 469                                          init_attr->cap.max_send_sge,
 470                                          init_attr->cap.max_recv_sge);
 471                                 return ERR_PTR(-EINVAL);
 472                         } else if (init_attr->cap.max_send_wr > 255) {
 473                                 ehca_err(pd->device,
 474                                          "Invalid Number of "
 475                                          "ax_send_wr=%x for UD QP_TYPE=%x",
 476                                          init_attr->cap.max_send_wr, qp_type);
 477                                 return ERR_PTR(-EINVAL);
 478                         }
 479                         break;
 480                 default:
 481                         ehca_err(pd->device, "unsupported LL QP Type=%x",
 482                                  qp_type);
 483                         return ERR_PTR(-EINVAL);
 484                         break;
 485                 }
 486         }
 487
 488         if (pd->uobject && udata)
 489                 context = pd->uobject->context;
 490
 491         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 492         if (!my_qp) {
 493                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 494                 return ERR_PTR(-ENOMEM);
 495         }
 496
 497         spin_lock_init(&my_qp->spinlock_s);
 498         spin_lock_init(&my_qp->spinlock_r);
 499         my_qp->qp_type = qp_type;
 500         my_qp->ext_type = parms.ext_type;
 501
 502         if (init_attr->recv_cq)
 503                 my_qp->recv_cq =
 504                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 505         if (init_attr->send_cq)
 506                 my_qp->send_cq =
 507                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 508
 509         do {
 510                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 511                         ret = -ENOMEM;
 512                         ehca_err(pd->device, "Can't reserve idr resources.");
 513                         goto create_qp_exit0;
 514                 }
 515
 516                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
 517                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 518                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 519
 520         } while (ret == -EAGAIN);
 521
 522         if (ret) {
 523                 ret = -ENOMEM;
 524                 ehca_err(pd->device, "Can't allocate new idr entry.");
 525                 goto create_qp_exit0;
 526         }
 527
 528         parms.servicetype = ibqptype2servicetype(qp_type);
 529         if (parms.servicetype < 0) {
 530                 ret = -EINVAL;
 531                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 532                 goto create_qp_exit0;
 533         }
 534
 535         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 536                 parms.sigtype = HCALL_SIGT_EVERY;
 537         else
 538                 parms.sigtype = HCALL_SIGT_BY_WQE;
 539
 540         /* UD_AV CIRCUMVENTION */
 541         max_send_sge = init_attr->cap.max_send_sge;
 542         max_recv_sge = init_attr->cap.max_recv_sge;
 543         if (parms.servicetype == ST_UD && !is_llqp) {
 544                 max_send_sge += 2;
 545                 max_recv_sge += 2;
 546         }
 547
 548         parms.token = my_qp->token;
 549         parms.eq_handle = shca->eq.ipz_eq_handle;
 550         parms.pd = my_pd->fw_pd;
 551         if (my_qp->send_cq)
 552                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 553         if (my_qp->recv_cq)
 554                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 555
 556         parms.max_send_wr = init_attr->cap.max_send_wr;
 557         parms.max_recv_wr = init_attr->cap.max_recv_wr;
 558         parms.max_send_sge = max_send_sge;
 559         parms.max_recv_sge = max_recv_sge;
 560
 561         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 562         if (h_ret != H_SUCCESS) {
 563                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
 564                          h_ret);
 565                 ret = ehca2ib_return_code(h_ret);
 566                 goto create_qp_exit1;
 567         }
 568
 569         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 570         my_qp->ipz_qp_handle = parms.qp_handle;
 571         my_qp->galpas = parms.galpas;
 572
 573         switch (qp_type) {
 574         case IB_QPT_RC:
 575                 if (!is_llqp) {
 576                         swqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 577                                              (parms.act_nr_send_sges)]);
 578                         rwqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 579                                              (parms.act_nr_recv_sges)]);
 580                 } else { /* for LLQP we need to use msg size, not wqe size */
 581                         swqe_size = ll_qp_msg_size(max_send_sge);
 582                         rwqe_size = ll_qp_msg_size(max_recv_sge);
 583                         parms.act_nr_send_sges = 1;
 584                         parms.act_nr_recv_sges = 1;
 585                 }
 586                 break;
 587         case IB_QPT_UC:
 588                 swqe_size = offsetof(struct ehca_wqe,
 589                                      u.nud.sg_list[parms.act_nr_send_sges]);
 590                 rwqe_size = offsetof(struct ehca_wqe,
 591                                      u.nud.sg_list[parms.act_nr_recv_sges]);
 592                 break;
 593
 594         case IB_QPT_UD:
 595         case IB_QPT_GSI:
 596         case IB_QPT_SMI:
 597                 if (is_llqp) {
 598                         swqe_size = ll_qp_msg_size(parms.act_nr_send_sges);
 599                         rwqe_size = ll_qp_msg_size(parms.act_nr_recv_sges);
 600                         parms.act_nr_send_sges = 1;
 601                         parms.act_nr_recv_sges = 1;
 602                 } else {
 603                         /* UD circumvention */
 604                         parms.act_nr_send_sges -= 2;
 605                         parms.act_nr_recv_sges -= 2;
 606                         swqe_size = offsetof(struct ehca_wqe, u.ud_av.sg_list[
 607                                                      parms.act_nr_send_sges]);
 608                         rwqe_size = offsetof(struct ehca_wqe, u.ud_av.sg_list[
 609                                                      parms.act_nr_recv_sges]);
 610                 }
 611
 612                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 613                         parms.act_nr_send_wqes = init_attr->cap.max_send_wr;
 614                         parms.act_nr_recv_wqes = init_attr->cap.max_recv_wr;
 615                         parms.act_nr_send_sges = init_attr->cap.max_send_sge;
 616                         parms.act_nr_recv_sges = init_attr->cap.max_recv_sge;
 617                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 618                 }
 619
 620                 break;
 621
 622         default:
 623                 break;
 624         }
 625
 626         /* initialize r/squeue and register queue pages */
 627         if (HAS_SQ(my_qp)) {
 628                 ret = init_qp_queue(
 629                         shca, my_qp, &my_qp->ipz_squeue, 0,
 630                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 631                         parms.nr_sq_pages, swqe_size,
 632                         parms.act_nr_send_sges);
 633                 if (ret) {
 634                         ehca_err(pd->device, "Couldn't initialize squeue "
 635                                  "and pages  ret=%x", ret);
 636                         goto create_qp_exit2;
 637                 }
 638         }
 639
 640         if (HAS_RQ(my_qp)) {
 641                 ret = init_qp_queue(
 642                         shca, my_qp, &my_qp->ipz_rqueue, 1,
 643                         H_SUCCESS, parms.nr_rq_pages, rwqe_size,
 644                         parms.act_nr_recv_sges);
 645                 if (ret) {
 646                         ehca_err(pd->device, "Couldn't initialize rqueue "
 647                                  "and pages ret=%x", ret);
 648                         goto create_qp_exit3;
 649                 }
 650         }
 651
 652         if (is_srq) {
 653                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 654                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 655
 656                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 657                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 658         } else {
 659                 my_qp->ib_qp.qp_num = ib_qp_num;
 660                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 661                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 662
 663                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 664                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 665
 666                 my_qp->ib_qp.qp_type = qp_type;
 667                 my_qp->ib_qp.srq = init_attr->srq;
 668
 669                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 670                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 671         }
 672
 673         init_attr->cap.max_inline_data = 0; /* not supported yet */
 674         init_attr->cap.max_recv_sge = parms.act_nr_recv_sges;
 675         init_attr->cap.max_recv_wr = parms.act_nr_recv_wqes;
 676         init_attr->cap.max_send_sge = parms.act_nr_send_sges;
 677         init_attr->cap.max_send_wr = parms.act_nr_send_wqes;
 678         my_qp->init_attr = *init_attr;
 679
 680         /* NOTE: define_apq0() not supported yet */
 681         if (qp_type == IB_QPT_GSI) {
 682                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 683                 if (h_ret != H_SUCCESS) {
 684                         ehca_err(pd->device, "ehca_define_sqp() failed rc=%lx",
 685                                  h_ret);
 686                         ret = ehca2ib_return_code(h_ret);
 687                         goto create_qp_exit4;
 688                 }
 689         }
 690
 691         if (my_qp->send_cq) {
 692                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 693                 if (ret) {
 694                         ehca_err(pd->device,
 695                                  "Couldn't assign qp to send_cq ret=%x", ret);
 696                         goto create_qp_exit4;
 697                 }
 698         }
 699
 700         /* copy queues, galpa data to user space */
 701         if (context && udata) {
 702                 struct ehca_create_qp_resp resp;
 703                 memset(&resp, 0, sizeof(resp));
 704
 705                 resp.qp_num = my_qp->real_qp_num;
 706                 resp.token = my_qp->token;
 707                 resp.qp_type = my_qp->qp_type;
 708                 resp.ext_type = my_qp->ext_type;
 709                 resp.qkey = my_qp->qkey;
 710                 resp.real_qp_num = my_qp->real_qp_num;
 711                 if (HAS_SQ(my_qp))
 712                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 713                 if (HAS_RQ(my_qp))
 714                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 715
 716                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 717                         ehca_err(pd->device, "Copy to udata failed");
 718                         ret = -EINVAL;
 719                         goto create_qp_exit4;
 720                 }
 721         }
 722
 723         return my_qp;
 724
 725 create_qp_exit4:
 726         if (HAS_RQ(my_qp))
 727                 ipz_queue_dtor(&my_qp->ipz_rqueue);
 728
 729 create_qp_exit3:
 730         if (HAS_SQ(my_qp))
 731                 ipz_queue_dtor(&my_qp->ipz_squeue);
 732
 733 create_qp_exit2:
 734         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 735
 736 create_qp_exit1:
 737         write_lock_irqsave(&ehca_qp_idr_lock, flags);
 738         idr_remove(&ehca_qp_idr, my_qp->token);
 739         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 740
 741 create_qp_exit0:
 742         kmem_cache_free(qp_cache, my_qp);
 743         return ERR_PTR(ret);
 744 }
 745
 746 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 747                              struct ib_qp_init_attr *qp_init_attr,
 748                              struct ib_udata *udata)
 749 {
 750         struct ehca_qp *ret;
 751
 752         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 753         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
 754 }
 755
 756 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 757                                struct ib_uobject *uobject);
 758
 759 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 760                                struct ib_srq_init_attr *srq_init_attr,
 761                                struct ib_udata *udata)
 762 {
 763         struct ib_qp_init_attr qp_init_attr;
 764         struct ehca_qp *my_qp;
 765         struct ib_srq *ret;
 766         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 767                                               ib_device);
 768         struct hcp_modify_qp_control_block *mqpcb;
 769         u64 hret, update_mask;
 770
 771         /* For common attributes, internal_create_qp() takes its info
 772          * out of qp_init_attr, so copy all common attrs there.
 773          */
 774         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 775         qp_init_attr.event_handler = srq_init_attr->event_handler;
 776         qp_init_attr.qp_context = srq_init_attr->srq_context;
 777         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 778         qp_init_attr.qp_type = IB_QPT_RC;
 779         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 780         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 781
 782         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 783         if (IS_ERR(my_qp))
 784                 return (struct ib_srq *)my_qp;
 785
 786         /* copy back return values */
 787         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 788         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
 789
 790         /* drive SRQ into RTR state */
 791         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 792         if (!mqpcb) {
 793                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 794                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 795                 ret = ERR_PTR(-ENOMEM);
 796                 goto create_srq1;
 797         }
 798
 799         mqpcb->qp_state = EHCA_QPS_INIT;
 800         mqpcb->prim_phys_port = 1;
 801         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 802         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 803                                 my_qp->ipz_qp_handle,
 804                                 &my_qp->pf,
 805                                 update_mask,
 806                                 mqpcb, my_qp->galpas.kernel);
 807         if (hret != H_SUCCESS) {
 808                 ehca_err(pd->device, "Could not modify SRQ to INIT"
 809                          "ehca_qp=%p qp_num=%x hret=%lx",
 810                          my_qp, my_qp->real_qp_num, hret);
 811                 goto create_srq2;
 812         }
 813
 814         mqpcb->qp_enable = 1;
 815         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 816         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 817                                 my_qp->ipz_qp_handle,
 818                                 &my_qp->pf,
 819                                 update_mask,
 820                                 mqpcb, my_qp->galpas.kernel);
 821         if (hret != H_SUCCESS) {
 822                 ehca_err(pd->device, "Could not enable SRQ"
 823                          "ehca_qp=%p qp_num=%x hret=%lx",
 824                          my_qp, my_qp->real_qp_num, hret);
 825                 goto create_srq2;
 826         }
 827
 828         mqpcb->qp_state  = EHCA_QPS_RTR;
 829         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 830         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 831                                 my_qp->ipz_qp_handle,
 832                                 &my_qp->pf,
 833                                 update_mask,
 834                                 mqpcb, my_qp->galpas.kernel);
 835         if (hret != H_SUCCESS) {
 836                 ehca_err(pd->device, "Could not modify SRQ to RTR"
 837                          "ehca_qp=%p qp_num=%x hret=%lx",
 838                          my_qp, my_qp->real_qp_num, hret);
 839                 goto create_srq2;
 840         }
 841
 842         return &my_qp->ib_srq;
 843
 844 create_srq2:
 845         ret = ERR_PTR(ehca2ib_return_code(hret));
 846         ehca_free_fw_ctrlblock(mqpcb);
 847
 848 create_srq1:
 849         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 850
 851         return ret;
 852 }
 853
 854 /*
 855  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 856  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 857  * returns total number of bad wqes in bad_wqe_cnt
 858  */
 859 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 860                            int *bad_wqe_cnt)
 861 {
 862         u64 h_ret;
 863         struct ipz_queue *squeue;
 864         void *bad_send_wqe_p, *bad_send_wqe_v;
 865         u64 q_ofs;
 866         struct ehca_wqe *wqe;
 867         int qp_num = my_qp->ib_qp.qp_num;
 868
 869         /* get send wqe pointer */
 870         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 871                                            my_qp->ipz_qp_handle, &my_qp->pf,
 872                                            &bad_send_wqe_p, NULL, 2);
 873         if (h_ret != H_SUCCESS) {
 874                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 875                          " ehca_qp=%p qp_num=%x h_ret=%lx",
 876                          my_qp, qp_num, h_ret);
 877                 return ehca2ib_return_code(h_ret);
 878         }
 879         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
 880         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 881                  qp_num, bad_send_wqe_p);
 882         /* convert wqe pointer to vadr */
 883         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 884         if (ehca_debug_level)
 885                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 886         squeue = &my_qp->ipz_squeue;
 887         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 888                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 889                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 890                 return -EFAULT;
 891         }
 892
 893         /* loop sets wqe's purge bit */
 894         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 895         *bad_wqe_cnt = 0;
 896         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 897                 if (ehca_debug_level)
 898                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 899                 wqe->nr_of_data_seg = 0; /* suppress data access */
 900                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 901                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 902                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 903                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 904         }
 905         /*
 906          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 907          *  i.e. nr of wqes with flush error status is one less
 908          */
 909         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 910                  qp_num, (*bad_wqe_cnt)-1);
 911         wqe->wqef = 0;
 912
 913         return 0;
 914 }
 915
 916 /*
 917  * internal_modify_qp with circumvention to handle aqp0 properly
 918  * smi_reset2init indicates if this is an internal reset-to-init-call for
 919  * smi. This flag must always be zero if called from ehca_modify_qp()!
 920  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 921  */
 922 static int internal_modify_qp(struct ib_qp *ibqp,
 923                               struct ib_qp_attr *attr,
 924                               int attr_mask, int smi_reset2init)
 925 {
 926         enum ib_qp_state qp_cur_state, qp_new_state;
 927         int cnt, qp_attr_idx, ret = 0;
 928         enum ib_qp_statetrans statetrans;
 929         struct hcp_modify_qp_control_block *mqpcb;
 930         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 931         struct ehca_shca *shca =
 932                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 933         u64 update_mask;
 934         u64 h_ret;
 935         int bad_wqe_cnt = 0;
 936         int squeue_locked = 0;
 937         unsigned long flags = 0;
 938
 939         /* do query_qp to obtain current attr values */
 940         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 941         if (!mqpcb) {
 942                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 943                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 944                 return -ENOMEM;
 945         }
 946
 947         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
 948                                 my_qp->ipz_qp_handle,
 949                                 &my_qp->pf,
 950                                 mqpcb, my_qp->galpas.kernel);
 951         if (h_ret != H_SUCCESS) {
 952                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
 953                          "ehca_qp=%p qp_num=%x h_ret=%lx",
 954                          my_qp, ibqp->qp_num, h_ret);
 955                 ret = ehca2ib_return_code(h_ret);
 956                 goto modify_qp_exit1;
 957         }
 958
 959         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
 960
 961         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
 962                 ret = -EINVAL;
 963                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
 964                          "ehca_qp=%p qp_num=%x",
 965                          mqpcb->qp_state, my_qp, ibqp->qp_num);
 966                 goto modify_qp_exit1;
 967         }
 968         /*
 969          * circumvention to set aqp0 initial state to init
 970          * as expected by IB spec
 971          */
 972         if (smi_reset2init == 0 &&
 973             ibqp->qp_type == IB_QPT_SMI &&
 974             qp_cur_state == IB_QPS_RESET &&
 975             (attr_mask & IB_QP_STATE) &&
 976             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
 977                 struct ib_qp_attr smiqp_attr = {
 978                         .qp_state = IB_QPS_INIT,
 979                         .port_num = my_qp->init_attr.port_num,
 980                         .pkey_index = 0,
 981                         .qkey = 0
 982                 };
 983                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
 984                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
 985                 int smirc = internal_modify_qp(
 986                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
 987                 if (smirc) {
 988                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
 989                                  "ehca_modify_qp() rc=%x", smirc);
 990                         ret = H_PARAMETER;
 991                         goto modify_qp_exit1;
 992                 }
 993                 qp_cur_state = IB_QPS_INIT;
 994                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
 995         }
 996         /* is transmitted current state  equal to "real" current state */
 997         if ((attr_mask & IB_QP_CUR_STATE) &&
 998             qp_cur_state != attr->cur_qp_state) {
 999                 ret = -EINVAL;
1000                 ehca_err(ibqp->device,
1001                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1002                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1003                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1004                 goto modify_qp_exit1;
1005         }
1006
1007         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1008                  "new qp_state=%x attribute_mask=%x",
1009                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1010
1011         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1012         if (!smi_reset2init &&
1013             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1014                                 attr_mask)) {
1015                 ret = -EINVAL;
1016                 ehca_err(ibqp->device,
1017                          "Invalid qp transition new_state=%x cur_state=%x "
1018                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1019                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1020                 goto modify_qp_exit1;
1021         }
1022
1023         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1024         if (mqpcb->qp_state)
1025                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1026         else {
1027                 ret = -EINVAL;
1028                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1029                          "ehca_qp=%p qp_num=%x",
1030                          qp_new_state, my_qp, ibqp->qp_num);
1031                 goto modify_qp_exit1;
1032         }
1033
1034         /* retrieve state transition struct to get req and opt attrs */
1035         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1036         if (statetrans < 0) {
1037                 ret = -EINVAL;
1038                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1039                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1040                          "qp_num=%x", qp_cur_state, qp_new_state,
1041                          statetrans, my_qp, ibqp->qp_num);
1042                 goto modify_qp_exit1;
1043         }
1044
1045         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1046
1047         if (qp_attr_idx < 0) {
1048                 ret = qp_attr_idx;
1049                 ehca_err(ibqp->device,
1050                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1051                          ibqp->qp_type, my_qp, ibqp->qp_num);
1052                 goto modify_qp_exit1;
1053         }
1054
1055         ehca_dbg(ibqp->device,
1056                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1057                  my_qp, ibqp->qp_num, statetrans);
1058
1059         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1060          * in non-LL UD QPs.
1061          */
1062         if ((my_qp->qp_type == IB_QPT_UD) &&
1063             (my_qp->ext_type != EQPT_LLQP) &&
1064             (statetrans == IB_QPST_INIT2RTR) &&
1065             (shca->hw_level >= 0x22)) {
1066                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1067                 mqpcb->send_grh_flag = 1;
1068         }
1069
1070         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1071         if ((my_qp->qp_type == IB_QPT_UD ||
1072              my_qp->qp_type == IB_QPT_GSI ||
1073              my_qp->qp_type == IB_QPT_SMI) &&
1074             statetrans == IB_QPST_SQE2RTS) {
1075                 /* mark next free wqe if kernel */
1076                 if (!ibqp->uobject) {
1077                         struct ehca_wqe *wqe;
1078                         /* lock send queue */
1079                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1080                         squeue_locked = 1;
1081                         /* mark next free wqe */
1082                         wqe = (struct ehca_wqe *)
1083                                 ipz_qeit_get(&my_qp->ipz_squeue);
1084                         wqe->optype = wqe->wqef = 0xff;
1085                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1086                                  ibqp->qp_num, wqe);
1087                 }
1088                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1089                 if (ret) {
1090                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1091                                  "ehca_qp=%p qp_num=%x ret=%x",
1092                                  my_qp, ibqp->qp_num, ret);
1093                         goto modify_qp_exit2;
1094                 }
1095         }
1096
1097         /*
1098          * enable RDMA_Atomic_Control if reset->init und reliable con
1099          * this is necessary since gen2 does not provide that flag,
1100          * but pHyp requires it
1101          */
1102         if (statetrans == IB_QPST_RESET2INIT &&
1103             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1104                 mqpcb->rdma_atomic_ctrl = 3;
1105                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1106         }
1107         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1108         if (statetrans == IB_QPST_INIT2RTR &&
1109             (ibqp->qp_type == IB_QPT_UC) &&
1110             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1111                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1112                 update_mask |=
1113                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1114         }
1115
1116         if (attr_mask & IB_QP_PKEY_INDEX) {
1117                 mqpcb->prim_p_key_idx = attr->pkey_index;
1118                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1119         }
1120         if (attr_mask & IB_QP_PORT) {
1121                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1122                         ret = -EINVAL;
1123                         ehca_err(ibqp->device, "Invalid port=%x. "
1124                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1125                                  attr->port_num, my_qp, ibqp->qp_num,
1126                                  shca->num_ports);
1127                         goto modify_qp_exit2;
1128                 }
1129                 mqpcb->prim_phys_port = attr->port_num;
1130                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1131         }
1132         if (attr_mask & IB_QP_QKEY) {
1133                 mqpcb->qkey = attr->qkey;
1134                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1135         }
1136         if (attr_mask & IB_QP_AV) {
1137                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1138                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1139                                                 init_attr.port_num].rate);
1140
1141                 mqpcb->dlid = attr->ah_attr.dlid;
1142                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1143                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1144                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1145                 mqpcb->service_level = attr->ah_attr.sl;
1146                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1147
1148                 if (ah_mult < ehca_mult)
1149                         mqpcb->max_static_rate = (ah_mult > 0) ?
1150                         ((ehca_mult - 1) / ah_mult) : 0;
1151                 else
1152                         mqpcb->max_static_rate = 0;
1153                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1154
1155                 /*
1156                  * Always supply the GRH flag, even if it's zero, to give the
1157                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1158                  */
1159                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1160
1161                 /*
1162                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1163                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1164                  */
1165                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1166                         mqpcb->send_grh_flag = 1;
1167
1168                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1169                         update_mask |=
1170                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1171
1172                         for (cnt = 0; cnt < 16; cnt++)
1173                                 mqpcb->dest_gid.byte[cnt] =
1174                                         attr->ah_attr.grh.dgid.raw[cnt];
1175
1176                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1177                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1178                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1179                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1180                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1181                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1182                         update_mask |=
1183                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1184                 }
1185         }
1186
1187         if (attr_mask & IB_QP_PATH_MTU) {
1188                 mqpcb->path_mtu = attr->path_mtu;
1189                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1190         }
1191         if (attr_mask & IB_QP_TIMEOUT) {
1192                 mqpcb->timeout = attr->timeout;
1193                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1194         }
1195         if (attr_mask & IB_QP_RETRY_CNT) {
1196                 mqpcb->retry_count = attr->retry_cnt;
1197                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1198         }
1199         if (attr_mask & IB_QP_RNR_RETRY) {
1200                 mqpcb->rnr_retry_count = attr->rnr_retry;
1201                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1202         }
1203         if (attr_mask & IB_QP_RQ_PSN) {
1204                 mqpcb->receive_psn = attr->rq_psn;
1205                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1206         }
1207         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1208                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1209                         attr->max_dest_rd_atomic : 2;
1210                 update_mask |=
1211                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1212         }
1213         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1214                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1215                         attr->max_rd_atomic : 2;
1216                 update_mask |=
1217                         EHCA_BMASK_SET
1218                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1219         }
1220         if (attr_mask & IB_QP_ALT_PATH) {
1221                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1222                 int ehca_mult = ib_rate_to_mult(
1223                         shca->sport[my_qp->init_attr.port_num].rate);
1224
1225                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1226                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1227                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1228                 update_mask |=
1229                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1230                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1231                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1232
1233                 if (ah_mult < ehca_mult)
1234                         mqpcb->max_static_rate = (ah_mult > 0) ?
1235                         ((ehca_mult - 1) / ah_mult) : 0;
1236                 else
1237                         mqpcb->max_static_rate_al = 0;
1238
1239                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1240
1241                 /*
1242                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1243                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1244                  */
1245                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1246                         mqpcb->send_grh_flag_al = 1 << 31;
1247                         update_mask |=
1248                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1249                         mqpcb->source_gid_idx_al =
1250                                 attr->alt_ah_attr.grh.sgid_index;
1251                         update_mask |=
1252                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1253
1254                         for (cnt = 0; cnt < 16; cnt++)
1255                                 mqpcb->dest_gid_al.byte[cnt] =
1256                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1257
1258                         update_mask |=
1259                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1260                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1261                         update_mask |=
1262                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1263                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1264                         update_mask |=
1265                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1266                         mqpcb->traffic_class_al =
1267                                 attr->alt_ah_attr.grh.traffic_class;
1268                         update_mask |=
1269                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1270                 }
1271         }
1272
1273         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1274                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1275                 update_mask |=
1276                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1277         }
1278
1279         if (attr_mask & IB_QP_SQ_PSN) {
1280                 mqpcb->send_psn = attr->sq_psn;
1281                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1282         }
1283
1284         if (attr_mask & IB_QP_DEST_QPN) {
1285                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1286                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1287         }
1288
1289         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1290                 mqpcb->path_migration_state = attr->path_mig_state;
1291                 update_mask |=
1292                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1293         }
1294
1295         if (attr_mask & IB_QP_CAP) {
1296                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1297                 update_mask |=
1298                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1299                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1300                 update_mask |=
1301                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1302                 /* no support for max_send/recv_sge yet */
1303         }
1304
1305         if (ehca_debug_level)
1306                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1307
1308         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1309                                  my_qp->ipz_qp_handle,
1310                                  &my_qp->pf,
1311                                  update_mask,
1312                                  mqpcb, my_qp->galpas.kernel);
1313
1314         if (h_ret != H_SUCCESS) {
1315                 ret = ehca2ib_return_code(h_ret);
1316                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1317                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1318                 goto modify_qp_exit2;
1319         }
1320
1321         if ((my_qp->qp_type == IB_QPT_UD ||
1322              my_qp->qp_type == IB_QPT_GSI ||
1323              my_qp->qp_type == IB_QPT_SMI) &&
1324             statetrans == IB_QPST_SQE2RTS) {
1325                 /* doorbell to reprocessing wqes */
1326                 iosync(); /* serialize GAL register access */
1327                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1328                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1329         }
1330
1331         if (statetrans == IB_QPST_RESET2INIT ||
1332             statetrans == IB_QPST_INIT2INIT) {
1333                 mqpcb->qp_enable = 1;
1334                 mqpcb->qp_state = EHCA_QPS_INIT;
1335                 update_mask = 0;
1336                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1337
1338                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1339                                          my_qp->ipz_qp_handle,
1340                                          &my_qp->pf,
1341                                          update_mask,
1342                                          mqpcb,
1343                                          my_qp->galpas.kernel);
1344
1345                 if (h_ret != H_SUCCESS) {
1346                         ret = ehca2ib_return_code(h_ret);
1347                         ehca_err(ibqp->device, "ENABLE in context of "
1348                                  "RESET_2_INIT failed! Maybe you didn't get "
1349                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1350                                  h_ret, my_qp, ibqp->qp_num);
1351                         goto modify_qp_exit2;
1352                 }
1353         }
1354
1355         if (statetrans == IB_QPST_ANY2RESET) {
1356                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1357                 ipz_qeit_reset(&my_qp->ipz_squeue);
1358         }
1359
1360         if (attr_mask & IB_QP_QKEY)
1361                 my_qp->qkey = attr->qkey;
1362
1363 modify_qp_exit2:
1364         if (squeue_locked) { /* this means: sqe -> rts */
1365                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1366                 my_qp->sqerr_purgeflag = 1;
1367         }
1368
1369 modify_qp_exit1:
1370         ehca_free_fw_ctrlblock(mqpcb);
1371
1372         return ret;
1373 }
1374
1375 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1376                    struct ib_udata *udata)
1377 {
1378         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1379         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1380                                              ib_pd);
1381         u32 cur_pid = current->tgid;
1382
1383         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1384             my_pd->ownpid != cur_pid) {
1385                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1386                          cur_pid, my_pd->ownpid);
1387                 return -EINVAL;
1388         }
1389
1390         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1391 }
1392
1393 int ehca_query_qp(struct ib_qp *qp,
1394                   struct ib_qp_attr *qp_attr,
1395                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1396 {
1397         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1398         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1399                                              ib_pd);
1400         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1401                                               ib_device);
1402         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1403         struct hcp_modify_qp_control_block *qpcb;
1404         u32 cur_pid = current->tgid;
1405         int cnt, ret = 0;
1406         u64 h_ret;
1407
1408         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1409             my_pd->ownpid != cur_pid) {
1410                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1411                          cur_pid, my_pd->ownpid);
1412                 return -EINVAL;
1413         }
1414
1415         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1416                 ehca_err(qp->device, "Invalid attribute mask "
1417                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1418                          my_qp, qp->qp_num, qp_attr_mask);
1419                 return -EINVAL;
1420         }
1421
1422         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1423         if (!qpcb) {
1424                 ehca_err(qp->device, "Out of memory for qpcb "
1425                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1426                 return -ENOMEM;
1427         }
1428
1429         h_ret = hipz_h_query_qp(adapter_handle,
1430                                 my_qp->ipz_qp_handle,
1431                                 &my_qp->pf,
1432                                 qpcb, my_qp->galpas.kernel);
1433
1434         if (h_ret != H_SUCCESS) {
1435                 ret = ehca2ib_return_code(h_ret);
1436                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1437                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1438                          my_qp, qp->qp_num, h_ret);
1439                 goto query_qp_exit1;
1440         }
1441
1442         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1443         qp_attr->qp_state = qp_attr->cur_qp_state;
1444
1445         if (qp_attr->cur_qp_state == -EINVAL) {
1446                 ret = -EINVAL;
1447                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1448                          "ehca_qp=%p qp_num=%x",
1449                          qpcb->qp_state, my_qp, qp->qp_num);
1450                 goto query_qp_exit1;
1451         }
1452
1453         if (qp_attr->qp_state == IB_QPS_SQD)
1454                 qp_attr->sq_draining = 1;
1455
1456         qp_attr->qkey = qpcb->qkey;
1457         qp_attr->path_mtu = qpcb->path_mtu;
1458         qp_attr->path_mig_state = qpcb->path_migration_state;
1459         qp_attr->rq_psn = qpcb->receive_psn;
1460         qp_attr->sq_psn = qpcb->send_psn;
1461         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1462         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1463         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1464         /* UD_AV CIRCUMVENTION */
1465         if (my_qp->qp_type == IB_QPT_UD) {
1466                 qp_attr->cap.max_send_sge =
1467                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1468                 qp_attr->cap.max_recv_sge =
1469                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1470         } else {
1471                 qp_attr->cap.max_send_sge =
1472                         qpcb->actual_nr_sges_in_sq_wqe;
1473                 qp_attr->cap.max_recv_sge =
1474                         qpcb->actual_nr_sges_in_rq_wqe;
1475         }
1476
1477         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1478         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1479
1480         qp_attr->pkey_index =
1481                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1482
1483         qp_attr->port_num =
1484                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1485
1486         qp_attr->timeout = qpcb->timeout;
1487         qp_attr->retry_cnt = qpcb->retry_count;
1488         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1489
1490         qp_attr->alt_pkey_index =
1491                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1492
1493         qp_attr->alt_port_num = qpcb->alt_phys_port;
1494         qp_attr->alt_timeout = qpcb->timeout_al;
1495
1496         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1497         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1498
1499         /* primary av */
1500         qp_attr->ah_attr.sl = qpcb->service_level;
1501
1502         if (qpcb->send_grh_flag) {
1503                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1504         }
1505
1506         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1507         qp_attr->ah_attr.dlid = qpcb->dlid;
1508         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1509         qp_attr->ah_attr.port_num = qp_attr->port_num;
1510
1511         /* primary GRH */
1512         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1513         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1514         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1515         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1516
1517         for (cnt = 0; cnt < 16; cnt++)
1518                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1519                         qpcb->dest_gid.byte[cnt];
1520
1521         /* alternate AV */
1522         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1523         if (qpcb->send_grh_flag_al) {
1524                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1525         }
1526
1527         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1528         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1529         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1530
1531         /* alternate GRH */
1532         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1533         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1534         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1535         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1536
1537         for (cnt = 0; cnt < 16; cnt++)
1538                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1539                         qpcb->dest_gid_al.byte[cnt];
1540
1541         /* return init attributes given in ehca_create_qp */
1542         if (qp_init_attr)
1543                 *qp_init_attr = my_qp->init_attr;
1544
1545         if (ehca_debug_level)
1546                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1547
1548 query_qp_exit1:
1549         ehca_free_fw_ctrlblock(qpcb);
1550
1551         return ret;
1552 }
1553
1554 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1555                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1556 {
1557         struct ehca_qp *my_qp =
1558                 container_of(ibsrq, struct ehca_qp, ib_srq);
1559         struct ehca_pd *my_pd =
1560                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1561         struct ehca_shca *shca =
1562                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1563         struct hcp_modify_qp_control_block *mqpcb;
1564         u64 update_mask;
1565         u64 h_ret;
1566         int ret = 0;
1567
1568         u32 cur_pid = current->tgid;
1569         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1570             my_pd->ownpid != cur_pid) {
1571                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1572                          cur_pid, my_pd->ownpid);
1573                 return -EINVAL;
1574         }
1575
1576         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1577         if (!mqpcb) {
1578                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1579                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1580                 return -ENOMEM;
1581         }
1582
1583         update_mask = 0;
1584         if (attr_mask & IB_SRQ_LIMIT) {
1585                 attr_mask &= ~IB_SRQ_LIMIT;
1586                 update_mask |=
1587                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1588                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1589                 mqpcb->curr_srq_limit =
1590                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1591                 mqpcb->qp_aff_asyn_ev_log_reg =
1592                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1593         }
1594
1595         /* by now, all bits in attr_mask should have been cleared */
1596         if (attr_mask) {
1597                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1598                          "attr_mask=%x", attr_mask);
1599                 ret = -EINVAL;
1600                 goto modify_srq_exit0;
1601         }
1602
1603         if (ehca_debug_level)
1604                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1605
1606         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1607                                  NULL, update_mask, mqpcb,
1608                                  my_qp->galpas.kernel);
1609
1610         if (h_ret != H_SUCCESS) {
1611                 ret = ehca2ib_return_code(h_ret);
1612                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed rc=%lx "
1613                          "ehca_qp=%p qp_num=%x",
1614                          h_ret, my_qp, my_qp->real_qp_num);
1615         }
1616
1617 modify_srq_exit0:
1618         ehca_free_fw_ctrlblock(mqpcb);
1619
1620         return ret;
1621 }
1622
1623 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1624 {
1625         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1626         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1627         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1628                                               ib_device);
1629         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1630         struct hcp_modify_qp_control_block *qpcb;
1631         u32 cur_pid = current->tgid;
1632         int ret = 0;
1633         u64 h_ret;
1634
1635         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1636             my_pd->ownpid != cur_pid) {
1637                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1638                          cur_pid, my_pd->ownpid);
1639                 return -EINVAL;
1640         }
1641
1642         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1643         if (!qpcb) {
1644                 ehca_err(srq->device, "Out of memory for qpcb "
1645                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1646                 return -ENOMEM;
1647         }
1648
1649         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1650                                 NULL, qpcb, my_qp->galpas.kernel);
1651
1652         if (h_ret != H_SUCCESS) {
1653                 ret = ehca2ib_return_code(h_ret);
1654                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1655                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1656                          my_qp, my_qp->real_qp_num, h_ret);
1657                 goto query_srq_exit1;
1658         }
1659
1660         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1661         srq_attr->srq_limit = EHCA_BMASK_GET(
1662                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1663
1664         if (ehca_debug_level)
1665                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1666
1667 query_srq_exit1:
1668         ehca_free_fw_ctrlblock(qpcb);
1669
1670         return ret;
1671 }
1672
1673 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1674                                struct ib_uobject *uobject)
1675 {
1676         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1677         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1678                                              ib_pd);
1679         u32 cur_pid = current->tgid;
1680         u32 qp_num = my_qp->real_qp_num;
1681         int ret;
1682         u64 h_ret;
1683         u8 port_num;
1684         enum ib_qp_type qp_type;
1685         unsigned long flags;
1686
1687         if (uobject) {
1688                 if (my_qp->mm_count_galpa ||
1689                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1690                         ehca_err(dev, "Resources still referenced in "
1691                                  "user space qp_num=%x", qp_num);
1692                         return -EINVAL;
1693                 }
1694                 if (my_pd->ownpid != cur_pid) {
1695                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1696                                  cur_pid, my_pd->ownpid);
1697                         return -EINVAL;
1698                 }
1699         }
1700
1701         if (my_qp->send_cq) {
1702                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1703                 if (ret) {
1704                         ehca_err(dev, "Couldn't unassign qp from "
1705                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1706                                  qp_num, my_qp->send_cq->cq_number);
1707                         return ret;
1708                 }
1709         }
1710
1711         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1712         idr_remove(&ehca_qp_idr, my_qp->token);
1713         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1714
1715         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1716         if (h_ret != H_SUCCESS) {
1717                 ehca_err(dev, "hipz_h_destroy_qp() failed rc=%lx "
1718                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1719                 return ehca2ib_return_code(h_ret);
1720         }
1721
1722         port_num = my_qp->init_attr.port_num;
1723         qp_type  = my_qp->init_attr.qp_type;
1724
1725         /* no support for IB_QPT_SMI yet */
1726         if (qp_type == IB_QPT_GSI) {
1727                 struct ib_event event;
1728                 ehca_info(dev, "device %s: port %x is inactive.",
1729                           shca->ib_device.name, port_num);
1730                 event.device = &shca->ib_device;
1731                 event.event = IB_EVENT_PORT_ERR;
1732                 event.element.port_num = port_num;
1733                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1734                 ib_dispatch_event(&event);
1735         }
1736
1737         if (HAS_RQ(my_qp))
1738                 ipz_queue_dtor(&my_qp->ipz_rqueue);
1739         if (HAS_SQ(my_qp))
1740                 ipz_queue_dtor(&my_qp->ipz_squeue);
1741         kmem_cache_free(qp_cache, my_qp);
1742         return 0;
1743 }
1744
1745 int ehca_destroy_qp(struct ib_qp *qp)
1746 {
1747         return internal_destroy_qp(qp->device,
1748                                    container_of(qp, struct ehca_qp, ib_qp),
1749                                    qp->uobject);
1750 }
1751
1752 int ehca_destroy_srq(struct ib_srq *srq)
1753 {
1754         return internal_destroy_qp(srq->device,
1755                                    container_of(srq, struct ehca_qp, ib_srq),
1756                                    srq->uobject);
1757 }
1758
1759 int ehca_init_qp_cache(void)
1760 {
1761         qp_cache = kmem_cache_create("ehca_cache_qp",
1762                                      sizeof(struct ehca_qp), 0,
1763                                      SLAB_HWCACHE_ALIGN,
1764                                      NULL);
1765         if (!qp_cache)
1766                 return -ENOMEM;
1767         return 0;
1768 }
1769
1770 void ehca_cleanup_qp_cache(void)
1771 {
1772         if (qp_cache)
1773                 kmem_cache_destroy(qp_cache);
1774 }