2 * Copyright (C) 2004 Matthew Wilcox <matthew@wil.cx>
3 * Copyright (C) 2004 Intel Corp.
5 * This code is released under the GNU General Public License version 2.
9 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
12 #include <linux/pci.h>
13 #include <linux/init.h>
14 #include <linux/acpi.h>
17 #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
19 /* The base address of the last MMCONFIG device accessed */
20 static u32 mmcfg_last_accessed_device;
23 * Functions for accessing PCI configuration space with MMCONFIG accesses
25 static u32 get_base_addr(unsigned int seg, int bus)
28 struct acpi_table_mcfg_config *cfg;
32 if (cfg_num >= pci_mmcfg_config_num) {
33 /* something bad is going on, no cfg table is found. */
34 /* so we fall back to the old way we used to do this */
35 /* and just rely on the first entry to be correct. */
36 return pci_mmcfg_config[0].base_address;
38 cfg = &pci_mmcfg_config[cfg_num];
39 if (cfg->pci_segment_group_number != seg)
41 if ((cfg->start_bus_number <= bus) &&
42 (cfg->end_bus_number >= bus))
43 return cfg->base_address;
47 static inline void pci_exp_set_dev_base(unsigned int seg, int bus, int devfn)
49 u32 dev_base = get_base_addr(seg, bus) | (bus << 20) | (devfn << 12);
50 if (dev_base != mmcfg_last_accessed_device) {
51 mmcfg_last_accessed_device = dev_base;
52 set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
56 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
57 unsigned int devfn, int reg, int len, u32 *value)
61 if (!value || (bus > 255) || (devfn > 255) || (reg > 4095))
64 spin_lock_irqsave(&pci_config_lock, flags);
66 pci_exp_set_dev_base(seg, bus, devfn);
70 *value = readb(mmcfg_virt_addr + reg);
73 *value = readw(mmcfg_virt_addr + reg);
76 *value = readl(mmcfg_virt_addr + reg);
80 spin_unlock_irqrestore(&pci_config_lock, flags);
85 static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
86 unsigned int devfn, int reg, int len, u32 value)
90 if ((bus > 255) || (devfn > 255) || (reg > 4095))
93 spin_lock_irqsave(&pci_config_lock, flags);
95 pci_exp_set_dev_base(seg, bus, devfn);
99 writeb(value, mmcfg_virt_addr + reg);
102 writew(value, mmcfg_virt_addr + reg);
105 writel(value, mmcfg_virt_addr + reg);
109 spin_unlock_irqrestore(&pci_config_lock, flags);
114 static struct pci_raw_ops pci_mmcfg = {
115 .read = pci_mmcfg_read,
116 .write = pci_mmcfg_write,
119 static int __init pci_mmcfg_init(void)
121 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
124 acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg);
125 if ((pci_mmcfg_config_num == 0) ||
126 (pci_mmcfg_config == NULL) ||
127 (pci_mmcfg_config[0].base_address == 0))
130 /* Kludge for now. Don't use mmconfig on AMD systems because
131 those have some busses where mmconfig doesn't work,
132 and we don't parse ACPI MCFG well enough to handle that.
133 Remove when proper handling is added. */
134 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
137 printk(KERN_INFO "PCI: Using MMCONFIG\n");
138 raw_pci_ops = &pci_mmcfg;
139 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
145 arch_initcall(pci_mmcfg_init);