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   1 /*
   2 *
   3 * 3780i.c -- helper routines for the 3780i DSP
   4 *
   5 *
   6 * Written By: Mike Sullivan IBM Corporation
   7 *
   8 * Copyright (C) 1999 IBM Corporation
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License as published by
  12 * the Free Software Foundation; either version 2 of the License, or
  13 * (at your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * NO WARRANTY
  21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  25 * solely responsible for determining the appropriateness of using and
  26 * distributing the Program and assumes all risks associated with its
  27 * exercise of rights under this Agreement, including but not limited to
  28 * the risks and costs of program errors, damage to or loss of data,
  29 * programs or equipment, and unavailability or interruption of operations.
  30 *
  31 * DISCLAIMER OF LIABILITY
  32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39 *
  40 * You should have received a copy of the GNU General Public License
  41 * along with this program; if not, write to the Free Software
  42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  43 *
  44 *
  45 * 10/23/2000 - Alpha Release
  46 *       First release to the public
  47 */
  48
  49 #include <linux/kernel.h>
  50 #include <linux/unistd.h>
  51 #include <linux/delay.h>
  52 #include <linux/ioport.h>
  53 #include <linux/init.h>
  54 #include <linux/bitops.h>
  55 #include <linux/sched.h>        /* cond_resched() */
  56
  57 #include <asm/io.h>
  58 #include <asm/uaccess.h>
  59 #include <asm/system.h>
  60 #include <asm/irq.h>
  61 #include "smapi.h"
  62 #include "mwavedd.h"
  63 #include "3780i.h"
  64
  65 static DEFINE_SPINLOCK(dsp_lock);
  66
  67 static void PaceMsaAccess(unsigned short usDspBaseIO)
  68 {
  69         cond_resched();
  70         udelay(100);
  71         cond_resched();
  72 }
  73
  74 unsigned short dsp3780I_ReadMsaCfg(unsigned short usDspBaseIO,
  75                                    unsigned long ulMsaAddr)
  76 {
  77         unsigned long flags;
  78         unsigned short val;
  79
  80         PRINTK_3(TRACE_3780I,
  81                 "3780i::dsp3780I_ReadMsaCfg entry usDspBaseIO %x ulMsaAddr %lx\n",
  82                 usDspBaseIO, ulMsaAddr);
  83
  84         spin_lock_irqsave(&dsp_lock, flags);
  85         OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulMsaAddr);
  86         OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulMsaAddr >> 16));
  87         val = InWordDsp(DSP_MsaDataDSISHigh);
  88         spin_unlock_irqrestore(&dsp_lock, flags);
  89
  90         PRINTK_2(TRACE_3780I, "3780i::dsp3780I_ReadMsaCfg exit val %x\n", val);
  91
  92         return val;
  93 }
  94
  95 void dsp3780I_WriteMsaCfg(unsigned short usDspBaseIO,
  96                           unsigned long ulMsaAddr, unsigned short usValue)
  97 {
  98         unsigned long flags;
  99
 100         PRINTK_4(TRACE_3780I,
 101                 "3780i::dsp3780i_WriteMsaCfg entry usDspBaseIO %x ulMsaAddr %lx usValue %x\n",
 102                 usDspBaseIO, ulMsaAddr, usValue);
 103
 104         spin_lock_irqsave(&dsp_lock, flags);
 105         OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulMsaAddr);
 106         OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulMsaAddr >> 16));
 107         OutWordDsp(DSP_MsaDataDSISHigh, usValue);
 108         spin_unlock_irqrestore(&dsp_lock, flags);
 109 }
 110
 111 static void dsp3780I_WriteGenCfg(unsigned short usDspBaseIO, unsigned uIndex,
 112                                  unsigned char ucValue)
 113 {
 114         DSP_ISA_SLAVE_CONTROL rSlaveControl;
 115         DSP_ISA_SLAVE_CONTROL rSlaveControl_Save;
 116
 117
 118         PRINTK_4(TRACE_3780I,
 119                 "3780i::dsp3780i_WriteGenCfg entry usDspBaseIO %x uIndex %x ucValue %x\n",
 120                 usDspBaseIO, uIndex, ucValue);
 121
 122         MKBYTE(rSlaveControl) = InByteDsp(DSP_IsaSlaveControl);
 123
 124         PRINTK_2(TRACE_3780I,
 125                 "3780i::dsp3780i_WriteGenCfg rSlaveControl %x\n",
 126                 MKBYTE(rSlaveControl));
 127
 128         rSlaveControl_Save = rSlaveControl;
 129         rSlaveControl.ConfigMode = TRUE;
 130
 131         PRINTK_2(TRACE_3780I,
 132                 "3780i::dsp3780i_WriteGenCfg entry rSlaveControl+ConfigMode %x\n",
 133                 MKBYTE(rSlaveControl));
 134
 135         OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl));
 136         OutByteDsp(DSP_ConfigAddress, (unsigned char) uIndex);
 137         OutByteDsp(DSP_ConfigData, ucValue);
 138         OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl_Save));
 139
 140         PRINTK_1(TRACE_3780I, "3780i::dsp3780i_WriteGenCfg exit\n");
 141
 142
 143 }
 144
 145 #if 0
 146 unsigned char dsp3780I_ReadGenCfg(unsigned short usDspBaseIO,
 147                                   unsigned uIndex)
 148 {
 149         DSP_ISA_SLAVE_CONTROL rSlaveControl;
 150         DSP_ISA_SLAVE_CONTROL rSlaveControl_Save;
 151         unsigned char ucValue;
 152
 153
 154         PRINTK_3(TRACE_3780I,
 155                 "3780i::dsp3780i_ReadGenCfg entry usDspBaseIO %x uIndex %x\n",
 156                 usDspBaseIO, uIndex);
 157
 158         MKBYTE(rSlaveControl) = InByteDsp(DSP_IsaSlaveControl);
 159         rSlaveControl_Save = rSlaveControl;
 160         rSlaveControl.ConfigMode = TRUE;
 161         OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl));
 162         OutByteDsp(DSP_ConfigAddress, (unsigned char) uIndex);
 163         ucValue = InByteDsp(DSP_ConfigData);
 164         OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl_Save));
 165
 166         PRINTK_2(TRACE_3780I,
 167                 "3780i::dsp3780i_ReadGenCfg exit ucValue %x\n", ucValue);
 168
 169
 170         return ucValue;
 171 }
 172 #endif  /*  0  */
 173
 174 int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
 175                        unsigned short *pIrqMap,
 176                        unsigned short *pDmaMap)
 177 {
 178         unsigned long flags;
 179         unsigned short usDspBaseIO = pSettings->usDspBaseIO;
 180         int i;
 181         DSP_UART_CFG_1 rUartCfg1;
 182         DSP_UART_CFG_2 rUartCfg2;
 183         DSP_HBRIDGE_CFG_1 rHBridgeCfg1;
 184         DSP_HBRIDGE_CFG_2 rHBridgeCfg2;
 185         DSP_BUSMASTER_CFG_1 rBusmasterCfg1;
 186         DSP_BUSMASTER_CFG_2 rBusmasterCfg2;
 187         DSP_ISA_PROT_CFG rIsaProtCfg;
 188         DSP_POWER_MGMT_CFG rPowerMgmtCfg;
 189         DSP_HBUS_TIMER_CFG rHBusTimerCfg;
 190         DSP_LBUS_TIMEOUT_DISABLE rLBusTimeoutDisable;
 191         DSP_CHIP_RESET rChipReset;
 192         DSP_CLOCK_CONTROL_1 rClockControl1;
 193         DSP_CLOCK_CONTROL_2 rClockControl2;
 194         DSP_ISA_SLAVE_CONTROL rSlaveControl;
 195         DSP_HBRIDGE_CONTROL rHBridgeControl;
 196         unsigned short ChipID = 0;
 197         unsigned short tval;
 198
 199
 200         PRINTK_2(TRACE_3780I,
 201                 "3780i::dsp3780I_EnableDSP entry pSettings->bDSPEnabled %x\n",
 202                 pSettings->bDSPEnabled);
 203
 204
 205         if (!pSettings->bDSPEnabled) {
 206                 PRINTK_ERROR( KERN_ERR "3780i::dsp3780I_EnableDSP: Error: DSP not enabled. Aborting.\n" );
 207                 return -EIO;
 208         }
 209
 210
 211         PRINTK_2(TRACE_3780I,
 212                 "3780i::dsp3780i_EnableDSP entry pSettings->bModemEnabled %x\n",
 213                 pSettings->bModemEnabled);
 214
 215         if (pSettings->bModemEnabled) {
 216                 rUartCfg1.Reserved = rUartCfg2.Reserved = 0;
 217                 rUartCfg1.IrqActiveLow = pSettings->bUartIrqActiveLow;
 218                 rUartCfg1.IrqPulse = pSettings->bUartIrqPulse;
 219                 rUartCfg1.Irq =
 220                         (unsigned char) pIrqMap[pSettings->usUartIrq];
 221                 switch (pSettings->usUartBaseIO) {
 222                 case 0x03F8:
 223                         rUartCfg1.BaseIO = 0;
 224                         break;
 225                 case 0x02F8:
 226                         rUartCfg1.BaseIO = 1;
 227                         break;
 228                 case 0x03E8:
 229                         rUartCfg1.BaseIO = 2;
 230                         break;
 231                 case 0x02E8:
 232                         rUartCfg1.BaseIO = 3;
 233                         break;
 234                 }
 235                 rUartCfg2.Enable = TRUE;
 236         }
 237
 238         rHBridgeCfg1.Reserved = rHBridgeCfg2.Reserved = 0;
 239         rHBridgeCfg1.IrqActiveLow = pSettings->bDspIrqActiveLow;
 240         rHBridgeCfg1.IrqPulse = pSettings->bDspIrqPulse;
 241         rHBridgeCfg1.Irq = (unsigned char) pIrqMap[pSettings->usDspIrq];
 242         rHBridgeCfg1.AccessMode = 1;
 243         rHBridgeCfg2.Enable = TRUE;
 244
 245
 246         rBusmasterCfg2.Reserved = 0;
 247         rBusmasterCfg1.Dma = (unsigned char) pDmaMap[pSettings->usDspDma];
 248         rBusmasterCfg1.NumTransfers =
 249                 (unsigned char) pSettings->usNumTransfers;
 250         rBusmasterCfg1.ReRequest = (unsigned char) pSettings->usReRequest;
 251         rBusmasterCfg1.MEMCS16 = pSettings->bEnableMEMCS16;
 252         rBusmasterCfg2.IsaMemCmdWidth =
 253                 (unsigned char) pSettings->usIsaMemCmdWidth;
 254
 255
 256         rIsaProtCfg.Reserved = 0;
 257         rIsaProtCfg.GateIOCHRDY = pSettings->bGateIOCHRDY;
 258
 259         rPowerMgmtCfg.Reserved = 0;
 260         rPowerMgmtCfg.Enable = pSettings->bEnablePwrMgmt;
 261
 262         rHBusTimerCfg.LoadValue =
 263                 (unsigned char) pSettings->usHBusTimerLoadValue;
 264
 265         rLBusTimeoutDisable.Reserved = 0;
 266         rLBusTimeoutDisable.DisableTimeout =
 267                 pSettings->bDisableLBusTimeout;
 268
 269         MKWORD(rChipReset) = ~pSettings->usChipletEnable;
 270
 271         rClockControl1.Reserved1 = rClockControl1.Reserved2 = 0;
 272         rClockControl1.N_Divisor = pSettings->usN_Divisor;
 273         rClockControl1.M_Multiplier = pSettings->usM_Multiplier;
 274
 275         rClockControl2.Reserved = 0;
 276         rClockControl2.PllBypass = pSettings->bPllBypass;
 277
 278         /* Issue a soft reset to the chip */
 279         /* Note: Since we may be coming in with 3780i clocks suspended, we must keep
 280         * soft-reset active for 10ms.
 281         */
 282         rSlaveControl.ClockControl = 0;
 283         rSlaveControl.SoftReset = TRUE;
 284         rSlaveControl.ConfigMode = FALSE;
 285         rSlaveControl.Reserved = 0;
 286
 287         PRINTK_4(TRACE_3780I,
 288                 "3780i::dsp3780i_EnableDSP usDspBaseIO %x index %x taddr %x\n",
 289                 usDspBaseIO, DSP_IsaSlaveControl,
 290                 usDspBaseIO + DSP_IsaSlaveControl);
 291
 292         PRINTK_2(TRACE_3780I,
 293                 "3780i::dsp3780i_EnableDSP rSlaveContrl %x\n",
 294                 MKWORD(rSlaveControl));
 295
 296         spin_lock_irqsave(&dsp_lock, flags);
 297         OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
 298         MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl);
 299
 300         PRINTK_2(TRACE_3780I,
 301                 "3780i::dsp3780i_EnableDSP rSlaveControl 2 %x\n", tval);
 302
 303
 304         for (i = 0; i < 11; i++)
 305                 udelay(2000);
 306
 307         rSlaveControl.SoftReset = FALSE;
 308         OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
 309
 310         MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl);
 311
 312         PRINTK_2(TRACE_3780I,
 313                 "3780i::dsp3780i_EnableDSP rSlaveControl 3 %x\n", tval);
 314
 315
 316         /* Program our general configuration registers */
 317         WriteGenCfg(DSP_HBridgeCfg1Index, MKBYTE(rHBridgeCfg1));
 318         WriteGenCfg(DSP_HBridgeCfg2Index, MKBYTE(rHBridgeCfg2));
 319         WriteGenCfg(DSP_BusMasterCfg1Index, MKBYTE(rBusmasterCfg1));
 320         WriteGenCfg(DSP_BusMasterCfg2Index, MKBYTE(rBusmasterCfg2));
 321         WriteGenCfg(DSP_IsaProtCfgIndex, MKBYTE(rIsaProtCfg));
 322         WriteGenCfg(DSP_PowerMgCfgIndex, MKBYTE(rPowerMgmtCfg));
 323         WriteGenCfg(DSP_HBusTimerCfgIndex, MKBYTE(rHBusTimerCfg));
 324
 325         if (pSettings->bModemEnabled) {
 326                 WriteGenCfg(DSP_UartCfg1Index, MKBYTE(rUartCfg1));
 327                 WriteGenCfg(DSP_UartCfg2Index, MKBYTE(rUartCfg2));
 328         }
 329
 330
 331         rHBridgeControl.EnableDspInt = FALSE;
 332         rHBridgeControl.MemAutoInc = TRUE;
 333         rHBridgeControl.IoAutoInc = FALSE;
 334         rHBridgeControl.DiagnosticMode = FALSE;
 335
 336         PRINTK_3(TRACE_3780I,
 337                 "3780i::dsp3780i_EnableDSP DSP_HBridgeControl %x rHBridgeControl %x\n",
 338                 DSP_HBridgeControl, MKWORD(rHBridgeControl));
 339
 340         OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
 341         spin_unlock_irqrestore(&dsp_lock, flags);
 342         WriteMsaCfg(DSP_LBusTimeoutDisable, MKWORD(rLBusTimeoutDisable));
 343         WriteMsaCfg(DSP_ClockControl_1, MKWORD(rClockControl1));
 344         WriteMsaCfg(DSP_ClockControl_2, MKWORD(rClockControl2));
 345         WriteMsaCfg(DSP_ChipReset, MKWORD(rChipReset));
 346
 347         ChipID = ReadMsaCfg(DSP_ChipID);
 348
 349         PRINTK_2(TRACE_3780I,
 350                 "3780i::dsp3780I_EnableDSP exiting bRC=TRUE, ChipID %x\n",
 351                 ChipID);
 352
 353         return 0;
 354 }
 355
 356 int dsp3780I_DisableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings)
 357 {
 358         unsigned long flags;
 359         unsigned short usDspBaseIO = pSettings->usDspBaseIO;
 360         DSP_ISA_SLAVE_CONTROL rSlaveControl;
 361
 362
 363         PRINTK_1(TRACE_3780I, "3780i::dsp3780i_DisableDSP entry\n");
 364
 365         rSlaveControl.ClockControl = 0;
 366         rSlaveControl.SoftReset = TRUE;
 367         rSlaveControl.ConfigMode = FALSE;
 368         rSlaveControl.Reserved = 0;
 369         spin_lock_irqsave(&dsp_lock, flags);
 370         OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
 371
 372         udelay(5);
 373
 374         rSlaveControl.ClockControl = 1;
 375         OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
 376         spin_unlock_irqrestore(&dsp_lock, flags);
 377
 378         udelay(5);
 379
 380
 381         PRINTK_1(TRACE_3780I, "3780i::dsp3780i_DisableDSP exit\n");
 382
 383         return 0;
 384 }
 385
 386 int dsp3780I_Reset(DSP_3780I_CONFIG_SETTINGS * pSettings)
 387 {
 388         unsigned long flags;
 389         unsigned short usDspBaseIO = pSettings->usDspBaseIO;
 390         DSP_BOOT_DOMAIN rBootDomain;
 391         DSP_HBRIDGE_CONTROL rHBridgeControl;
 392
 393
 394         PRINTK_1(TRACE_3780I, "3780i::dsp3780i_Reset entry\n");
 395
 396         spin_lock_irqsave(&dsp_lock, flags);
 397         /* Mask DSP to PC interrupt */
 398         MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl);
 399
 400         PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Reset rHBridgeControl %x\n",
 401                 MKWORD(rHBridgeControl));
 402
 403         rHBridgeControl.EnableDspInt = FALSE;
 404         OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
 405         spin_unlock_irqrestore(&dsp_lock, flags);
 406
 407         /* Reset the core via the boot domain register */
 408         rBootDomain.ResetCore = TRUE;
 409         rBootDomain.Halt = TRUE;
 410         rBootDomain.NMI = TRUE;
 411         rBootDomain.Reserved = 0;
 412
 413         PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Reset rBootDomain %x\n",
 414                 MKWORD(rBootDomain));
 415
 416         WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
 417
 418         /* Reset all the chiplets and then reactivate them */
 419         WriteMsaCfg(DSP_ChipReset, 0xFFFF);
 420         udelay(5);
 421         WriteMsaCfg(DSP_ChipReset,
 422                         (unsigned short) (~pSettings->usChipletEnable));
 423
 424
 425         PRINTK_1(TRACE_3780I, "3780i::dsp3780i_Reset exit bRC=0\n");
 426
 427         return 0;
 428 }
 429
 430
 431 int dsp3780I_Run(DSP_3780I_CONFIG_SETTINGS * pSettings)
 432 {
 433         unsigned long flags;
 434         unsigned short usDspBaseIO = pSettings->usDspBaseIO;
 435         DSP_BOOT_DOMAIN rBootDomain;
 436         DSP_HBRIDGE_CONTROL rHBridgeControl;
 437
 438
 439         PRINTK_1(TRACE_3780I, "3780i::dsp3780i_Run entry\n");
 440
 441
 442         /* Transition the core to a running state */
 443         rBootDomain.ResetCore = TRUE;
 444         rBootDomain.Halt = FALSE;
 445         rBootDomain.NMI = TRUE;
 446         rBootDomain.Reserved = 0;
 447         WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
 448
 449         udelay(5);
 450
 451         rBootDomain.ResetCore = FALSE;
 452         WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
 453         udelay(5);
 454
 455         rBootDomain.NMI = FALSE;
 456         WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
 457         udelay(5);
 458
 459         /* Enable DSP to PC interrupt */
 460         spin_lock_irqsave(&dsp_lock, flags);
 461         MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl);
 462         rHBridgeControl.EnableDspInt = TRUE;
 463
 464         PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Run rHBridgeControl %x\n",
 465                 MKWORD(rHBridgeControl));
 466
 467         OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
 468         spin_unlock_irqrestore(&dsp_lock, flags);
 469
 470
 471         PRINTK_1(TRACE_3780I, "3780i::dsp3780i_Run exit bRC=TRUE\n");
 472
 473         return 0;
 474 }
 475
 476
 477 int dsp3780I_ReadDStore(unsigned short usDspBaseIO, void __user *pvBuffer,
 478                         unsigned uCount, unsigned long ulDSPAddr)
 479 {
 480         unsigned long flags;
 481         unsigned short __user *pusBuffer = pvBuffer;
 482         unsigned short val;
 483
 484
 485         PRINTK_5(TRACE_3780I,
 486                 "3780i::dsp3780I_ReadDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx\n",
 487                 usDspBaseIO, pusBuffer, uCount, ulDSPAddr);
 488
 489
 490         /* Set the initial MSA address. No adjustments need to be made to data store addresses */
 491         spin_lock_irqsave(&dsp_lock, flags);
 492         OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr);
 493         OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16));
 494         spin_unlock_irqrestore(&dsp_lock, flags);
 495
 496         /* Transfer the memory block */
 497         while (uCount-- != 0) {
 498                 spin_lock_irqsave(&dsp_lock, flags);
 499                 val = InWordDsp(DSP_MsaDataDSISHigh);
 500                 spin_unlock_irqrestore(&dsp_lock, flags);
 501                 if(put_user(val, pusBuffer++))
 502                         return -EFAULT;
 503
 504                 PRINTK_3(TRACE_3780I,
 505                         "3780I::dsp3780I_ReadDStore uCount %x val %x\n",
 506                         uCount, val);
 507
 508                 PaceMsaAccess(usDspBaseIO);
 509         }
 510
 511
 512         PRINTK_1(TRACE_3780I,
 513                 "3780I::dsp3780I_ReadDStore exit bRC=TRUE\n");
 514
 515         return 0;
 516 }
 517
 518 int dsp3780I_ReadAndClearDStore(unsigned short usDspBaseIO,
 519                                 void __user *pvBuffer, unsigned uCount,
 520                                 unsigned long ulDSPAddr)
 521 {
 522         unsigned long flags;
 523         unsigned short __user *pusBuffer = pvBuffer;
 524         unsigned short val;
 525
 526
 527         PRINTK_5(TRACE_3780I,
 528                 "3780i::dsp3780I_ReadAndDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx\n",
 529                 usDspBaseIO, pusBuffer, uCount, ulDSPAddr);
 530
 531
 532         /* Set the initial MSA address. No adjustments need to be made to data store addresses */
 533         spin_lock_irqsave(&dsp_lock, flags);
 534         OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr);
 535         OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16));
 536         spin_unlock_irqrestore(&dsp_lock, flags);
 537
 538         /* Transfer the memory block */
 539         while (uCount-- != 0) {
 540                 spin_lock_irqsave(&dsp_lock, flags);
 541                 val = InWordDsp(DSP_ReadAndClear);
 542                 spin_unlock_irqrestore(&dsp_lock, flags);
 543                 if(put_user(val, pusBuffer++))
 544                         return -EFAULT;
 545
 546                 PRINTK_3(TRACE_3780I,
 547                         "3780I::dsp3780I_ReadAndCleanDStore uCount %x val %x\n",
 548                         uCount, val);
 549
 550                 PaceMsaAccess(usDspBaseIO);
 551         }
 552
 553
 554         PRINTK_1(TRACE_3780I,
 555                 "3780I::dsp3780I_ReadAndClearDStore exit bRC=TRUE\n");
 556
 557         return 0;
 558 }
 559
 560
 561 int dsp3780I_WriteDStore(unsigned short usDspBaseIO, void __user *pvBuffer,
 562                          unsigned uCount, unsigned long ulDSPAddr)
 563 {
 564         unsigned long flags;
 565         unsigned short __user *pusBuffer = pvBuffer;
 566
 567
 568         PRINTK_5(TRACE_3780I,
 569                 "3780i::dsp3780D_WriteDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx\n",
 570                 usDspBaseIO, pusBuffer, uCount, ulDSPAddr);
 571
 572
 573         /* Set the initial MSA address. No adjustments need to be made to data store addresses */
 574         spin_lock_irqsave(&dsp_lock, flags);
 575         OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr);
 576         OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16));
 577         spin_unlock_irqrestore(&dsp_lock, flags);
 578
 579         /* Transfer the memory block */
 580         while (uCount-- != 0) {
 581                 unsigned short val;
 582                 if(get_user(val, pusBuffer++))
 583                         return -EFAULT;
 584                 spin_lock_irqsave(&dsp_lock, flags);
 585                 OutWordDsp(DSP_MsaDataDSISHigh, val);
 586                 spin_unlock_irqrestore(&dsp_lock, flags);
 587
 588                 PRINTK_3(TRACE_3780I,
 589                         "3780I::dsp3780I_WriteDStore uCount %x val %x\n",
 590                         uCount, val);
 591
 592                 PaceMsaAccess(usDspBaseIO);
 593         }
 594
 595
 596         PRINTK_1(TRACE_3780I,
 597                 "3780I::dsp3780D_WriteDStore exit bRC=TRUE\n");
 598
 599         return 0;
 600 }
 601
 602
 603 int dsp3780I_ReadIStore(unsigned short usDspBaseIO, void __user *pvBuffer,
 604                         unsigned uCount, unsigned long ulDSPAddr)
 605 {
 606         unsigned long flags;
 607         unsigned short __user *pusBuffer = pvBuffer;
 608
 609         PRINTK_5(TRACE_3780I,
 610                 "3780i::dsp3780I_ReadIStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx\n",
 611                 usDspBaseIO, pusBuffer, uCount, ulDSPAddr);
 612
 613         /*
 614         * Set the initial MSA address. To convert from an instruction store
 615         * address to an MSA address
 616         * shift the address two bits to the left and set bit 22
 617         */
 618         ulDSPAddr = (ulDSPAddr << 2) | (1 << 22);
 619         spin_lock_irqsave(&dsp_lock, flags);
 620         OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr);
 621         OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16));
 622         spin_unlock_irqrestore(&dsp_lock, flags);
 623
 624         /* Transfer the memory block */
 625         while (uCount-- != 0) {
 626                 unsigned short val_lo, val_hi;
 627                 spin_lock_irqsave(&dsp_lock, flags);
 628                 val_lo = InWordDsp(DSP_MsaDataISLow);
 629                 val_hi = InWordDsp(DSP_MsaDataDSISHigh);
 630                 spin_unlock_irqrestore(&dsp_lock, flags);
 631                 if(put_user(val_lo, pusBuffer++))
 632                         return -EFAULT;
 633                 if(put_user(val_hi, pusBuffer++))
 634                         return -EFAULT;
 635
 636                 PRINTK_4(TRACE_3780I,
 637                         "3780I::dsp3780I_ReadIStore uCount %x val_lo %x val_hi %x\n",
 638                         uCount, val_lo, val_hi);
 639
 640                 PaceMsaAccess(usDspBaseIO);
 641
 642         }
 643
 644         PRINTK_1(TRACE_3780I,
 645                 "3780I::dsp3780I_ReadIStore exit bRC=TRUE\n");
 646
 647         return 0;
 648 }
 649
 650
 651 int dsp3780I_WriteIStore(unsigned short usDspBaseIO, void __user *pvBuffer,
 652                          unsigned uCount, unsigned long ulDSPAddr)
 653 {
 654         unsigned long flags;
 655         unsigned short __user *pusBuffer = pvBuffer;
 656
 657         PRINTK_5(TRACE_3780I,
 658                 "3780i::dsp3780I_WriteIStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx\n",
 659                 usDspBaseIO, pusBuffer, uCount, ulDSPAddr);
 660
 661
 662         /*
 663         * Set the initial MSA address. To convert from an instruction store
 664         * address to an MSA address
 665         * shift the address two bits to the left and set bit 22
 666         */
 667         ulDSPAddr = (ulDSPAddr << 2) | (1 << 22);
 668         spin_lock_irqsave(&dsp_lock, flags);
 669         OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr);
 670         OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16));
 671         spin_unlock_irqrestore(&dsp_lock, flags);
 672
 673         /* Transfer the memory block */
 674         while (uCount-- != 0) {
 675                 unsigned short val_lo, val_hi;
 676                 if(get_user(val_lo, pusBuffer++))
 677                         return -EFAULT;
 678                 if(get_user(val_hi, pusBuffer++))
 679                         return -EFAULT;
 680                 spin_lock_irqsave(&dsp_lock, flags);
 681                 OutWordDsp(DSP_MsaDataISLow, val_lo);
 682                 OutWordDsp(DSP_MsaDataDSISHigh, val_hi);
 683                 spin_unlock_irqrestore(&dsp_lock, flags);
 684
 685                 PRINTK_4(TRACE_3780I,
 686                         "3780I::dsp3780I_WriteIStore uCount %x val_lo %x val_hi %x\n",
 687                         uCount, val_lo, val_hi);
 688
 689                 PaceMsaAccess(usDspBaseIO);
 690
 691         }
 692
 693         PRINTK_1(TRACE_3780I,
 694                 "3780I::dsp3780I_WriteIStore exit bRC=TRUE\n");
 695
 696         return 0;
 697 }
 698
 699
 700 int dsp3780I_GetIPCSource(unsigned short usDspBaseIO,
 701                           unsigned short *pusIPCSource)
 702 {
 703         unsigned long flags;
 704         DSP_HBRIDGE_CONTROL rHBridgeControl;
 705         unsigned short temp;
 706
 707
 708         PRINTK_3(TRACE_3780I,
 709                 "3780i::dsp3780I_GetIPCSource entry usDspBaseIO %x pusIPCSource %p\n",
 710                 usDspBaseIO, pusIPCSource);
 711
 712         /*
 713         * Disable DSP to PC interrupts, read the interrupt register,
 714         * clear the pending IPC bits, and reenable DSP to PC interrupts
 715         */
 716         spin_lock_irqsave(&dsp_lock, flags);
 717         MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl);
 718         rHBridgeControl.EnableDspInt = FALSE;
 719         OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
 720
 721         *pusIPCSource = InWordDsp(DSP_Interrupt);
 722         temp = (unsigned short) ~(*pusIPCSource);
 723
 724         PRINTK_3(TRACE_3780I,
 725                 "3780i::dsp3780I_GetIPCSource, usIPCSource %x ~ %x\n",
 726                 *pusIPCSource, temp);
 727
 728         OutWordDsp(DSP_Interrupt, (unsigned short) ~(*pusIPCSource));
 729
 730         rHBridgeControl.EnableDspInt = TRUE;
 731         OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
 732         spin_unlock_irqrestore(&dsp_lock, flags);
 733
 734
 735         PRINTK_2(TRACE_3780I,
 736                 "3780i::dsp3780I_GetIPCSource exit usIPCSource %x\n",
 737                 *pusIPCSource);
 738
 739         return 0;
 740 }