1 /* $Id: traps.c,v 1.17 2004/05/02 01:46:30 sugioka Exp $
3 * linux/arch/sh/traps.c
5 * SuperH version: Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2000 Philipp Rumpf
7 * Copyright (C) 2000 David Howells
8 * Copyright (C) 2002, 2003 Paul Mundt
12 * 'Traps.c' handles hardware traps and faults after we have saved some
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/ptrace.h>
20 #include <linux/timer.h>
22 #include <linux/smp.h>
23 #include <linux/smp_lock.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/spinlock.h>
27 #include <linux/module.h>
28 #include <linux/kallsyms.h>
30 #include <asm/system.h>
31 #include <asm/uaccess.h>
33 #include <asm/atomic.h>
34 #include <asm/processor.h>
35 #include <asm/sections.h>
39 #define CHK_REMOTE_DEBUG(regs) \
41 if (kgdb_debug_hook && !user_mode(regs))\
42 (*kgdb_debug_hook)(regs); \
45 #define CHK_REMOTE_DEBUG(regs)
49 #define TRAP_RESERVED_INST 4
50 #define TRAP_ILLEGAL_SLOT_INST 6
52 #define TRAP_RESERVED_INST 12
53 #define TRAP_ILLEGAL_SLOT_INST 13
57 * These constants are for searching for possible module text
58 * segments. VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is
59 * a guess of how much space is likely to be vmalloced.
61 #define VMALLOC_OFFSET (8*1024*1024)
62 #define MODULE_RANGE (8*1024*1024)
64 DEFINE_SPINLOCK(die_lock);
66 void die(const char * str, struct pt_regs * regs, long err)
68 static int die_counter;
71 spin_lock_irq(&die_lock);
72 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
73 CHK_REMOTE_DEBUG(regs);
75 spin_unlock_irq(&die_lock);
79 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
85 static int handle_unaligned_notify_count = 10;
88 * try and fix up kernelspace address errors
89 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
90 * - kernel/userspace interfaces cause a jump to an appropriate handler
91 * - other kernel errors are bad
92 * - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault
94 static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
98 const struct exception_table_entry *fixup;
99 fixup = search_exception_tables(regs->pc);
101 regs->pc = fixup->fixup;
110 * handle an instruction that does an unaligned memory access by emulating the
112 * - note that PC _may not_ point to the faulting instruction
113 * (if that instruction is in a branch delay slot)
114 * - return 0 if emulation okay, -EFAULT on existential error
116 static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
118 int ret, index, count;
119 unsigned long *rm, *rn;
120 unsigned char *src, *dst;
122 index = (instruction>>8)&15; /* 0x0F00 */
123 rn = ®s->regs[index];
125 index = (instruction>>4)&15; /* 0x00F0 */
126 rm = ®s->regs[index];
128 count = 1<<(instruction&3);
131 switch (instruction>>12) {
132 case 0: /* mov.[bwl] to/from memory via r0+rn */
133 if (instruction & 8) {
135 src = (unsigned char*) *rm;
136 src += regs->regs[0];
137 dst = (unsigned char*) rn;
138 *(unsigned long*)dst = 0;
140 #ifdef __LITTLE_ENDIAN__
141 if (copy_from_user(dst, src, count))
144 if ((count == 2) && dst[1] & 0x80) {
151 if (__copy_user(dst, src, count))
154 if ((count == 2) && dst[2] & 0x80) {
161 src = (unsigned char*) rm;
162 #if !defined(__LITTLE_ENDIAN__)
165 dst = (unsigned char*) *rn;
166 dst += regs->regs[0];
168 if (copy_to_user(dst, src, count))
174 case 1: /* mov.l Rm,@(disp,Rn) */
175 src = (unsigned char*) rm;
176 dst = (unsigned char*) *rn;
177 dst += (instruction&0x000F)<<2;
179 if (copy_to_user(dst,src,4))
184 case 2: /* mov.[bwl] to memory, possibly with pre-decrement */
187 src = (unsigned char*) rm;
188 dst = (unsigned char*) *rn;
189 #if !defined(__LITTLE_ENDIAN__)
192 if (copy_to_user(dst, src, count))
197 case 5: /* mov.l @(disp,Rm),Rn */
198 src = (unsigned char*) *rm;
199 src += (instruction&0x000F)<<2;
200 dst = (unsigned char*) rn;
201 *(unsigned long*)dst = 0;
203 if (copy_from_user(dst,src,4))
208 case 6: /* mov.[bwl] from memory, possibly with post-increment */
209 src = (unsigned char*) *rm;
212 dst = (unsigned char*) rn;
213 *(unsigned long*)dst = 0;
215 #ifdef __LITTLE_ENDIAN__
216 if (copy_from_user(dst, src, count))
219 if ((count == 2) && dst[1] & 0x80) {
226 if (copy_from_user(dst, src, count))
229 if ((count == 2) && dst[2] & 0x80) {
238 switch ((instruction&0xFF00)>>8) {
239 case 0x81: /* mov.w R0,@(disp,Rn) */
240 src = (unsigned char*) ®s->regs[0];
241 #if !defined(__LITTLE_ENDIAN__)
244 dst = (unsigned char*) *rm; /* called Rn in the spec */
245 dst += (instruction&0x000F)<<1;
247 if (copy_to_user(dst, src, 2))
252 case 0x85: /* mov.w @(disp,Rm),R0 */
253 src = (unsigned char*) *rm;
254 src += (instruction&0x000F)<<1;
255 dst = (unsigned char*) ®s->regs[0];
256 *(unsigned long*)dst = 0;
258 #if !defined(__LITTLE_ENDIAN__)
262 if (copy_from_user(dst, src, 2))
265 #ifdef __LITTLE_ENDIAN__
284 /* Argh. Address not only misaligned but also non-existent.
285 * Raise an EFAULT and see if it's trapped
287 return die_if_no_fixup("Fault in unaligned fixup", regs, 0);
291 * emulate the instruction in the delay slot
292 * - fetches the instruction from PC+2
294 static inline int handle_unaligned_delayslot(struct pt_regs *regs)
298 if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) {
299 /* the instruction-fetch faulted */
304 die("delay-slot-insn faulting in handle_unaligned_delayslot", regs, 0);
307 return handle_unaligned_ins(instruction,regs);
311 * handle an instruction that does an unaligned memory access
312 * - have to be careful of branch delay-slot instructions that fault
314 * - if the branch would be taken PC points to the branch
315 * - if the branch would not be taken, PC points to delay-slot
317 * - PC always points to delayed branch
318 * - return 0 if handled, -EFAULT if failed (may not return if in kernel)
321 /* Macros to determine offset from current PC for branch instructions */
322 /* Explicit type coercion is used to force sign extension where needed */
323 #define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
324 #define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
326 static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
331 index = (instruction>>8)&15; /* 0x0F00 */
332 rm = regs->regs[index];
334 /* shout about the first ten userspace fixups */
335 if (user_mode(regs) && handle_unaligned_notify_count>0) {
336 handle_unaligned_notify_count--;
338 printk("Fixing up unaligned userspace access in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
339 current->comm,current->pid,(u16*)regs->pc,instruction);
343 switch (instruction&0xF000) {
345 if (instruction==0x000B) {
347 ret = handle_unaligned_delayslot(regs);
351 else if ((instruction&0x00FF)==0x0023) {
353 ret = handle_unaligned_delayslot(regs);
357 else if ((instruction&0x00FF)==0x0003) {
359 ret = handle_unaligned_delayslot(regs);
361 regs->pr = regs->pc + 4;
366 /* mov.[bwl] to/from memory via r0+rn */
371 case 0x1000: /* mov.l Rm,@(disp,Rn) */
374 case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */
378 if ((instruction&0x00FF)==0x002B) {
380 ret = handle_unaligned_delayslot(regs);
384 else if ((instruction&0x00FF)==0x000B) {
386 ret = handle_unaligned_delayslot(regs);
388 regs->pr = regs->pc + 4;
393 /* mov.[bwl] to/from memory via r0+rn */
398 case 0x5000: /* mov.l @(disp,Rm),Rn */
401 case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */
404 case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */
405 switch (instruction&0x0F00) {
406 case 0x0100: /* mov.w R0,@(disp,Rm) */
408 case 0x0500: /* mov.w @(disp,Rm),R0 */
410 case 0x0B00: /* bf lab - no delayslot*/
412 case 0x0F00: /* bf/s lab */
413 ret = handle_unaligned_delayslot(regs);
415 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
416 if ((regs->sr & 0x00000001) != 0)
417 regs->pc += 4; /* next after slot */
420 regs->pc += SH_PC_8BIT_OFFSET(instruction);
423 case 0x0900: /* bt lab - no delayslot */
425 case 0x0D00: /* bt/s lab */
426 ret = handle_unaligned_delayslot(regs);
428 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
429 if ((regs->sr & 0x00000001) == 0)
430 regs->pc += 4; /* next after slot */
433 regs->pc += SH_PC_8BIT_OFFSET(instruction);
439 case 0xA000: /* bra label */
440 ret = handle_unaligned_delayslot(regs);
442 regs->pc += SH_PC_12BIT_OFFSET(instruction);
445 case 0xB000: /* bsr label */
446 ret = handle_unaligned_delayslot(regs);
448 regs->pr = regs->pc + 4;
449 regs->pc += SH_PC_12BIT_OFFSET(instruction);
455 /* handle non-delay-slot instruction */
457 ret = handle_unaligned_ins(instruction,regs);
464 * Handle various address error exceptions
466 asmlinkage void do_address_error(struct pt_regs *regs,
467 unsigned long writeaccess,
468 unsigned long address)
470 unsigned long error_code;
475 asm volatile("stc r2_bank,%0": "=r" (error_code));
479 if (user_mode(regs)) {
481 current->thread.error_code = error_code;
482 current->thread.trap_no = (writeaccess) ? 8 : 7;
484 /* bad PC is not something we can fix */
489 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
490 /* Argh. Fault on the instruction itself.
491 This should never happen non-SMP
497 tmp = handle_unaligned_access(instruction, regs);
504 printk(KERN_NOTICE "Killing process \"%s\" due to unaligned access\n", current->comm);
505 force_sig(SIGSEGV, current);
508 die("unaligned program counter", regs, error_code);
511 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
512 /* Argh. Fault on the instruction itself.
513 This should never happen non-SMP
516 die("insn faulting in do_address_error", regs, 0);
519 handle_unaligned_access(instruction, regs);
526 * SH-DSP support gerg@snapgear.com.
528 int is_dsp_inst(struct pt_regs *regs)
533 * Safe guard if DSP mode is already enabled or we're lacking
534 * the DSP altogether.
536 if (!(cpu_data->flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
539 get_user(inst, ((unsigned short *) regs->pc));
543 /* Check for any type of DSP or support instruction */
544 if ((inst == 0xf000) || (inst == 0x4000))
550 #define is_dsp_inst(regs) (0)
551 #endif /* CONFIG_SH_DSP */
553 extern int do_fpu_inst(unsigned short, struct pt_regs*);
555 asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
556 unsigned long r6, unsigned long r7,
559 unsigned long error_code;
560 struct task_struct *tsk = current;
562 #ifdef CONFIG_SH_FPU_EMU
566 get_user(inst, (unsigned short*)regs.pc);
568 err = do_fpu_inst(inst, ®s);
573 /* not a FPU inst. */
577 /* Check if it's a DSP instruction */
578 if (is_dsp_inst(®s)) {
579 /* Enable DSP mode, and restart instruction. */
585 asm volatile("stc r2_bank, %0": "=r" (error_code));
587 tsk->thread.error_code = error_code;
588 tsk->thread.trap_no = TRAP_RESERVED_INST;
589 CHK_REMOTE_DEBUG(®s);
590 force_sig(SIGILL, tsk);
591 die_if_no_fixup("reserved instruction", ®s, error_code);
594 #ifdef CONFIG_SH_FPU_EMU
595 static int emulate_branch(unsigned short inst, struct pt_regs* regs)
598 * bfs: 8fxx: PC+=d*2+4;
599 * bts: 8dxx: PC+=d*2+4;
600 * bra: axxx: PC+=D*2+4;
601 * bsr: bxxx: PC+=D*2+4 after PR=PC+4;
602 * braf:0x23: PC+=Rn*2+4;
603 * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4;
605 * jsr: 4x0b: PC=Rn after PR=PC+4;
608 if ((inst & 0xfd00) == 0x8d00) {
609 regs->pc += SH_PC_8BIT_OFFSET(inst);
613 if ((inst & 0xe000) == 0xa000) {
614 regs->pc += SH_PC_12BIT_OFFSET(inst);
618 if ((inst & 0xf0df) == 0x0003) {
619 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
623 if ((inst & 0xf0df) == 0x400b) {
624 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
628 if ((inst & 0xffff) == 0x000b) {
637 asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
638 unsigned long r6, unsigned long r7,
641 unsigned long error_code;
642 struct task_struct *tsk = current;
643 #ifdef CONFIG_SH_FPU_EMU
646 get_user(inst, (unsigned short *)regs.pc + 1);
647 if (!do_fpu_inst(inst, ®s)) {
648 get_user(inst, (unsigned short *)regs.pc);
649 if (!emulate_branch(inst, ®s))
651 /* fault in branch.*/
653 /* not a FPU inst. */
656 asm volatile("stc r2_bank, %0": "=r" (error_code));
658 tsk->thread.error_code = error_code;
659 tsk->thread.trap_no = TRAP_RESERVED_INST;
660 CHK_REMOTE_DEBUG(®s);
661 force_sig(SIGILL, tsk);
662 die_if_no_fixup("illegal slot instruction", ®s, error_code);
665 asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
666 unsigned long r6, unsigned long r7,
670 asm volatile("stc r2_bank, %0" : "=r" (ex));
671 die_if_kernel("exception", ®s, ex);
674 #if defined(CONFIG_SH_STANDARD_BIOS)
675 void *gdb_vbr_vector;
677 static inline void __init gdb_vbr_init(void)
679 register unsigned long vbr;
682 * Read the old value of the VBR register to initialise
683 * the vector through which debug and BIOS traps are
684 * delegated by the Linux trap handler.
686 asm volatile("stc vbr, %0" : "=r" (vbr));
688 gdb_vbr_vector = (void *)(vbr + 0x100);
689 printk("Setting GDB trap vector to 0x%08lx\n",
690 (unsigned long)gdb_vbr_vector);
694 void __init per_cpu_trap_init(void)
696 extern void *vbr_base;
698 #ifdef CONFIG_SH_STANDARD_BIOS
702 /* NOTE: The VBR value should be at P1
703 (or P2, virtural "fixed" address space).
704 It's definitely should not in physical address. */
706 asm volatile("ldc %0, vbr"
712 void __init trap_init(void)
714 extern void *exception_handling_table[];
716 exception_handling_table[TRAP_RESERVED_INST]
717 = (void *)do_reserved_inst;
718 exception_handling_table[TRAP_ILLEGAL_SLOT_INST]
719 = (void *)do_illegal_slot_inst;
721 #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
722 defined(CONFIG_SH_FPU_EMU)
724 * For SH-4 lacking an FPU, treat floating point instructions as
725 * reserved. They'll be handled in the math-emu case, or faulted on
728 /* entry 64 corresponds to EXPEVT=0x800 */
729 exception_handling_table[64] = (void *)do_reserved_inst;
730 exception_handling_table[65] = (void *)do_illegal_slot_inst;
733 /* Setup VBR for boot cpu */
737 void show_stack(struct task_struct *tsk, unsigned long *sp)
739 unsigned long *stack, addr;
740 unsigned long module_start = VMALLOC_START;
741 unsigned long module_end = VMALLOC_END;
747 sp = (unsigned long *)current_stack_pointer;
749 sp = (unsigned long *)tsk->thread.sp;
753 printk("\nCall trace: ");
754 #ifdef CONFIG_KALLSYMS
758 while (!kstack_end(stack)) {
760 if (((addr >= (unsigned long)_text) &&
761 (addr <= (unsigned long)_etext)) ||
762 ((addr >= module_start) && (addr <= module_end))) {
764 * For 80-columns display, 6 entry is maximum.
765 * NOTE: '[<8c00abcd>] ' consumes 13 columns .
767 #ifndef CONFIG_KALLSYMS
768 if (i && ((i % 6) == 0))
771 printk("[<%08lx>] ", addr);
772 print_symbol("%s\n", addr);
780 void show_task(unsigned long *sp)
782 show_stack(NULL, sp);
785 void dump_stack(void)
787 show_stack(NULL, NULL);
789 EXPORT_SYMBOL(dump_stack);