2 * Driver for NEC VR4100 series Serial Interface Unit.
4 * Copyright (C) 2004-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
6 * Based on drivers/serial/8250.c, by Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27 #include <linux/console.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/ioport.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/serial.h>
35 #include <linux/serial_core.h>
36 #include <linux/serial_reg.h>
37 #include <linux/tty.h>
38 #include <linux/tty_flip.h>
41 #include <asm/vr41xx/siu.h>
42 #include <asm/vr41xx/vr41xx.h>
44 #define SIU_BAUD_BASE 1152000
46 #define SIU_MINOR_BASE 82
48 #define RX_MAX_COUNT 256
49 #define TX_MAX_COUNT 15
55 #define IRMSEL_HP 0x08
56 #define IRMSEL_TEMIC 0x04
57 #define IRMSEL_SHARP 0x00
61 static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
62 [0 ... SIU_PORTS_MAX-1] = {
63 .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
68 static uint8_t lsr_break_flag[SIU_PORTS_MAX];
70 #define siu_read(port, offset) readb((port)->membase + (offset))
71 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
73 void vr41xx_select_siu_interface(siu_interface_t interface)
75 struct uart_port *port;
79 port = &siu_uart_ports[0];
81 spin_lock_irqsave(&port->lock, flags);
83 irsel = siu_read(port, SIUIRSEL);
84 if (interface == SIU_INTERFACE_IRDA)
88 siu_write(port, SIUIRSEL, irsel);
90 spin_unlock_irqrestore(&port->lock, flags);
92 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
94 void vr41xx_use_irda(irda_use_t use)
96 struct uart_port *port;
100 port = &siu_uart_ports[0];
102 spin_lock_irqsave(&port->lock, flags);
104 irsel = siu_read(port, SIUIRSEL);
105 if (use == FIR_USE_IRDA)
109 siu_write(port, SIUIRSEL, irsel);
111 spin_unlock_irqrestore(&port->lock, flags);
113 EXPORT_SYMBOL_GPL(vr41xx_use_irda);
115 void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
117 struct uart_port *port;
121 port = &siu_uart_ports[0];
123 spin_lock_irqsave(&port->lock, flags);
125 irsel = siu_read(port, SIUIRSEL);
126 irsel &= ~(IRMSEL | TMICTX | TMICMODE);
129 irsel |= IRMSEL_SHARP;
132 irsel |= IRMSEL_TEMIC | TMICMODE;
133 if (speed == IRDA_TX_4MBPS)
142 siu_write(port, SIUIRSEL, irsel);
144 spin_unlock_irqrestore(&port->lock, flags);
146 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
148 static inline void siu_clear_fifo(struct uart_port *port)
150 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
151 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
152 UART_FCR_CLEAR_XMIT);
153 siu_write(port, UART_FCR, 0);
156 static inline unsigned long siu_port_size(struct uart_port *port)
158 switch (port->type) {
159 case PORT_VR41XX_SIU:
161 case PORT_VR41XX_DSIU:
168 static inline unsigned int siu_check_type(struct uart_port *port)
171 return PORT_VR41XX_SIU;
172 if (port->line == 1 && port->irq != -1)
173 return PORT_VR41XX_DSIU;
178 static inline const char *siu_type_name(struct uart_port *port)
180 switch (port->type) {
181 case PORT_VR41XX_SIU:
183 case PORT_VR41XX_DSIU:
190 static unsigned int siu_tx_empty(struct uart_port *port)
194 lsr = siu_read(port, UART_LSR);
195 if (lsr & UART_LSR_TEMT)
201 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
205 if (mctrl & TIOCM_DTR)
207 if (mctrl & TIOCM_RTS)
209 if (mctrl & TIOCM_OUT1)
210 mcr |= UART_MCR_OUT1;
211 if (mctrl & TIOCM_OUT2)
212 mcr |= UART_MCR_OUT2;
213 if (mctrl & TIOCM_LOOP)
214 mcr |= UART_MCR_LOOP;
216 siu_write(port, UART_MCR, mcr);
219 static unsigned int siu_get_mctrl(struct uart_port *port)
222 unsigned int mctrl = 0;
224 msr = siu_read(port, UART_MSR);
225 if (msr & UART_MSR_DCD)
227 if (msr & UART_MSR_RI)
229 if (msr & UART_MSR_DSR)
231 if (msr & UART_MSR_CTS)
237 static void siu_stop_tx(struct uart_port *port)
242 spin_lock_irqsave(&port->lock, flags);
244 ier = siu_read(port, UART_IER);
245 ier &= ~UART_IER_THRI;
246 siu_write(port, UART_IER, ier);
248 spin_unlock_irqrestore(&port->lock, flags);
251 static void siu_start_tx(struct uart_port *port)
256 spin_lock_irqsave(&port->lock, flags);
258 ier = siu_read(port, UART_IER);
259 ier |= UART_IER_THRI;
260 siu_write(port, UART_IER, ier);
262 spin_unlock_irqrestore(&port->lock, flags);
265 static void siu_stop_rx(struct uart_port *port)
270 spin_lock_irqsave(&port->lock, flags);
272 ier = siu_read(port, UART_IER);
273 ier &= ~UART_IER_RLSI;
274 siu_write(port, UART_IER, ier);
276 port->read_status_mask &= ~UART_LSR_DR;
278 spin_unlock_irqrestore(&port->lock, flags);
281 static void siu_enable_ms(struct uart_port *port)
286 spin_lock_irqsave(&port->lock, flags);
288 ier = siu_read(port, UART_IER);
290 siu_write(port, UART_IER, ier);
292 spin_unlock_irqrestore(&port->lock, flags);
295 static void siu_break_ctl(struct uart_port *port, int ctl)
300 spin_lock_irqsave(&port->lock, flags);
302 lcr = siu_read(port, UART_LCR);
306 lcr &= ~UART_LCR_SBC;
307 siu_write(port, UART_LCR, lcr);
309 spin_unlock_irqrestore(&port->lock, flags);
312 static inline void receive_chars(struct uart_port *port, uint8_t *status)
314 struct tty_struct *tty;
317 int max_count = RX_MAX_COUNT;
319 tty = port->info->tty;
323 ch = siu_read(port, UART_RX);
327 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
328 lsr |= lsr_break_flag[port->line];
329 lsr_break_flag[port->line] = 0;
331 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
332 UART_LSR_PE | UART_LSR_OE))) {
333 if (lsr & UART_LSR_BI) {
334 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
337 if (uart_handle_break(port))
341 if (lsr & UART_LSR_FE)
342 port->icount.frame++;
343 if (lsr & UART_LSR_PE)
344 port->icount.parity++;
345 if (lsr & UART_LSR_OE)
346 port->icount.overrun++;
348 lsr &= port->read_status_mask;
349 if (lsr & UART_LSR_BI)
351 if (lsr & UART_LSR_FE)
353 if (lsr & UART_LSR_PE)
357 if (uart_handle_sysrq_char(port, ch))
360 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
363 lsr = siu_read(port, UART_LSR);
364 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
366 tty_flip_buffer_push(tty);
371 static inline void check_modem_status(struct uart_port *port)
375 msr = siu_read(port, UART_MSR);
376 if ((msr & UART_MSR_ANY_DELTA) == 0)
378 if (msr & UART_MSR_DDCD)
379 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
380 if (msr & UART_MSR_TERI)
382 if (msr & UART_MSR_DDSR)
384 if (msr & UART_MSR_DCTS)
385 uart_handle_cts_change(port, msr & UART_MSR_CTS);
387 wake_up_interruptible(&port->info->delta_msr_wait);
390 static inline void transmit_chars(struct uart_port *port)
392 struct circ_buf *xmit;
393 int max_count = TX_MAX_COUNT;
395 xmit = &port->info->xmit;
398 siu_write(port, UART_TX, port->x_char);
404 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
410 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
411 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
413 if (uart_circ_empty(xmit))
415 } while (max_count-- > 0);
417 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
418 uart_write_wakeup(port);
420 if (uart_circ_empty(xmit))
424 static irqreturn_t siu_interrupt(int irq, void *dev_id)
426 struct uart_port *port;
429 port = (struct uart_port *)dev_id;
431 iir = siu_read(port, UART_IIR);
432 if (iir & UART_IIR_NO_INT)
435 lsr = siu_read(port, UART_LSR);
436 if (lsr & UART_LSR_DR)
437 receive_chars(port, &lsr);
439 check_modem_status(port);
441 if (lsr & UART_LSR_THRE)
442 transmit_chars(port);
447 static int siu_startup(struct uart_port *port)
451 if (port->membase == NULL)
454 siu_clear_fifo(port);
456 (void)siu_read(port, UART_LSR);
457 (void)siu_read(port, UART_RX);
458 (void)siu_read(port, UART_IIR);
459 (void)siu_read(port, UART_MSR);
461 if (siu_read(port, UART_LSR) == 0xff)
464 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
468 if (port->type == PORT_VR41XX_DSIU)
469 vr41xx_enable_dsiuint(DSIUINT_ALL);
471 siu_write(port, UART_LCR, UART_LCR_WLEN8);
473 spin_lock_irq(&port->lock);
474 siu_set_mctrl(port, port->mctrl);
475 spin_unlock_irq(&port->lock);
477 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
479 (void)siu_read(port, UART_LSR);
480 (void)siu_read(port, UART_RX);
481 (void)siu_read(port, UART_IIR);
482 (void)siu_read(port, UART_MSR);
487 static void siu_shutdown(struct uart_port *port)
492 siu_write(port, UART_IER, 0);
494 spin_lock_irqsave(&port->lock, flags);
496 port->mctrl &= ~TIOCM_OUT2;
497 siu_set_mctrl(port, port->mctrl);
499 spin_unlock_irqrestore(&port->lock, flags);
501 lcr = siu_read(port, UART_LCR);
502 lcr &= ~UART_LCR_SBC;
503 siu_write(port, UART_LCR, lcr);
505 siu_clear_fifo(port);
507 (void)siu_read(port, UART_RX);
509 if (port->type == PORT_VR41XX_DSIU)
510 vr41xx_disable_dsiuint(DSIUINT_ALL);
512 free_irq(port->irq, port);
515 static void siu_set_termios(struct uart_port *port, struct ktermios *new,
516 struct ktermios *old)
518 tcflag_t c_cflag, c_iflag;
519 uint8_t lcr, fcr, ier;
520 unsigned int baud, quot;
523 c_cflag = new->c_cflag;
524 switch (c_cflag & CSIZE) {
526 lcr = UART_LCR_WLEN5;
529 lcr = UART_LCR_WLEN6;
532 lcr = UART_LCR_WLEN7;
535 lcr = UART_LCR_WLEN8;
539 if (c_cflag & CSTOPB)
540 lcr |= UART_LCR_STOP;
541 if (c_cflag & PARENB)
542 lcr |= UART_LCR_PARITY;
543 if ((c_cflag & PARODD) != PARODD)
544 lcr |= UART_LCR_EPAR;
545 if (c_cflag & CMSPAR)
546 lcr |= UART_LCR_SPAR;
548 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
549 quot = uart_get_divisor(port, baud);
551 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
553 spin_lock_irqsave(&port->lock, flags);
555 uart_update_timeout(port, c_cflag, baud);
557 c_iflag = new->c_iflag;
559 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
561 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
562 if (c_iflag & (BRKINT | PARMRK))
563 port->read_status_mask |= UART_LSR_BI;
565 port->ignore_status_mask = 0;
566 if (c_iflag & IGNPAR)
567 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
568 if (c_iflag & IGNBRK) {
569 port->ignore_status_mask |= UART_LSR_BI;
570 if (c_iflag & IGNPAR)
571 port->ignore_status_mask |= UART_LSR_OE;
574 if ((c_cflag & CREAD) == 0)
575 port->ignore_status_mask |= UART_LSR_DR;
577 ier = siu_read(port, UART_IER);
578 ier &= ~UART_IER_MSI;
579 if (UART_ENABLE_MS(port, c_cflag))
581 siu_write(port, UART_IER, ier);
583 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
585 siu_write(port, UART_DLL, (uint8_t)quot);
586 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
588 siu_write(port, UART_LCR, lcr);
590 siu_write(port, UART_FCR, fcr);
592 siu_set_mctrl(port, port->mctrl);
594 spin_unlock_irqrestore(&port->lock, flags);
597 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
601 switch (port->type) {
602 case PORT_VR41XX_SIU:
603 vr41xx_supply_clock(SIU_CLOCK);
605 case PORT_VR41XX_DSIU:
606 vr41xx_supply_clock(DSIU_CLOCK);
611 switch (port->type) {
612 case PORT_VR41XX_SIU:
613 vr41xx_mask_clock(SIU_CLOCK);
615 case PORT_VR41XX_DSIU:
616 vr41xx_mask_clock(DSIU_CLOCK);
623 static const char *siu_type(struct uart_port *port)
625 return siu_type_name(port);
628 static void siu_release_port(struct uart_port *port)
632 if (port->flags & UPF_IOREMAP) {
633 iounmap(port->membase);
634 port->membase = NULL;
637 size = siu_port_size(port);
638 release_mem_region(port->mapbase, size);
641 static int siu_request_port(struct uart_port *port)
644 struct resource *res;
646 size = siu_port_size(port);
647 res = request_mem_region(port->mapbase, size, siu_type_name(port));
651 if (port->flags & UPF_IOREMAP) {
652 port->membase = ioremap(port->mapbase, size);
653 if (port->membase == NULL) {
654 release_resource(res);
662 static void siu_config_port(struct uart_port *port, int flags)
664 if (flags & UART_CONFIG_TYPE) {
665 port->type = siu_check_type(port);
666 (void)siu_request_port(port);
670 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
672 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
674 if (port->irq != serial->irq)
676 if (port->iotype != serial->io_type)
678 if (port->mapbase != (unsigned long)serial->iomem_base)
684 static struct uart_ops siu_uart_ops = {
685 .tx_empty = siu_tx_empty,
686 .set_mctrl = siu_set_mctrl,
687 .get_mctrl = siu_get_mctrl,
688 .stop_tx = siu_stop_tx,
689 .start_tx = siu_start_tx,
690 .stop_rx = siu_stop_rx,
691 .enable_ms = siu_enable_ms,
692 .break_ctl = siu_break_ctl,
693 .startup = siu_startup,
694 .shutdown = siu_shutdown,
695 .set_termios = siu_set_termios,
698 .release_port = siu_release_port,
699 .request_port = siu_request_port,
700 .config_port = siu_config_port,
701 .verify_port = siu_verify_port,
704 static int siu_init_ports(struct platform_device *pdev)
706 struct uart_port *port;
707 struct resource *res;
708 int *type = pdev->dev.platform_data;
714 port = siu_uart_ports;
715 for (i = 0; i < SIU_PORTS_MAX; i++) {
716 port->type = type[i];
717 if (port->type == PORT_UNKNOWN)
719 port->irq = platform_get_irq(pdev, i);
720 port->uartclk = SIU_BAUD_BASE * 16;
723 port->iotype = UPIO_MEM;
724 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
726 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
727 port->mapbase = res->start;
734 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
736 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
738 static void wait_for_xmitr(struct uart_port *port)
744 lsr = siu_read(port, UART_LSR);
745 if (lsr & UART_LSR_BI)
746 lsr_break_flag[port->line] = UART_LSR_BI;
748 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
750 } while (timeout-- > 0);
752 if (port->flags & UPF_CONS_FLOW) {
756 msr = siu_read(port, UART_MSR);
757 if ((msr & UART_MSR_CTS) != 0)
759 } while (timeout-- > 0);
763 static void siu_console_putchar(struct uart_port *port, int ch)
765 wait_for_xmitr(port);
766 siu_write(port, UART_TX, ch);
769 static void siu_console_write(struct console *con, const char *s, unsigned count)
771 struct uart_port *port;
774 port = &siu_uart_ports[con->index];
776 ier = siu_read(port, UART_IER);
777 siu_write(port, UART_IER, 0);
779 uart_console_write(port, s, count, siu_console_putchar);
781 wait_for_xmitr(port);
782 siu_write(port, UART_IER, ier);
785 static int siu_console_setup(struct console *con, char *options)
787 struct uart_port *port;
793 if (con->index >= SIU_PORTS_MAX)
796 port = &siu_uart_ports[con->index];
797 if (port->membase == NULL) {
798 if (port->mapbase == 0)
800 port->membase = ioremap(port->mapbase, siu_port_size(port));
803 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
806 uart_parse_options(options, &baud, &parity, &bits, &flow);
808 return uart_set_options(port, con, baud, parity, bits, flow);
811 static struct uart_driver siu_uart_driver;
813 static struct console siu_console = {
815 .write = siu_console_write,
816 .device = uart_console_device,
817 .setup = siu_console_setup,
818 .flags = CON_PRINTBUFFER,
820 .data = &siu_uart_driver,
823 static int __devinit siu_console_init(void)
825 struct uart_port *port;
828 for (i = 0; i < SIU_PORTS_MAX; i++) {
829 port = &siu_uart_ports[i];
830 port->ops = &siu_uart_ops;
833 register_console(&siu_console);
838 console_initcall(siu_console_init);
840 #define SERIAL_VR41XX_CONSOLE &siu_console
842 #define SERIAL_VR41XX_CONSOLE NULL
845 static struct uart_driver siu_uart_driver = {
846 .owner = THIS_MODULE,
847 .driver_name = "SIU",
850 .minor = SIU_MINOR_BASE,
851 .cons = SERIAL_VR41XX_CONSOLE,
854 static int __devinit siu_probe(struct platform_device *dev)
856 struct uart_port *port;
859 num = siu_init_ports(dev);
863 siu_uart_driver.nr = num;
864 retval = uart_register_driver(&siu_uart_driver);
868 for (i = 0; i < num; i++) {
869 port = &siu_uart_ports[i];
870 port->ops = &siu_uart_ops;
871 port->dev = &dev->dev;
873 retval = uart_add_one_port(&siu_uart_driver, port);
880 if (i == 0 && retval < 0) {
881 uart_unregister_driver(&siu_uart_driver);
888 static int __devexit siu_remove(struct platform_device *dev)
890 struct uart_port *port;
893 for (i = 0; i < siu_uart_driver.nr; i++) {
894 port = &siu_uart_ports[i];
895 if (port->dev == &dev->dev) {
896 uart_remove_one_port(&siu_uart_driver, port);
901 uart_unregister_driver(&siu_uart_driver);
906 static int siu_suspend(struct platform_device *dev, pm_message_t state)
908 struct uart_port *port;
911 for (i = 0; i < siu_uart_driver.nr; i++) {
912 port = &siu_uart_ports[i];
913 if ((port->type == PORT_VR41XX_SIU ||
914 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
915 uart_suspend_port(&siu_uart_driver, port);
922 static int siu_resume(struct platform_device *dev)
924 struct uart_port *port;
927 for (i = 0; i < siu_uart_driver.nr; i++) {
928 port = &siu_uart_ports[i];
929 if ((port->type == PORT_VR41XX_SIU ||
930 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
931 uart_resume_port(&siu_uart_driver, port);
937 static struct platform_driver siu_device_driver = {
939 .remove = __devexit_p(siu_remove),
940 .suspend = siu_suspend,
941 .resume = siu_resume,
944 .owner = THIS_MODULE,
948 static int __init vr41xx_siu_init(void)
950 return platform_driver_register(&siu_device_driver);
953 static void __exit vr41xx_siu_exit(void)
955 platform_driver_unregister(&siu_device_driver);
958 module_init(vr41xx_siu_init);
959 module_exit(vr41xx_siu_exit);