1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
4 Maintained by Valerie Henson <val_henson@linux.intel.com>
5 Copyright 2000,2001 The Linux Kernel Team
6 Written/copyright 1994-2001 by Donald Becker.
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
11 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
12 for more information on this driver, or visit the project
13 Web page at http://sourceforge.net/projects/tulip/
18 #define DRV_NAME "tulip"
19 #ifdef CONFIG_TULIP_NAPI
20 #define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */
22 #define DRV_VERSION "1.1.15"
24 #define DRV_RELDATE "Feb 27, 2007"
27 #include <linux/module.h>
28 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/etherdevice.h>
32 #include <linux/delay.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/crc32.h>
36 #include <asm/unaligned.h>
37 #include <asm/uaccess.h>
43 static char version[] __devinitdata =
44 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
47 /* A few user-configurable values. */
49 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
50 static unsigned int max_interrupt_work = 25;
53 /* Used to pass the full-duplex flag, etc. */
54 static int full_duplex[MAX_UNITS];
55 static int options[MAX_UNITS];
56 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
58 /* The possible media types that can be set in options[] are: */
59 const char * const medianame[32] = {
60 "10baseT", "10base2", "AUI", "100baseTx",
61 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
62 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
63 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
64 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
65 "","","","", "","","","", "","","","Transceiver reset",
68 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
69 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
70 || defined(CONFIG_SPARC) || defined(__ia64__) \
71 || defined(__sh__) || defined(__mips__)
72 static int rx_copybreak = 1518;
74 static int rx_copybreak = 100;
78 Set the bus performance register.
79 Typical: Set 16 longword cache alignment, no burst limit.
80 Cache alignment bits 15:14 Burst length 13:8
81 0000 No alignment 0x00000000 unlimited 0800 8 longwords
82 4000 8 longwords 0100 1 longword 1000 16 longwords
83 8000 16 longwords 0200 2 longwords 2000 32 longwords
84 C000 32 longwords 0400 4 longwords
85 Warning: many older 486 systems are broken and require setting 0x00A04800
86 8 longword cache alignment, 8 longword burst.
87 ToDo: Non-Intel setting could be better.
90 #if defined(__alpha__) || defined(__ia64__)
91 static int csr0 = 0x01A00000 | 0xE000;
92 #elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
93 static int csr0 = 0x01A00000 | 0x8000;
94 #elif defined(CONFIG_SPARC) || defined(__hppa__)
95 /* The UltraSparc PCI controllers will disconnect at every 64-byte
96 * crossing anyways so it makes no sense to tell Tulip to burst
99 static int csr0 = 0x01A00000 | 0x9000;
100 #elif defined(__arm__) || defined(__sh__)
101 static int csr0 = 0x01A00000 | 0x4800;
102 #elif defined(__mips__)
103 static int csr0 = 0x00200000 | 0x4000;
105 #warning Processor architecture undefined!
106 static int csr0 = 0x00A00000 | 0x4800;
109 /* Operational parameters that usually are not changed. */
110 /* Time in jiffies before concluding the transmitter is hung. */
111 #define TX_TIMEOUT (4*HZ)
114 MODULE_AUTHOR("The Linux Kernel Team");
115 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
116 MODULE_LICENSE("GPL");
117 MODULE_VERSION(DRV_VERSION);
118 module_param(tulip_debug, int, 0);
119 module_param(max_interrupt_work, int, 0);
120 module_param(rx_copybreak, int, 0);
121 module_param(csr0, int, 0);
122 module_param_array(options, int, NULL, 0);
123 module_param_array(full_duplex, int, NULL, 0);
125 #define PFX DRV_NAME ": "
128 int tulip_debug = TULIP_DEBUG;
133 static void tulip_timer(unsigned long data)
135 struct net_device *dev = (struct net_device *)data;
136 struct tulip_private *tp = netdev_priv(dev);
138 if (netif_running(dev))
139 schedule_work(&tp->media_work);
143 * This table use during operation for capabilities and media timer.
145 * It is indexed via the values in 'enum chips'
148 struct tulip_chip_table tulip_tbl[] = {
149 { }, /* placeholder for array, slot unused currently */
150 { }, /* placeholder for array, slot unused currently */
153 { "Digital DS21140 Tulip", 128, 0x0001ebef,
154 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer,
157 /* DC21142, DC21143 */
158 { "Digital DS21142/43 Tulip", 128, 0x0801fbff,
159 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
160 | HAS_INTR_MITIGATION | HAS_PCI_MWI, tulip_timer, t21142_media_task },
163 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
164 HAS_MII | HAS_PNICNWAY, pnic_timer, },
167 { "Macronix 98713 PMAC", 128, 0x0001ebef,
168 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
171 { "Macronix 98715 PMAC", 256, 0x0001ebef,
172 HAS_MEDIA_TABLE, mxic_timer, },
175 { "Macronix 98725 PMAC", 256, 0x0001ebef,
176 HAS_MEDIA_TABLE, mxic_timer, },
179 { "ASIX AX88140", 128, 0x0001fbff,
180 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
181 | IS_ASIX, tulip_timer, tulip_media_task },
184 { "Lite-On PNIC-II", 256, 0x0801fbff,
185 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer, },
188 { "ADMtek Comet", 256, 0x0001abef,
189 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer, },
192 { "Compex 9881 PMAC", 128, 0x0001ebef,
193 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
196 { "Intel DS21145 Tulip", 128, 0x0801fbff,
197 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
198 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
201 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
202 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
203 tulip_timer, tulip_media_task },
206 { "Conexant LANfinity", 256, 0x0001ebef,
207 HAS_MII | HAS_ACPI, tulip_timer, tulip_media_task },
212 static struct pci_device_id tulip_pci_tbl[] = {
213 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
214 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
215 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
216 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
217 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
218 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
219 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
220 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
221 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
230 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
232 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
233 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
234 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
235 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
236 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
237 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
238 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
239 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
240 { 0x1186, 0x1591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
241 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
242 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
243 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
244 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
245 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
246 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
247 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
248 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
249 { } /* terminate list */
251 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
254 /* A full-duplex map for media types. */
255 const char tulip_media_cap[32] =
256 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
258 static void tulip_tx_timeout(struct net_device *dev);
259 static void tulip_init_ring(struct net_device *dev);
260 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
261 static int tulip_open(struct net_device *dev);
262 static int tulip_close(struct net_device *dev);
263 static void tulip_up(struct net_device *dev);
264 static void tulip_down(struct net_device *dev);
265 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
266 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
267 static void set_rx_mode(struct net_device *dev);
268 #ifdef CONFIG_NET_POLL_CONTROLLER
269 static void poll_tulip(struct net_device *dev);
272 static void tulip_set_power_state (struct tulip_private *tp,
273 int sleep, int snooze)
275 if (tp->flags & HAS_ACPI) {
277 pci_read_config_dword (tp->pdev, CFDD, &tmp);
278 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
280 newtmp |= CFDD_Sleep;
282 newtmp |= CFDD_Snooze;
284 pci_write_config_dword (tp->pdev, CFDD, newtmp);
290 static void tulip_up(struct net_device *dev)
292 struct tulip_private *tp = netdev_priv(dev);
293 void __iomem *ioaddr = tp->base_addr;
294 int next_tick = 3*HZ;
297 /* Wake the chip from sleep/snooze mode. */
298 tulip_set_power_state (tp, 0, 0);
300 /* On some chip revs we must set the MII/SYM port before the reset!? */
301 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
302 iowrite32(0x00040000, ioaddr + CSR6);
304 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
305 iowrite32(0x00000001, ioaddr + CSR0);
306 pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */
310 Wait the specified 50 PCI cycles after a reset by initializing
311 Tx and Rx queues and the address filter list. */
312 iowrite32(tp->csr0, ioaddr + CSR0);
313 pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */
317 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
319 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
320 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
321 tp->cur_rx = tp->cur_tx = 0;
322 tp->dirty_rx = tp->dirty_tx = 0;
324 if (tp->flags & MC_HASH_ONLY) {
325 u32 addr_low = le32_to_cpu(get_unaligned((u32 *)dev->dev_addr));
326 u32 addr_high = le16_to_cpu(get_unaligned((u16 *)(dev->dev_addr+4)));
327 if (tp->chip_id == AX88140) {
328 iowrite32(0, ioaddr + CSR13);
329 iowrite32(addr_low, ioaddr + CSR14);
330 iowrite32(1, ioaddr + CSR13);
331 iowrite32(addr_high, ioaddr + CSR14);
332 } else if (tp->flags & COMET_MAC_ADDR) {
333 iowrite32(addr_low, ioaddr + 0xA4);
334 iowrite32(addr_high, ioaddr + 0xA8);
335 iowrite32(0, ioaddr + 0xAC);
336 iowrite32(0, ioaddr + 0xB0);
339 /* This is set_rx_mode(), but without starting the transmitter. */
340 u16 *eaddrs = (u16 *)dev->dev_addr;
341 u16 *setup_frm = &tp->setup_frame[15*6];
344 /* 21140 bug: you must add the broadcast address. */
345 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
346 /* Fill the final entry of the table with our physical address. */
347 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
348 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
349 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
351 mapping = pci_map_single(tp->pdev, tp->setup_frame,
352 sizeof(tp->setup_frame),
354 tp->tx_buffers[tp->cur_tx].skb = NULL;
355 tp->tx_buffers[tp->cur_tx].mapping = mapping;
357 /* Put the setup frame on the Tx list. */
358 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
359 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
360 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
365 tp->saved_if_port = dev->if_port;
366 if (dev->if_port == 0)
367 dev->if_port = tp->default_port;
369 /* Allow selecting a default media. */
371 if (tp->mtable == NULL)
374 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
375 (dev->if_port == 12 ? 0 : dev->if_port);
376 for (i = 0; i < tp->mtable->leafcount; i++)
377 if (tp->mtable->mleaf[i].media == looking_for) {
378 printk(KERN_INFO "%s: Using user-specified media %s.\n",
379 dev->name, medianame[dev->if_port]);
383 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
384 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
385 for (i = 0; i < tp->mtable->leafcount; i++)
386 if (tp->mtable->mleaf[i].media == looking_for) {
387 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
388 dev->name, medianame[looking_for]);
392 /* Start sensing first non-full-duplex media. */
393 for (i = tp->mtable->leafcount - 1;
394 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
403 if (tp->chip_id == DC21143 &&
404 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
405 /* We must reset the media CSRs when we force-select MII mode. */
406 iowrite32(0x0000, ioaddr + CSR13);
407 iowrite32(0x0000, ioaddr + CSR14);
408 iowrite32(0x0008, ioaddr + CSR15);
410 tulip_select_media(dev, 1);
411 } else if (tp->chip_id == DC21142) {
413 tulip_select_media(dev, 1);
415 printk(KERN_INFO "%s: Using MII transceiver %d, status "
417 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
418 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
419 tp->csr6 = csr6_mask_hdcap;
421 iowrite32(0x0000, ioaddr + CSR13);
422 iowrite32(0x0000, ioaddr + CSR14);
424 t21142_start_nway(dev);
425 } else if (tp->chip_id == PNIC2) {
426 /* for initial startup advertise 10/100 Full and Half */
427 tp->sym_advertise = 0x01E0;
428 /* enable autonegotiate end interrupt */
429 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
430 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
431 pnic2_start_nway(dev);
432 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
435 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
436 iowrite32(0x0001, ioaddr + CSR15);
437 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
440 /* Start with 10mbps to do autonegotiation. */
441 iowrite32(0x32, ioaddr + CSR12);
442 tp->csr6 = 0x00420000;
443 iowrite32(0x0001B078, ioaddr + 0xB8);
444 iowrite32(0x0201B078, ioaddr + 0xB8);
447 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
448 && ! tp->medialock) {
450 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
451 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
452 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
453 /* Provided by BOLO, Macronix - 12/10/1998. */
455 tp->csr6 = 0x01a80200;
456 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
457 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
458 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
459 /* Enable automatic Tx underrun recovery. */
460 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
461 dev->if_port = tp->mii_cnt ? 11 : 0;
462 tp->csr6 = 0x00040000;
463 } else if (tp->chip_id == AX88140) {
464 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
466 tulip_select_media(dev, 1);
468 /* Start the chip's Tx to process setup frame. */
472 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
474 /* Enable interrupts by setting the interrupt mask. */
475 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
476 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
477 tulip_start_rxtx(tp);
478 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
480 if (tulip_debug > 2) {
481 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
482 dev->name, ioread32(ioaddr + CSR0), ioread32(ioaddr + CSR5),
483 ioread32(ioaddr + CSR6));
486 /* Set the timer to switch to check for link beat and perhaps switch
487 to an alternate media type. */
488 tp->timer.expires = RUN_AT(next_tick);
489 add_timer(&tp->timer);
490 #ifdef CONFIG_TULIP_NAPI
491 init_timer(&tp->oom_timer);
492 tp->oom_timer.data = (unsigned long)dev;
493 tp->oom_timer.function = oom_timer;
498 tulip_open(struct net_device *dev)
502 if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev)))
505 tulip_init_ring (dev);
509 netif_start_queue (dev);
515 static void tulip_tx_timeout(struct net_device *dev)
517 struct tulip_private *tp = netdev_priv(dev);
518 void __iomem *ioaddr = tp->base_addr;
521 spin_lock_irqsave (&tp->lock, flags);
523 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
524 /* Do nothing -- the media monitor should handle this. */
526 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
528 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
529 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
530 || tp->chip_id == DM910X) {
531 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
532 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
533 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
534 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15));
535 tp->timeout_recovery = 1;
536 schedule_work(&tp->media_work);
538 } else if (tp->chip_id == PNIC2) {
539 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
540 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
541 dev->name, (int)ioread32(ioaddr + CSR5), (int)ioread32(ioaddr + CSR6),
542 (int)ioread32(ioaddr + CSR7), (int)ioread32(ioaddr + CSR12));
544 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
545 "%8.8x, resetting...\n",
546 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
550 #if defined(way_too_many_messages)
551 if (tulip_debug > 3) {
553 for (i = 0; i < RX_RING_SIZE; i++) {
554 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
556 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
557 "%2.2x %2.2x %2.2x.\n",
558 i, (unsigned int)tp->rx_ring[i].status,
559 (unsigned int)tp->rx_ring[i].length,
560 (unsigned int)tp->rx_ring[i].buffer1,
561 (unsigned int)tp->rx_ring[i].buffer2,
562 buf[0], buf[1], buf[2]);
563 for (j = 0; buf[j] != 0xee && j < 1600; j++)
564 if (j < 100) printk(" %2.2x", buf[j]);
565 printk(" j=%d.\n", j);
567 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
568 for (i = 0; i < RX_RING_SIZE; i++)
569 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
570 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
571 for (i = 0; i < TX_RING_SIZE; i++)
572 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
577 tulip_tx_timeout_complete(tp, ioaddr);
580 spin_unlock_irqrestore (&tp->lock, flags);
581 dev->trans_start = jiffies;
582 netif_wake_queue (dev);
586 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
587 static void tulip_init_ring(struct net_device *dev)
589 struct tulip_private *tp = netdev_priv(dev);
596 for (i = 0; i < RX_RING_SIZE; i++) {
597 tp->rx_ring[i].status = 0x00000000;
598 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
599 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
600 tp->rx_buffers[i].skb = NULL;
601 tp->rx_buffers[i].mapping = 0;
603 /* Mark the last entry as wrapping the ring. */
604 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
605 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
607 for (i = 0; i < RX_RING_SIZE; i++) {
610 /* Note the receive buffer must be longword aligned.
611 dev_alloc_skb() provides 16 byte alignment. But do *not*
612 use skb_reserve() to align the IP header! */
613 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
614 tp->rx_buffers[i].skb = skb;
617 mapping = pci_map_single(tp->pdev, skb->data,
618 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
619 tp->rx_buffers[i].mapping = mapping;
620 skb->dev = dev; /* Mark as being used by this device. */
621 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
622 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
624 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
626 /* The Tx buffer descriptor is filled in as needed, but we
627 do need to clear the ownership bit. */
628 for (i = 0; i < TX_RING_SIZE; i++) {
629 tp->tx_buffers[i].skb = NULL;
630 tp->tx_buffers[i].mapping = 0;
631 tp->tx_ring[i].status = 0x00000000;
632 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
634 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
638 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
640 struct tulip_private *tp = netdev_priv(dev);
645 spin_lock_irq(&tp->lock);
647 /* Calculate the next Tx descriptor entry. */
648 entry = tp->cur_tx % TX_RING_SIZE;
650 tp->tx_buffers[entry].skb = skb;
651 mapping = pci_map_single(tp->pdev, skb->data,
652 skb->len, PCI_DMA_TODEVICE);
653 tp->tx_buffers[entry].mapping = mapping;
654 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
656 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
657 flag = 0x60000000; /* No interrupt */
658 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
659 flag = 0xe0000000; /* Tx-done intr. */
660 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
661 flag = 0x60000000; /* No Tx-done intr. */
662 } else { /* Leave room for set_rx_mode() to fill entries. */
663 flag = 0xe0000000; /* Tx-done intr. */
664 netif_stop_queue(dev);
666 if (entry == TX_RING_SIZE-1)
667 flag = 0xe0000000 | DESC_RING_WRAP;
669 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
670 /* if we were using Transmit Automatic Polling, we would need a
672 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
677 /* Trigger an immediate transmit demand. */
678 iowrite32(0, tp->base_addr + CSR1);
680 spin_unlock_irq(&tp->lock);
682 dev->trans_start = jiffies;
687 static void tulip_clean_tx_ring(struct tulip_private *tp)
689 unsigned int dirty_tx;
691 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
693 int entry = dirty_tx % TX_RING_SIZE;
694 int status = le32_to_cpu(tp->tx_ring[entry].status);
697 tp->stats.tx_errors++; /* It wasn't Txed */
698 tp->tx_ring[entry].status = 0;
701 /* Check for Tx filter setup frames. */
702 if (tp->tx_buffers[entry].skb == NULL) {
703 /* test because dummy frames not mapped */
704 if (tp->tx_buffers[entry].mapping)
705 pci_unmap_single(tp->pdev,
706 tp->tx_buffers[entry].mapping,
707 sizeof(tp->setup_frame),
712 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
713 tp->tx_buffers[entry].skb->len,
716 /* Free the original skb. */
717 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
718 tp->tx_buffers[entry].skb = NULL;
719 tp->tx_buffers[entry].mapping = 0;
723 static void tulip_down (struct net_device *dev)
725 struct tulip_private *tp = netdev_priv(dev);
726 void __iomem *ioaddr = tp->base_addr;
729 flush_scheduled_work();
731 del_timer_sync (&tp->timer);
732 #ifdef CONFIG_TULIP_NAPI
733 del_timer_sync (&tp->oom_timer);
735 spin_lock_irqsave (&tp->lock, flags);
737 /* Disable interrupts by clearing the interrupt mask. */
738 iowrite32 (0x00000000, ioaddr + CSR7);
740 /* Stop the Tx and Rx processes. */
743 /* prepare receive buffers */
744 tulip_refill_rx(dev);
746 /* release any unconsumed transmit buffers */
747 tulip_clean_tx_ring(tp);
749 if (ioread32 (ioaddr + CSR6) != 0xffffffff)
750 tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff;
752 spin_unlock_irqrestore (&tp->lock, flags);
754 init_timer(&tp->timer);
755 tp->timer.data = (unsigned long)dev;
756 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
758 dev->if_port = tp->saved_if_port;
760 /* Leave the driver in snooze, not sleep, mode. */
761 tulip_set_power_state (tp, 0, 1);
765 static int tulip_close (struct net_device *dev)
767 struct tulip_private *tp = netdev_priv(dev);
768 void __iomem *ioaddr = tp->base_addr;
771 netif_stop_queue (dev);
776 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
777 dev->name, ioread32 (ioaddr + CSR5));
779 free_irq (dev->irq, dev);
781 /* Free all the skbuffs in the Rx queue. */
782 for (i = 0; i < RX_RING_SIZE; i++) {
783 struct sk_buff *skb = tp->rx_buffers[i].skb;
784 dma_addr_t mapping = tp->rx_buffers[i].mapping;
786 tp->rx_buffers[i].skb = NULL;
787 tp->rx_buffers[i].mapping = 0;
789 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
790 tp->rx_ring[i].length = 0;
791 tp->rx_ring[i].buffer1 = 0xBADF00D0; /* An invalid address. */
793 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
798 for (i = 0; i < TX_RING_SIZE; i++) {
799 struct sk_buff *skb = tp->tx_buffers[i].skb;
802 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
803 skb->len, PCI_DMA_TODEVICE);
806 tp->tx_buffers[i].skb = NULL;
807 tp->tx_buffers[i].mapping = 0;
813 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
815 struct tulip_private *tp = netdev_priv(dev);
816 void __iomem *ioaddr = tp->base_addr;
818 if (netif_running(dev)) {
821 spin_lock_irqsave (&tp->lock, flags);
823 tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
825 spin_unlock_irqrestore(&tp->lock, flags);
832 static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
834 struct tulip_private *np = netdev_priv(dev);
835 strcpy(info->driver, DRV_NAME);
836 strcpy(info->version, DRV_VERSION);
837 strcpy(info->bus_info, pci_name(np->pdev));
840 static const struct ethtool_ops ops = {
841 .get_drvinfo = tulip_get_drvinfo
844 /* Provide ioctl() calls to examine the MII xcvr state. */
845 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
847 struct tulip_private *tp = netdev_priv(dev);
848 void __iomem *ioaddr = tp->base_addr;
849 struct mii_ioctl_data *data = if_mii(rq);
850 const unsigned int phy_idx = 0;
851 int phy = tp->phys[phy_idx] & 0x1f;
852 unsigned int regnum = data->reg_num;
855 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
858 else if (tp->flags & HAS_NWAY)
860 else if (tp->chip_id == COMET)
865 case SIOCGMIIREG: /* Read MII PHY register. */
866 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
867 int csr12 = ioread32 (ioaddr + CSR12);
868 int csr14 = ioread32 (ioaddr + CSR14);
871 if (((csr14<<5) & 0x1000) ||
872 (dev->if_port == 5 && tp->nwayset))
873 data->val_out = 0x1000;
875 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
876 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
881 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
882 ((csr12&0x06) == 6 ? 0 : 4);
883 data->val_out |= 0x6048;
886 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
888 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
889 ((csr14 >> 1) & 0x20) + 1;
890 data->val_out |= ((csr14 >> 9) & 0x03C0);
892 case 5: data->val_out = tp->lpar; break;
893 default: data->val_out = 0; break;
896 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
900 case SIOCSMIIREG: /* Write MII PHY register. */
901 if (!capable (CAP_NET_ADMIN))
905 if (data->phy_id == phy) {
906 u16 value = data->val_in;
908 case 0: /* Check for autonegotiation on or reset. */
909 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
910 if (tp->full_duplex_lock)
911 tp->full_duplex = (value & 0x0100) ? 1 : 0;
914 tp->advertising[phy_idx] =
915 tp->mii_advertise = data->val_in;
919 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
920 u16 value = data->val_in;
922 if ((value & 0x1200) == 0x1200) {
923 if (tp->chip_id == PNIC2) {
924 pnic2_start_nway (dev);
926 t21142_start_nway (dev);
929 } else if (regnum == 4)
930 tp->sym_advertise = value;
932 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
943 /* Set or clear the multicast filter for this adaptor.
944 Note that we only use exclusion around actually queueing the
945 new frame, not around filling tp->setup_frame. This is non-deterministic
946 when re-entered but still correct. */
949 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
951 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
953 struct tulip_private *tp = netdev_priv(dev);
955 struct dev_mc_list *mclist;
959 memset(hash_table, 0, sizeof(hash_table));
960 set_bit_le(255, hash_table); /* Broadcast entry */
961 /* This should work on big-endian machines as well. */
962 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
963 i++, mclist = mclist->next) {
964 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
966 set_bit_le(index, hash_table);
969 for (i = 0; i < 32; i++) {
970 *setup_frm++ = hash_table[i];
971 *setup_frm++ = hash_table[i];
973 setup_frm = &tp->setup_frame[13*6];
975 /* Fill the final entry with our physical address. */
976 eaddrs = (u16 *)dev->dev_addr;
977 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
978 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
979 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
982 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
984 struct tulip_private *tp = netdev_priv(dev);
985 struct dev_mc_list *mclist;
989 /* We have <= 14 addresses so we can use the wonderful
990 16 address perfect filtering of the Tulip. */
991 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
992 i++, mclist = mclist->next) {
993 eaddrs = (u16 *)mclist->dmi_addr;
994 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
995 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
996 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
998 /* Fill the unused entries with the broadcast address. */
999 memset(setup_frm, 0xff, (15-i)*12);
1000 setup_frm = &tp->setup_frame[15*6];
1002 /* Fill the final entry with our physical address. */
1003 eaddrs = (u16 *)dev->dev_addr;
1004 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1005 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1006 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1010 static void set_rx_mode(struct net_device *dev)
1012 struct tulip_private *tp = netdev_priv(dev);
1013 void __iomem *ioaddr = tp->base_addr;
1016 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1018 tp->csr6 &= ~0x00D5;
1019 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1020 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1021 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1022 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1023 /* Too many to filter well -- accept all multicasts. */
1024 tp->csr6 |= AcceptAllMulticast;
1025 csr6 |= AcceptAllMulticast;
1026 } else if (tp->flags & MC_HASH_ONLY) {
1027 /* Some work-alikes have only a 64-entry hash filter table. */
1028 /* Should verify correctness on big-endian/__powerpc__ */
1029 struct dev_mc_list *mclist;
1031 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1032 tp->csr6 |= AcceptAllMulticast;
1033 csr6 |= AcceptAllMulticast;
1035 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1037 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1038 i++, mclist = mclist->next) {
1039 if (tp->flags & COMET_MAC_ADDR)
1040 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1042 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1044 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
1045 if (tulip_debug > 2) {
1046 printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
1047 "%2.2x:%2.2x:%2.2x %8.8x bit %d.\n", dev->name,
1048 mclist->dmi_addr[0], mclist->dmi_addr[1],
1049 mclist->dmi_addr[2], mclist->dmi_addr[3],
1050 mclist->dmi_addr[4], mclist->dmi_addr[5],
1051 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1054 if (mc_filter[0] == tp->mc_filter[0] &&
1055 mc_filter[1] == tp->mc_filter[1])
1057 else if (tp->flags & IS_ASIX) {
1058 iowrite32(2, ioaddr + CSR13);
1059 iowrite32(mc_filter[0], ioaddr + CSR14);
1060 iowrite32(3, ioaddr + CSR13);
1061 iowrite32(mc_filter[1], ioaddr + CSR14);
1062 } else if (tp->flags & COMET_MAC_ADDR) {
1063 iowrite32(mc_filter[0], ioaddr + 0xAC);
1064 iowrite32(mc_filter[1], ioaddr + 0xB0);
1066 tp->mc_filter[0] = mc_filter[0];
1067 tp->mc_filter[1] = mc_filter[1];
1070 unsigned long flags;
1071 u32 tx_flags = 0x08000000 | 192;
1073 /* Note that only the low-address shortword of setup_frame is valid!
1074 The values are doubled for big-endian architectures. */
1075 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1076 build_setup_frame_hash(tp->setup_frame, dev);
1077 tx_flags = 0x08400000 | 192;
1079 build_setup_frame_perfect(tp->setup_frame, dev);
1082 spin_lock_irqsave(&tp->lock, flags);
1084 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1085 /* Same setup recently queued, we need not add it. */
1090 /* Now add this frame to the Tx list. */
1092 entry = tp->cur_tx++ % TX_RING_SIZE;
1095 /* Avoid a chip errata by prefixing a dummy entry. */
1096 tp->tx_buffers[entry].skb = NULL;
1097 tp->tx_buffers[entry].mapping = 0;
1098 tp->tx_ring[entry].length =
1099 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1100 tp->tx_ring[entry].buffer1 = 0;
1101 /* Must set DescOwned later to avoid race with chip */
1103 entry = tp->cur_tx++ % TX_RING_SIZE;
1107 tp->tx_buffers[entry].skb = NULL;
1108 tp->tx_buffers[entry].mapping =
1109 pci_map_single(tp->pdev, tp->setup_frame,
1110 sizeof(tp->setup_frame),
1112 /* Put the setup frame on the Tx list. */
1113 if (entry == TX_RING_SIZE-1)
1114 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1115 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1116 tp->tx_ring[entry].buffer1 =
1117 cpu_to_le32(tp->tx_buffers[entry].mapping);
1118 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1120 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1121 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1122 netif_stop_queue(dev);
1124 /* Trigger an immediate transmit demand. */
1125 iowrite32(0, ioaddr + CSR1);
1128 spin_unlock_irqrestore(&tp->lock, flags);
1131 iowrite32(csr6, ioaddr + CSR6);
1134 #ifdef CONFIG_TULIP_MWI
1135 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1136 struct net_device *dev)
1138 struct tulip_private *tp = netdev_priv(dev);
1143 if (tulip_debug > 3)
1144 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1146 tp->csr0 = csr0 = 0;
1148 /* if we have any cache line size at all, we can do MRM */
1151 /* ...and barring hardware bugs, MWI */
1152 if (!(tp->chip_id == DC21143 && tp->revision == 65))
1155 /* set or disable MWI in the standard PCI command bit.
1156 * Check for the case where mwi is desired but not available
1158 if (csr0 & MWI) pci_try_set_mwi(pdev);
1159 else pci_clear_mwi(pdev);
1161 /* read result from hardware (in case bit refused to enable) */
1162 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1163 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1166 /* if cache line size hardwired to zero, no MWI */
1167 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1168 if ((csr0 & MWI) && (cache == 0)) {
1170 pci_clear_mwi(pdev);
1173 /* assign per-cacheline-size cache alignment and
1174 * burst length values
1178 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1181 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1184 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1191 /* if we have a good cache line size, we by now have a good
1192 * csr0, so save it and exit
1197 /* we don't have a good csr0 or cache line size, disable MWI */
1199 pci_clear_mwi(pdev);
1203 /* sane defaults for burst length and cache alignment
1204 * originally from de4x5 driver
1206 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1210 if (tulip_debug > 2)
1211 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1212 pci_name(pdev), cache, csr0);
1217 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1218 * is the DM910X and the on chip ULi devices
1221 static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1223 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1228 static int __devinit tulip_init_one (struct pci_dev *pdev,
1229 const struct pci_device_id *ent)
1231 struct tulip_private *tp;
1232 /* See note below on the multiport cards. */
1233 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1234 static struct pci_device_id early_486_chipsets[] = {
1235 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1236 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1239 static int last_irq;
1240 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1243 unsigned char *ee_data;
1244 struct net_device *dev;
1245 void __iomem *ioaddr;
1246 static int board_idx = -1;
1247 int chip_idx = ent->driver_data;
1248 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1249 unsigned int eeprom_missing = 0;
1250 unsigned int force_csr0 = 0;
1253 static int did_version; /* Already printed version info. */
1254 if (tulip_debug > 0 && did_version++ == 0)
1255 printk (KERN_INFO "%s", version);
1261 * Lan media wire a tulip chip to a wan interface. Needs a very
1262 * different driver (lmc driver)
1265 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1266 printk (KERN_ERR PFX "skipping LMC card.\n");
1271 * Early DM9100's need software CRC and the DMFE driver
1274 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1276 /* Read Chip revision */
1277 if (pdev->revision < 0x30)
1279 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1285 * Looks for early PCI chipsets where people report hangs
1286 * without the workarounds being on.
1289 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1290 aligned. Aries might need this too. The Saturn errata are not
1291 pretty reading but thankfully it's an old 486 chipset.
1293 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1297 if (pci_dev_present(early_486_chipsets)) {
1298 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1302 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1303 if (chip_idx == AX88140) {
1304 if ((csr0 & 0x3f00) == 0)
1308 /* PNIC doesn't have MWI/MRL/MRM... */
1309 if (chip_idx == LC82C168)
1310 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1312 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1313 if (tulip_uli_dm_quirk(pdev)) {
1314 csr0 &= ~0x01f100ff;
1315 #if defined(CONFIG_SPARC)
1316 csr0 = (csr0 & ~0xff00) | 0xe000;
1320 * And back to business
1323 i = pci_enable_device(pdev);
1325 printk (KERN_ERR PFX
1326 "Cannot enable tulip board #%d, aborting\n",
1333 /* alloc_etherdev ensures aligned and zeroed private structures */
1334 dev = alloc_etherdev (sizeof (*tp));
1336 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1340 SET_MODULE_OWNER(dev);
1341 SET_NETDEV_DEV(dev, &pdev->dev);
1342 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1343 printk (KERN_ERR PFX "%s: I/O region (0x%llx@0x%llx) too small, "
1344 "aborting\n", pci_name(pdev),
1345 (unsigned long long)pci_resource_len (pdev, 0),
1346 (unsigned long long)pci_resource_start (pdev, 0));
1347 goto err_out_free_netdev;
1350 /* grab all resources from both PIO and MMIO regions, as we
1351 * don't want anyone else messing around with our hardware */
1352 if (pci_request_regions (pdev, "tulip"))
1353 goto err_out_free_netdev;
1355 ioaddr = pci_iomap(pdev, TULIP_BAR, tulip_tbl[chip_idx].io_size);
1358 goto err_out_free_res;
1361 * initialize private data structure 'tp'
1362 * it is zeroed and aligned in alloc_etherdev
1364 tp = netdev_priv(dev);
1367 tp->rx_ring = pci_alloc_consistent(pdev,
1368 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1369 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1372 goto err_out_mtable;
1373 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1374 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1376 tp->chip_id = chip_idx;
1377 tp->flags = tulip_tbl[chip_idx].flags;
1379 tp->base_addr = ioaddr;
1380 tp->revision = pdev->revision;
1382 spin_lock_init(&tp->lock);
1383 spin_lock_init(&tp->mii_lock);
1384 init_timer(&tp->timer);
1385 tp->timer.data = (unsigned long)dev;
1386 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1388 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
1390 dev->base_addr = (unsigned long)ioaddr;
1392 #ifdef CONFIG_TULIP_MWI
1393 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1394 tulip_mwi_config (pdev, dev);
1396 /* MWI is broken for DC21143 rev 65... */
1397 if (chip_idx == DC21143 && pdev->revision == 65)
1401 /* Stop the chip's Tx and Rx processes. */
1402 tulip_stop_rxtx(tp);
1404 pci_set_master(pdev);
1407 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1408 switch (pdev->subsystem_device) {
1417 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1418 chip_name = "GSC DS21140 Tulip";
1423 /* Clear the missed-packet counter. */
1424 ioread32(ioaddr + CSR8);
1426 /* The station address ROM is read byte serially. The register must
1427 be polled, waiting for the value to be read bit serially from the
1430 ee_data = tp->eeprom;
1432 if (chip_idx == LC82C168) {
1433 for (i = 0; i < 3; i++) {
1434 int value, boguscnt = 100000;
1435 iowrite32(0x600 | i, ioaddr + 0x98);
1437 value = ioread32(ioaddr + CSR9);
1438 while (value < 0 && --boguscnt > 0);
1439 put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
1440 sum += value & 0xffff;
1442 } else if (chip_idx == COMET) {
1443 /* No need to read the EEPROM. */
1444 put_unaligned(cpu_to_le32(ioread32(ioaddr + 0xA4)), (u32 *)dev->dev_addr);
1445 put_unaligned(cpu_to_le16(ioread32(ioaddr + 0xA8)), (u16 *)(dev->dev_addr + 4));
1446 for (i = 0; i < 6; i ++)
1447 sum += dev->dev_addr[i];
1449 /* A serial EEPROM interface, we read now and sort it out later. */
1451 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1453 for (i = 0; i < sizeof(tp->eeprom); i+=2) {
1454 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1455 ee_data[i] = data & 0xff;
1456 ee_data[i + 1] = data >> 8;
1459 /* DEC now has a specification (see Notes) but early board makers
1460 just put the address in the first EEPROM locations. */
1461 /* This does memcmp(ee_data, ee_data+16, 8) */
1462 for (i = 0; i < 8; i ++)
1463 if (ee_data[i] != ee_data[16+i])
1465 if (chip_idx == CONEXANT) {
1466 /* Check that the tuple type and length is correct. */
1467 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1469 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1471 sa_offset = 2; /* Grrr, damn Matrox boards. */
1474 #ifdef CONFIG_MIPS_COBALT
1475 if ((pdev->bus->number == 0) &&
1476 ((PCI_SLOT(pdev->devfn) == 7) ||
1477 (PCI_SLOT(pdev->devfn) == 12))) {
1478 /* Cobalt MAC address in first EEPROM locations. */
1480 /* Ensure our media table fixup get's applied */
1481 memcpy(ee_data + 16, ee_data, 8);
1485 /* Check to see if we have a broken srom */
1486 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1487 /* pci_vendor_id and subsystem_id are swapped */
1488 ee_data[0] = ee_data[2];
1489 ee_data[1] = ee_data[3];
1493 /* HSC-PCI boards need to be byte-swaped and shifted
1494 * up 1 word. This shift needs to happen at the end
1495 * of the MAC first because of the 2 byte overlap.
1497 for (i = 4; i >= 0; i -= 2) {
1498 ee_data[17 + i + 3] = ee_data[17 + i];
1499 ee_data[16 + i + 5] = ee_data[16 + i];
1504 for (i = 0; i < 6; i ++) {
1505 dev->dev_addr[i] = ee_data[i + sa_offset];
1506 sum += ee_data[i + sa_offset];
1509 /* Lite-On boards have the address byte-swapped. */
1510 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0 || dev->dev_addr[0] == 0x02)
1511 && dev->dev_addr[1] == 0x00)
1512 for (i = 0; i < 6; i+=2) {
1513 char tmp = dev->dev_addr[i];
1514 dev->dev_addr[i] = dev->dev_addr[i+1];
1515 dev->dev_addr[i+1] = tmp;
1517 /* On the Zynx 315 Etherarray and other multiport boards only the
1518 first Tulip has an EEPROM.
1519 On Sparc systems the mac address is held in the OBP property
1520 "local-mac-address".
1521 The addresses of the subsequent ports are derived from the first.
1522 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1523 that here as well. */
1524 if (sum == 0 || sum == 6*0xff) {
1525 #if defined(CONFIG_SPARC)
1526 struct device_node *dp = pci_device_to_OF_node(pdev);
1527 const unsigned char *addr;
1531 for (i = 0; i < 5; i++)
1532 dev->dev_addr[i] = last_phys_addr[i];
1533 dev->dev_addr[i] = last_phys_addr[i] + 1;
1534 #if defined(CONFIG_SPARC)
1535 addr = of_get_property(dp, "local-mac-address", &len);
1536 if (addr && len == 6)
1537 memcpy(dev->dev_addr, addr, 6);
1539 #if defined(__i386__) || defined(__x86_64__) /* Patch up x86 BIOS bug. */
1545 for (i = 0; i < 6; i++)
1546 last_phys_addr[i] = dev->dev_addr[i];
1550 /* The lower four bits are the media type. */
1551 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1552 if (options[board_idx] & MEDIA_MASK)
1553 tp->default_port = options[board_idx] & MEDIA_MASK;
1554 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1555 tp->full_duplex = 1;
1556 if (mtu[board_idx] > 0)
1557 dev->mtu = mtu[board_idx];
1559 if (dev->mem_start & MEDIA_MASK)
1560 tp->default_port = dev->mem_start & MEDIA_MASK;
1561 if (tp->default_port) {
1562 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1563 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1565 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1566 tp->full_duplex = 1;
1568 if (tp->full_duplex)
1569 tp->full_duplex_lock = 1;
1571 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1572 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1573 tp->mii_advertise = media2advert[tp->default_port - 9];
1574 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1577 if (tp->flags & HAS_MEDIA_TABLE) {
1578 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1579 tulip_parse_eeprom(dev);
1580 strcpy(dev->name, "eth%d"); /* un-hack */
1583 if ((tp->flags & ALWAYS_CHECK_MII) ||
1584 (tp->mtable && tp->mtable->has_mii) ||
1585 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1586 if (tp->mtable && tp->mtable->has_mii) {
1587 for (i = 0; i < tp->mtable->leafcount; i++)
1588 if (tp->mtable->mleaf[i].media == 11) {
1590 tp->saved_if_port = dev->if_port;
1591 tulip_select_media(dev, 2);
1592 dev->if_port = tp->saved_if_port;
1597 /* Find the connected MII xcvrs.
1598 Doing this in open() would allow detecting external xcvrs
1599 later, but takes much time. */
1600 tulip_find_mii (dev, board_idx);
1603 /* The Tulip-specific entries in the device structure. */
1604 dev->open = tulip_open;
1605 dev->hard_start_xmit = tulip_start_xmit;
1606 dev->tx_timeout = tulip_tx_timeout;
1607 dev->watchdog_timeo = TX_TIMEOUT;
1608 #ifdef CONFIG_TULIP_NAPI
1609 dev->poll = tulip_poll;
1612 dev->stop = tulip_close;
1613 dev->get_stats = tulip_get_stats;
1614 dev->do_ioctl = private_ioctl;
1615 dev->set_multicast_list = set_rx_mode;
1616 #ifdef CONFIG_NET_POLL_CONTROLLER
1617 dev->poll_controller = &poll_tulip;
1619 SET_ETHTOOL_OPS(dev, &ops);
1621 if (register_netdev(dev))
1622 goto err_out_free_ring;
1624 printk(KERN_INFO "%s: %s rev %d at "
1625 #ifdef CONFIG_TULIP_MMIO
1630 " %#llx,", dev->name, chip_name, pdev->revision,
1631 (unsigned long long) pci_resource_start(pdev, TULIP_BAR));
1632 pci_set_drvdata(pdev, dev);
1635 printk(" EEPROM not present,");
1636 for (i = 0; i < 6; i++)
1637 printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
1638 printk(", IRQ %d.\n", irq);
1640 if (tp->chip_id == PNIC2)
1641 tp->link_change = pnic2_lnk_change;
1642 else if (tp->flags & HAS_NWAY)
1643 tp->link_change = t21142_lnk_change;
1644 else if (tp->flags & HAS_PNICNWAY)
1645 tp->link_change = pnic_lnk_change;
1647 /* Reset the xcvr interface and turn on heartbeat. */
1653 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1656 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1657 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1658 iowrite32(0x0000, ioaddr + CSR13);
1659 iowrite32(0x0000, ioaddr + CSR14);
1660 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1662 t21142_start_nway(dev);
1665 /* just do a reset for sanity sake */
1666 iowrite32(0x0000, ioaddr + CSR13);
1667 iowrite32(0x0000, ioaddr + CSR14);
1670 if ( ! tp->mii_cnt) {
1673 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1674 iowrite32(0x30, ioaddr + CSR12);
1675 iowrite32(0x0001F078, ioaddr + CSR6);
1676 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1681 iowrite32(0x00000000, ioaddr + CSR6);
1682 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1683 iowrite32(0x00000001, ioaddr + CSR13);
1687 iowrite32(0x01a80000, ioaddr + CSR6);
1688 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1689 iowrite32(0x00001000, ioaddr + CSR12);
1692 /* No initialization necessary. */
1696 /* put the chip in snooze mode until opened */
1697 tulip_set_power_state (tp, 0, 1);
1702 pci_free_consistent (pdev,
1703 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1704 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1705 tp->rx_ring, tp->rx_ring_dma);
1709 pci_iounmap(pdev, ioaddr);
1712 pci_release_regions (pdev);
1714 err_out_free_netdev:
1722 static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)
1724 struct net_device *dev = pci_get_drvdata(pdev);
1729 if (netif_running(dev))
1732 netif_device_detach(dev);
1733 free_irq(dev->irq, dev);
1735 pci_save_state(pdev);
1736 pci_disable_device(pdev);
1737 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1743 static int tulip_resume(struct pci_dev *pdev)
1745 struct net_device *dev = pci_get_drvdata(pdev);
1751 pci_set_power_state(pdev, PCI_D0);
1752 pci_restore_state(pdev);
1754 if ((retval = pci_enable_device(pdev))) {
1755 printk (KERN_ERR "tulip: pci_enable_device failed in resume\n");
1759 if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev))) {
1760 printk (KERN_ERR "tulip: request_irq failed in resume\n");
1764 netif_device_attach(dev);
1766 if (netif_running(dev))
1772 #endif /* CONFIG_PM */
1775 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1777 struct net_device *dev = pci_get_drvdata (pdev);
1778 struct tulip_private *tp;
1783 tp = netdev_priv(dev);
1784 unregister_netdev(dev);
1785 pci_free_consistent (pdev,
1786 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1787 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1788 tp->rx_ring, tp->rx_ring_dma);
1790 pci_iounmap(pdev, tp->base_addr);
1792 pci_release_regions (pdev);
1793 pci_set_drvdata (pdev, NULL);
1795 /* pci_power_off (pdev, -1); */
1798 #ifdef CONFIG_NET_POLL_CONTROLLER
1800 * Polling 'interrupt' - used by things like netconsole to send skbs
1801 * without having to re-enable interrupts. It's not called while
1802 * the interrupt routine is executing.
1805 static void poll_tulip (struct net_device *dev)
1807 /* disable_irq here is not very nice, but with the lockless
1808 interrupt handler we have no other choice. */
1809 disable_irq(dev->irq);
1810 tulip_interrupt (dev->irq, dev);
1811 enable_irq(dev->irq);
1815 static struct pci_driver tulip_driver = {
1817 .id_table = tulip_pci_tbl,
1818 .probe = tulip_init_one,
1819 .remove = __devexit_p(tulip_remove_one),
1821 .suspend = tulip_suspend,
1822 .resume = tulip_resume,
1823 #endif /* CONFIG_PM */
1827 static int __init tulip_init (void)
1830 printk (KERN_INFO "%s", version);
1833 /* copy module parms into globals */
1834 tulip_rx_copybreak = rx_copybreak;
1835 tulip_max_interrupt_work = max_interrupt_work;
1837 /* probe for and init boards */
1838 return pci_register_driver(&tulip_driver);
1842 static void __exit tulip_cleanup (void)
1844 pci_unregister_driver (&tulip_driver);
1848 module_init(tulip_init);
1849 module_exit(tulip_cleanup);