2 * CS4270 ALSA SoC (ASoC) codec driver
4 * Author: Timur Tabi <timur@freescale.com>
6 * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
13 * Current features/limitations:
15 * 1) Software mode is supported. Stand-alone mode is not supported.
16 * 2) Only I2C is supported, not SPI
17 * 3) Only Master mode is supported, not Slave.
18 * 4) The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * 5) Only I2S and left-justified modes are supported
21 * 6) Power management is not supported
22 * 7) The only supported control is volume and hardware mute (if enabled)
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <sound/core.h>
28 #include <sound/soc.h>
29 #include <sound/initval.h>
30 #include <linux/i2c.h>
35 * The codec isn't really big-endian or little-endian, since the I2S
36 * interface requires data to be sent serially with the MSbit first.
37 * However, to support BE and LE I2S devices, we specify both here. That
38 * way, ALSA will always match the bit patterns.
40 #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
41 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
42 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
43 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
44 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
45 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
47 /* CS4270 registers addresses */
48 #define CS4270_CHIPID 0x01 /* Chip ID */
49 #define CS4270_PWRCTL 0x02 /* Power Control */
50 #define CS4270_MODE 0x03 /* Mode Control */
51 #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
52 #define CS4270_TRANS 0x05 /* Transition Control */
53 #define CS4270_MUTE 0x06 /* Mute Control */
54 #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
55 #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
57 #define CS4270_FIRSTREG 0x01
58 #define CS4270_LASTREG 0x08
59 #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
61 /* Bit masks for the CS4270 registers */
62 #define CS4270_CHIPID_ID 0xF0
63 #define CS4270_CHIPID_REV 0x0F
64 #define CS4270_PWRCTL_FREEZE 0x80
65 #define CS4270_PWRCTL_PDN_ADC 0x20
66 #define CS4270_PWRCTL_PDN_DAC 0x02
67 #define CS4270_PWRCTL_PDN 0x01
68 #define CS4270_MODE_SPEED_MASK 0x30
69 #define CS4270_MODE_1X 0x00
70 #define CS4270_MODE_2X 0x10
71 #define CS4270_MODE_4X 0x20
72 #define CS4270_MODE_SLAVE 0x30
73 #define CS4270_MODE_DIV_MASK 0x0E
74 #define CS4270_MODE_DIV1 0x00
75 #define CS4270_MODE_DIV15 0x02
76 #define CS4270_MODE_DIV2 0x04
77 #define CS4270_MODE_DIV3 0x06
78 #define CS4270_MODE_DIV4 0x08
79 #define CS4270_MODE_POPGUARD 0x01
80 #define CS4270_FORMAT_FREEZE_A 0x80
81 #define CS4270_FORMAT_FREEZE_B 0x40
82 #define CS4270_FORMAT_LOOPBACK 0x20
83 #define CS4270_FORMAT_DAC_MASK 0x18
84 #define CS4270_FORMAT_DAC_LJ 0x00
85 #define CS4270_FORMAT_DAC_I2S 0x08
86 #define CS4270_FORMAT_DAC_RJ16 0x18
87 #define CS4270_FORMAT_DAC_RJ24 0x10
88 #define CS4270_FORMAT_ADC_MASK 0x01
89 #define CS4270_FORMAT_ADC_LJ 0x00
90 #define CS4270_FORMAT_ADC_I2S 0x01
91 #define CS4270_TRANS_ONE_VOL 0x80
92 #define CS4270_TRANS_SOFT 0x40
93 #define CS4270_TRANS_ZERO 0x20
94 #define CS4270_TRANS_INV_ADC_A 0x08
95 #define CS4270_TRANS_INV_ADC_B 0x10
96 #define CS4270_TRANS_INV_DAC_A 0x02
97 #define CS4270_TRANS_INV_DAC_B 0x04
98 #define CS4270_TRANS_DEEMPH 0x01
99 #define CS4270_MUTE_AUTO 0x20
100 #define CS4270_MUTE_ADC_A 0x08
101 #define CS4270_MUTE_ADC_B 0x10
102 #define CS4270_MUTE_POLARITY 0x04
103 #define CS4270_MUTE_DAC_A 0x01
104 #define CS4270_MUTE_DAC_B 0x02
106 /* Private data for the CS4270 */
107 struct cs4270_private {
108 struct snd_soc_codec codec;
109 u8 reg_cache[CS4270_NUMREGS];
110 unsigned int mclk; /* Input frequency of the MCLK pin */
111 unsigned int mode; /* The mode (I2S or left-justified) */
115 * Clock Ratio Selection for Master Mode with I2C enabled
117 * The data for this chart is taken from Table 5 of the CS4270 reference
120 * This table is used to determine how to program the Mode Control register.
121 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
122 * rates the CS4270 currently supports.
124 * Each element in this array corresponds to the ratios in mclk_ratios[].
125 * These two arrays need to be in sync.
127 * 'speed_mode' is the corresponding bit pattern to be written to the
128 * MODE bits of the Mode Control Register
130 * 'mclk' is the corresponding bit pattern to be wirten to the MCLK bits of
131 * the Mode Control Register.
133 * In situations where a single ratio is represented by multiple speed
134 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
135 * double-speed instead of quad-speed. However, the CS4270 errata states
136 * that Divide-By-1.5 can cause failures, so we avoid that mode where
139 * ERRATA: There is an errata for the CS4270 where divide-by-1.5 does not
140 * work if VD = 3.3V. If this effects you, select the
141 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
142 * never select any sample rates that require divide-by-1.5.
148 } cs4270_mode_ratios[] = {
149 {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
150 #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
151 {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
153 {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
154 {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
155 {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
156 {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
157 {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
158 {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
159 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
162 /* The number of MCLK/LRCK ratios supported by the CS4270 */
163 #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
166 * Determine the CS4270 samples rates.
168 * 'freq' is the input frequency to MCLK. The other parameters are ignored.
170 * The value of MCLK is used to determine which sample rates are supported
171 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
172 * support values: 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
174 * This function calculates the nine ratios and determines which ones match
175 * a standard sample rate. If there's a match, then it is added to the list
176 * of support sample rates.
178 * This function must be called by the machine driver's 'startup' function,
179 * otherwise the list of supported sample rates will not be available in
182 * Note that in stand-alone mode, the sample rate is determined by input
183 * pins M0, M1, MDIV1, and MDIV2. Also in stand-alone mode, divide-by-3
184 * is not a programmable option. However, divide-by-3 is not an available
185 * option in stand-alone mode. This cases two problems: a ratio of 768 is
186 * not available (it requires divide-by-3) and B) ratios 192 and 384 can
187 * only be selected with divide-by-1.5, but there is an errate that make
188 * this selection difficult.
190 * In addition, there is no mechanism for communicating with the machine
191 * driver what the input settings can be. This would need to be implemented
192 * for stand-alone mode to work.
194 static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
195 int clk_id, unsigned int freq, int dir)
197 struct snd_soc_codec *codec = codec_dai->codec;
198 struct cs4270_private *cs4270 = codec->private_data;
199 unsigned int rates = 0;
200 unsigned int rate_min = -1;
201 unsigned int rate_max = 0;
206 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
207 unsigned int rate = freq / cs4270_mode_ratios[i].ratio;
208 rates |= snd_pcm_rate_to_rate_bit(rate);
214 /* FIXME: soc should support a rate list */
215 rates &= ~SNDRV_PCM_RATE_KNOT;
218 printk(KERN_ERR "cs4270: could not find a valid sample rate\n");
222 codec_dai->playback.rates = rates;
223 codec_dai->playback.rate_min = rate_min;
224 codec_dai->playback.rate_max = rate_max;
226 codec_dai->capture.rates = rates;
227 codec_dai->capture.rate_min = rate_min;
228 codec_dai->capture.rate_max = rate_max;
234 * Configure the codec for the selected audio format
236 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
239 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
240 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
241 * data for playback only, but ASoC currently does not support different
242 * formats for playback vs. record.
244 static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
247 struct snd_soc_codec *codec = codec_dai->codec;
248 struct cs4270_private *cs4270 = codec->private_data;
251 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
252 case SND_SOC_DAIFMT_I2S:
253 case SND_SOC_DAIFMT_LEFT_J:
254 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
257 printk(KERN_ERR "cs4270: invalid DAI format\n");
265 * Pre-fill the CS4270 register cache.
267 * We use the auto-increment feature of the CS4270 to read all registers in
270 static int cs4270_fill_cache(struct snd_soc_codec *codec)
272 u8 *cache = codec->reg_cache;
273 struct i2c_client *i2c_client = codec->control_data;
276 length = i2c_smbus_read_i2c_block_data(i2c_client,
277 CS4270_FIRSTREG | 0x80, CS4270_NUMREGS, cache);
279 if (length != CS4270_NUMREGS) {
280 printk(KERN_ERR "cs4270: I2C read failure, addr=0x%x\n",
289 * Read from the CS4270 register cache.
291 * This CS4270 registers are cached to avoid excessive I2C I/O operations.
292 * After the initial read to pre-fill the cache, the CS4270 never updates
293 * the register values, so we won't have a cache coherncy problem.
295 static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec,
298 u8 *cache = codec->reg_cache;
300 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
303 return cache[reg - CS4270_FIRSTREG];
307 * Write to a CS4270 register via the I2C bus.
309 * This function writes the given value to the given CS4270 register, and
310 * also updates the register cache.
312 * Note that we don't use the hw_write function pointer of snd_soc_codec.
313 * That's because it's too clunky: the hw_write_t prototype does not match
314 * i2c_smbus_write_byte_data(), and it's just another layer of overhead.
316 static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg,
319 u8 *cache = codec->reg_cache;
321 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
324 /* Only perform an I2C operation if the new value is different */
325 if (cache[reg - CS4270_FIRSTREG] != value) {
326 struct i2c_client *client = codec->control_data;
327 if (i2c_smbus_write_byte_data(client, reg, value)) {
328 printk(KERN_ERR "cs4270: I2C write failed\n");
332 /* We've written to the hardware, so update the cache */
333 cache[reg - CS4270_FIRSTREG] = value;
340 * Program the CS4270 with the given hardware parameters.
342 * The .ops functions are used to provide board-specific data, like
343 * input frequencies, to this driver. This function takes that information,
344 * combines it with the hardware parameters provided, and programs the
345 * hardware accordingly.
347 static int cs4270_hw_params(struct snd_pcm_substream *substream,
348 struct snd_pcm_hw_params *params,
349 struct snd_soc_dai *dai)
351 struct snd_soc_pcm_runtime *rtd = substream->private_data;
352 struct snd_soc_device *socdev = rtd->socdev;
353 struct snd_soc_codec *codec = socdev->codec;
354 struct cs4270_private *cs4270 = codec->private_data;
361 /* Figure out which MCLK/LRCK ratio to use */
363 rate = params_rate(params); /* Sampling rate, in Hz */
364 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
366 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
367 if (cs4270_mode_ratios[i].ratio == ratio)
371 if (i == NUM_MCLK_RATIOS) {
372 /* We did not find a matching ratio */
373 printk(KERN_ERR "cs4270: could not find matching ratio\n");
377 /* Freeze and power-down the codec */
379 ret = snd_soc_write(codec, CS4270_PWRCTL, CS4270_PWRCTL_FREEZE |
380 CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC |
383 printk(KERN_ERR "cs4270: I2C write failed\n");
387 /* Program the mode control register */
389 reg = snd_soc_read(codec, CS4270_MODE);
390 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
391 reg |= cs4270_mode_ratios[i].speed_mode | cs4270_mode_ratios[i].mclk;
393 ret = snd_soc_write(codec, CS4270_MODE, reg);
395 printk(KERN_ERR "cs4270: I2C write failed\n");
399 /* Program the format register */
401 reg = snd_soc_read(codec, CS4270_FORMAT);
402 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
404 switch (cs4270->mode) {
405 case SND_SOC_DAIFMT_I2S:
406 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
408 case SND_SOC_DAIFMT_LEFT_J:
409 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
412 printk(KERN_ERR "cs4270: unknown format\n");
416 ret = snd_soc_write(codec, CS4270_FORMAT, reg);
418 printk(KERN_ERR "cs4270: I2C write failed\n");
422 /* Disable auto-mute. This feature appears to be buggy, because in
423 some situations, auto-mute will not deactivate when it should. */
425 reg = snd_soc_read(codec, CS4270_MUTE);
426 reg &= ~CS4270_MUTE_AUTO;
427 ret = snd_soc_write(codec, CS4270_MUTE, reg);
429 printk(KERN_ERR "cs4270: I2C write failed\n");
433 /* Disable automatic volume control. It's enabled by default, and
434 * it causes volume change commands to be delayed, sometimes until
435 * after playback has started.
438 reg = cs4270_read_reg_cache(codec, CS4270_TRANS);
439 reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO);
440 ret = cs4270_i2c_write(codec, CS4270_TRANS, reg);
442 printk(KERN_ERR "I2C write failed\n");
446 /* Thaw and power-up the codec */
448 ret = snd_soc_write(codec, CS4270_PWRCTL, 0);
450 printk(KERN_ERR "cs4270: I2C write failed\n");
457 #ifdef CONFIG_SND_SOC_CS4270_HWMUTE
459 * Set the CS4270 external mute
461 * This function toggles the mute bits in the MUTE register. The CS4270's
462 * mute capability is intended for external muting circuitry, so if the
463 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
464 * then this function will do nothing.
466 static int cs4270_mute(struct snd_soc_dai *dai, int mute)
468 struct snd_soc_codec *codec = dai->codec;
471 reg6 = snd_soc_read(codec, CS4270_MUTE);
474 reg6 |= CS4270_MUTE_ADC_A | CS4270_MUTE_ADC_B |
475 CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
477 reg6 &= ~(CS4270_MUTE_ADC_A | CS4270_MUTE_ADC_B |
478 CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
480 return snd_soc_write(codec, CS4270_MUTE, reg6);
483 #define cs4270_mute NULL
486 /* A list of non-DAPM controls that the CS4270 supports */
487 static const struct snd_kcontrol_new cs4270_snd_controls[] = {
488 SOC_DOUBLE_R("Master Playback Volume",
489 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1)
493 * Global variable to store socdev for i2c probe function.
495 * If struct i2c_driver had a private_data field, we wouldn't need to use
496 * cs4270_socdec. This is the only way to pass the socdev structure to
497 * cs4270_i2c_probe().
499 * The real solution to cs4270_socdev is to create a mechanism
500 * that maps I2C addresses to snd_soc_device structures. Perhaps the
501 * creation of the snd_soc_device object should be moved out of
502 * cs4270_probe() and into cs4270_i2c_probe(), but that would make this
503 * driver dependent on I2C. The CS4270 supports "stand-alone" mode, whereby
504 * the chip is *not* connected to the I2C bus, but is instead configured via
507 static struct snd_soc_device *cs4270_socdev;
509 struct snd_soc_dai cs4270_dai = {
512 .stream_name = "Playback",
516 .formats = CS4270_FORMATS,
519 .stream_name = "Capture",
523 .formats = CS4270_FORMATS,
526 .hw_params = cs4270_hw_params,
527 .set_sysclk = cs4270_set_dai_sysclk,
528 .set_fmt = cs4270_set_dai_fmt,
529 .digital_mute = cs4270_mute,
532 EXPORT_SYMBOL_GPL(cs4270_dai);
535 * Initialize the I2C interface of the CS4270
537 * This function is called for whenever the I2C subsystem finds a device
538 * at a particular address.
540 * Note: snd_soc_new_pcms() must be called before this function can be called,
541 * because of snd_ctl_add().
543 static int cs4270_i2c_probe(struct i2c_client *i2c_client,
544 const struct i2c_device_id *id)
546 struct snd_soc_device *socdev = cs4270_socdev;
547 struct snd_soc_codec *codec;
548 struct cs4270_private *cs4270;
552 /* Verify that we have a CS4270 */
554 ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
556 printk(KERN_ERR "cs4270: failed to read I2C\n");
559 /* The top four bits of the chip ID should be 1100. */
560 if ((ret & 0xF0) != 0xC0) {
561 printk(KERN_ERR "cs4270: device at addr %X is not a CS4270\n",
566 printk(KERN_INFO "cs4270: found device at I2C address %X\n",
568 printk(KERN_INFO "cs4270: hardware revision %X\n", ret & 0xF);
570 /* Allocate enough space for the snd_soc_codec structure
571 and our private data together. */
572 cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL);
574 printk(KERN_ERR "cs4270: Could not allocate codec structure\n");
577 codec = &cs4270->codec;
578 socdev->codec = codec;
580 mutex_init(&codec->mutex);
581 INIT_LIST_HEAD(&codec->dapm_widgets);
582 INIT_LIST_HEAD(&codec->dapm_paths);
584 codec->name = "CS4270";
585 codec->owner = THIS_MODULE;
586 codec->dai = &cs4270_dai;
588 codec->private_data = cs4270;
589 codec->control_data = i2c_client;
590 codec->read = cs4270_read_reg_cache;
591 codec->write = cs4270_i2c_write;
592 codec->reg_cache = cs4270->reg_cache;
593 codec->reg_cache_size = CS4270_NUMREGS;
595 /* The I2C interface is set up, so pre-fill our register cache */
597 ret = cs4270_fill_cache(codec);
599 printk(KERN_ERR "cs4270: failed to fill register cache\n");
600 goto error_free_codec;
605 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
607 printk(KERN_ERR "cs4270: failed to create PCMs\n");
608 goto error_free_codec;
611 /* Add the non-DAPM controls */
613 for (i = 0; i < ARRAY_SIZE(cs4270_snd_controls); i++) {
614 struct snd_kcontrol *kctrl;
616 kctrl = snd_soc_cnew(&cs4270_snd_controls[i], codec, NULL);
618 printk(KERN_ERR "cs4270: error creating control '%s'\n",
619 cs4270_snd_controls[i].name);
621 goto error_free_pcms;
624 ret = snd_ctl_add(codec->card, kctrl);
626 printk(KERN_ERR "cs4270: error adding control '%s'\n",
627 cs4270_snd_controls[i].name);
628 goto error_free_pcms;
632 /* Initialize the SOC device */
634 ret = snd_soc_init_card(socdev);
636 printk(KERN_ERR "cs4270: failed to register card\n");
637 goto error_free_pcms;;
640 i2c_set_clientdata(i2c_client, socdev);
645 snd_soc_free_pcms(socdev);
653 static int cs4270_i2c_remove(struct i2c_client *i2c_client)
655 struct snd_soc_device *socdev = i2c_get_clientdata(i2c_client);
656 struct snd_soc_codec *codec = socdev->codec;
657 struct cs4270_private *cs4270 = codec->private_data;
659 snd_soc_free_pcms(socdev);
665 static struct i2c_device_id cs4270_id[] = {
669 MODULE_DEVICE_TABLE(i2c, cs4270_id);
671 static struct i2c_driver cs4270_i2c_driver = {
674 .owner = THIS_MODULE,
676 .id_table = cs4270_id,
677 .probe = cs4270_i2c_probe,
678 .remove = cs4270_i2c_remove,
682 * ASoC probe function
684 * This function is called when the machine driver calls
685 * platform_device_add().
687 static int cs4270_probe(struct platform_device *pdev)
689 cs4270_socdev = platform_get_drvdata(pdev);;
691 return i2c_add_driver(&cs4270_i2c_driver);
694 static int cs4270_remove(struct platform_device *pdev)
696 i2c_del_driver(&cs4270_i2c_driver);
702 * ASoC codec device structure
704 * Assign this variable to the codec_dev field of the machine driver's
705 * snd_soc_device structure.
707 struct snd_soc_codec_device soc_codec_device_cs4270 = {
708 .probe = cs4270_probe,
709 .remove = cs4270_remove
711 EXPORT_SYMBOL_GPL(soc_codec_device_cs4270);
713 static int __init cs4270_init(void)
715 printk(KERN_INFO "Cirrus Logic CS4270 ALSA SoC Codec Driver\n");
717 return snd_soc_register_dai(&cs4270_dai);
719 module_init(cs4270_init);
721 static void __exit cs4270_exit(void)
723 snd_soc_unregister_dai(&cs4270_dai);
725 module_exit(cs4270_exit);
727 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
728 MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
729 MODULE_LICENSE("GPL");