Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[linux-2.6] / drivers / usb / host / ehci-q.c
1 /*
2  * Copyright (C) 2001-2004 by David Brownell
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software Foundation,
16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  */
18
19 /* this file is part of ehci-hcd.c */
20
21 /*-------------------------------------------------------------------------*/
22
23 /*
24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
25  *
26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28  * buffers needed for the larger number).  We use one QH per endpoint, queue
29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
30  *
31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32  * interrupts) needs careful scheduling.  Performance improvements can be
33  * an ongoing challenge.  That's in "ehci-sched.c".
34  *
35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
38  * buffer low/full speed data so the host collects it at high speed.
39  */
40
41 /*-------------------------------------------------------------------------*/
42
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
44
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47                   size_t len, int token, int maxpacket)
48 {
49         int     i, count;
50         u64     addr = buf;
51
52         /* one buffer entry per 4K ... first might be short or unaligned */
53         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
56         if (likely (len < count))               /* ... iff needed */
57                 count = len;
58         else {
59                 buf +=  0x1000;
60                 buf &= ~0x0fff;
61
62                 /* per-qtd limit: from 16K to 20K (best alignment) */
63                 for (i = 1; count < len && i < 5; i++) {
64                         addr = buf;
65                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67                                         (u32)(addr >> 32));
68                         buf += 0x1000;
69                         if ((count + 0x1000) < len)
70                                 count += 0x1000;
71                         else
72                                 count = len;
73                 }
74
75                 /* short packets may only terminate transfers */
76                 if (count != len)
77                         count -= (count % maxpacket);
78         }
79         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80         qtd->length = count;
81
82         return count;
83 }
84
85 /*-------------------------------------------------------------------------*/
86
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
89 {
90         /* writes to an active overlay are unsafe */
91         BUG_ON(qh->qh_state != QH_STATE_IDLE);
92
93         qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
94         qh->hw_alt_next = EHCI_LIST_END(ehci);
95
96         /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
97         wmb ();
98         qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
99 }
100
101 /* if it weren't for a common silicon quirk (writing the dummy into the qh
102  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
103  * recovery (including urb dequeue) would need software changes to a QH...
104  */
105 static void
106 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
107 {
108         struct ehci_qtd *qtd;
109
110         if (list_empty (&qh->qtd_list))
111                 qtd = qh->dummy;
112         else {
113                 qtd = list_entry (qh->qtd_list.next,
114                                 struct ehci_qtd, qtd_list);
115                 /* first qtd may already be partially processed */
116                 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
117                         qtd = NULL;
118         }
119
120         if (qtd)
121                 qh_update (ehci, qh, qtd);
122 }
123
124 /*-------------------------------------------------------------------------*/
125
126 static int qtd_copy_status (
127         struct ehci_hcd *ehci,
128         struct urb *urb,
129         size_t length,
130         u32 token
131 )
132 {
133         int     status = -EINPROGRESS;
134
135         /* count IN/OUT bytes, not SETUP (even short packets) */
136         if (likely (QTD_PID (token) != 2))
137                 urb->actual_length += length - QTD_LENGTH (token);
138
139         /* don't modify error codes */
140         if (unlikely(urb->unlinked))
141                 return status;
142
143         /* force cleanup after short read; not always an error */
144         if (unlikely (IS_SHORT_READ (token)))
145                 status = -EREMOTEIO;
146
147         /* serious "can't proceed" faults reported by the hardware */
148         if (token & QTD_STS_HALT) {
149                 if (token & QTD_STS_BABBLE) {
150                         /* FIXME "must" disable babbling device's port too */
151                         status = -EOVERFLOW;
152                 } else if (token & QTD_STS_MMF) {
153                         /* fs/ls interrupt xfer missed the complete-split */
154                         status = -EPROTO;
155                 } else if (token & QTD_STS_DBE) {
156                         status = (QTD_PID (token) == 1) /* IN ? */
157                                 ? -ENOSR  /* hc couldn't read data */
158                                 : -ECOMM; /* hc couldn't write data */
159                 } else if (token & QTD_STS_XACT) {
160                         /* timeout, bad crc, wrong PID, etc; retried */
161                         if (QTD_CERR (token))
162                                 status = -EPIPE;
163                         else {
164                                 ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
165                                         urb->dev->devpath,
166                                         usb_pipeendpoint (urb->pipe),
167                                         usb_pipein (urb->pipe) ? "in" : "out");
168                                 status = -EPROTO;
169                         }
170                 /* CERR nonzero + no errors + halt --> stall */
171                 } else if (QTD_CERR (token))
172                         status = -EPIPE;
173                 else    /* unknown */
174                         status = -EPROTO;
175
176                 ehci_vdbg (ehci,
177                         "dev%d ep%d%s qtd token %08x --> status %d\n",
178                         usb_pipedevice (urb->pipe),
179                         usb_pipeendpoint (urb->pipe),
180                         usb_pipein (urb->pipe) ? "in" : "out",
181                         token, status);
182
183                 /* if async CSPLIT failed, try cleaning out the TT buffer */
184                 if (status != -EPIPE
185                                 && urb->dev->tt
186                                 && !usb_pipeint(urb->pipe)
187                                 && ((token & QTD_STS_MMF) != 0
188                                         || QTD_CERR(token) == 0)
189                                 && (!ehci_is_TDI(ehci)
190                                         || urb->dev->tt->hub !=
191                                            ehci_to_hcd(ehci)->self.root_hub)) {
192 #ifdef DEBUG
193                         struct usb_device *tt = urb->dev->tt->hub;
194                         dev_dbg (&tt->dev,
195                                 "clear tt buffer port %d, a%d ep%d t%08x\n",
196                                 urb->dev->ttport, urb->dev->devnum,
197                                 usb_pipeendpoint (urb->pipe), token);
198 #endif /* DEBUG */
199                         /* REVISIT ARC-derived cores don't clear the root
200                          * hub TT buffer in this way...
201                          */
202                         usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
203                 }
204         }
205
206         return status;
207 }
208
209 static void
210 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
211 __releases(ehci->lock)
212 __acquires(ehci->lock)
213 {
214         if (likely (urb->hcpriv != NULL)) {
215                 struct ehci_qh  *qh = (struct ehci_qh *) urb->hcpriv;
216
217                 /* S-mask in a QH means it's an interrupt urb */
218                 if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
219
220                         /* ... update hc-wide periodic stats (for usbfs) */
221                         ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
222                 }
223                 qh_put (qh);
224         }
225
226         if (unlikely(urb->unlinked)) {
227                 COUNT(ehci->stats.unlink);
228         } else {
229                 /* report non-error and short read status as zero */
230                 if (status == -EINPROGRESS || status == -EREMOTEIO)
231                         status = 0;
232                 COUNT(ehci->stats.complete);
233         }
234
235 #ifdef EHCI_URB_TRACE
236         ehci_dbg (ehci,
237                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
238                 __func__, urb->dev->devpath, urb,
239                 usb_pipeendpoint (urb->pipe),
240                 usb_pipein (urb->pipe) ? "in" : "out",
241                 status,
242                 urb->actual_length, urb->transfer_buffer_length);
243 #endif
244
245         /* complete() can reenter this HCD */
246         usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
247         spin_unlock (&ehci->lock);
248         usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
249         spin_lock (&ehci->lock);
250 }
251
252 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
253 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
254
255 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
256 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
257
258 /*
259  * Process and free completed qtds for a qh, returning URBs to drivers.
260  * Chases up to qh->hw_current.  Returns number of completions called,
261  * indicating how much "real" work we did.
262  */
263 static unsigned
264 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
265 {
266         struct ehci_qtd         *last = NULL, *end = qh->dummy;
267         struct list_head        *entry, *tmp;
268         int                     last_status = -EINPROGRESS;
269         int                     stopped;
270         unsigned                count = 0;
271         u8                      state;
272         __le32                  halt = HALT_BIT(ehci);
273
274         if (unlikely (list_empty (&qh->qtd_list)))
275                 return count;
276
277         /* completions (or tasks on other cpus) must never clobber HALT
278          * till we've gone through and cleaned everything up, even when
279          * they add urbs to this qh's queue or mark them for unlinking.
280          *
281          * NOTE:  unlinking expects to be done in queue order.
282          */
283         state = qh->qh_state;
284         qh->qh_state = QH_STATE_COMPLETING;
285         stopped = (state == QH_STATE_IDLE);
286
287         /* remove de-activated QTDs from front of queue.
288          * after faults (including short reads), cleanup this urb
289          * then let the queue advance.
290          * if queue is stopped, handles unlinks.
291          */
292         list_for_each_safe (entry, tmp, &qh->qtd_list) {
293                 struct ehci_qtd *qtd;
294                 struct urb      *urb;
295                 u32             token = 0;
296
297                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
298                 urb = qtd->urb;
299
300                 /* clean up any state from previous QTD ...*/
301                 if (last) {
302                         if (likely (last->urb != urb)) {
303                                 ehci_urb_done(ehci, last->urb, last_status);
304                                 count++;
305                                 last_status = -EINPROGRESS;
306                         }
307                         ehci_qtd_free (ehci, last);
308                         last = NULL;
309                 }
310
311                 /* ignore urbs submitted during completions we reported */
312                 if (qtd == end)
313                         break;
314
315                 /* hardware copies qtd out of qh overlay */
316                 rmb ();
317                 token = hc32_to_cpu(ehci, qtd->hw_token);
318
319                 /* always clean up qtds the hc de-activated */
320  retry_xacterr:
321                 if ((token & QTD_STS_ACTIVE) == 0) {
322
323                         /* on STALL, error, and short reads this urb must
324                          * complete and all its qtds must be recycled.
325                          */
326                         if ((token & QTD_STS_HALT) != 0) {
327
328                                 /* retry transaction errors until we
329                                  * reach the software xacterr limit
330                                  */
331                                 if ((token & QTD_STS_XACT) &&
332                                                 QTD_CERR(token) == 0 &&
333                                                 --qh->xacterrs > 0 &&
334                                                 !urb->unlinked) {
335                                         ehci_dbg(ehci,
336         "detected XactErr len %zu/%zu retry %d\n",
337         qtd->length - QTD_LENGTH(token), qtd->length,
338         QH_XACTERR_MAX - qh->xacterrs);
339
340                                         /* reset the token in the qtd and the
341                                          * qh overlay (which still contains
342                                          * the qtd) so that we pick up from
343                                          * where we left off
344                                          */
345                                         token &= ~QTD_STS_HALT;
346                                         token |= QTD_STS_ACTIVE |
347                                                         (EHCI_TUNE_CERR << 10);
348                                         qtd->hw_token = cpu_to_hc32(ehci,
349                                                         token);
350                                         wmb();
351                                         qh->hw_token = cpu_to_hc32(ehci, token);
352                                         goto retry_xacterr;
353                                 }
354                                 stopped = 1;
355
356                         /* magic dummy for some short reads; qh won't advance.
357                          * that silicon quirk can kick in with this dummy too.
358                          *
359                          * other short reads won't stop the queue, including
360                          * control transfers (status stage handles that) or
361                          * most other single-qtd reads ... the queue stops if
362                          * URB_SHORT_NOT_OK was set so the driver submitting
363                          * the urbs could clean it up.
364                          */
365                         } else if (IS_SHORT_READ (token)
366                                         && !(qtd->hw_alt_next
367                                                 & EHCI_LIST_END(ehci))) {
368                                 stopped = 1;
369                                 goto halt;
370                         }
371
372                 /* stop scanning when we reach qtds the hc is using */
373                 } else if (likely (!stopped
374                                 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
375                         break;
376
377                 /* scan the whole queue for unlinks whenever it stops */
378                 } else {
379                         stopped = 1;
380
381                         /* cancel everything if we halt, suspend, etc */
382                         if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
383                                 last_status = -ESHUTDOWN;
384
385                         /* this qtd is active; skip it unless a previous qtd
386                          * for its urb faulted, or its urb was canceled.
387                          */
388                         else if (last_status == -EINPROGRESS && !urb->unlinked)
389                                 continue;
390
391                         /* qh unlinked; token in overlay may be most current */
392                         if (state == QH_STATE_IDLE
393                                         && cpu_to_hc32(ehci, qtd->qtd_dma)
394                                                 == qh->hw_current)
395                                 token = hc32_to_cpu(ehci, qh->hw_token);
396
397                         /* force halt for unlinked or blocked qh, so we'll
398                          * patch the qh later and so that completions can't
399                          * activate it while we "know" it's stopped.
400                          */
401                         if ((halt & qh->hw_token) == 0) {
402 halt:
403                                 qh->hw_token |= halt;
404                                 wmb ();
405                         }
406                 }
407
408                 /* unless we already know the urb's status, collect qtd status
409                  * and update count of bytes transferred.  in common short read
410                  * cases with only one data qtd (including control transfers),
411                  * queue processing won't halt.  but with two or more qtds (for
412                  * example, with a 32 KB transfer), when the first qtd gets a
413                  * short read the second must be removed by hand.
414                  */
415                 if (last_status == -EINPROGRESS) {
416                         last_status = qtd_copy_status(ehci, urb,
417                                         qtd->length, token);
418                         if (last_status == -EREMOTEIO
419                                         && (qtd->hw_alt_next
420                                                 & EHCI_LIST_END(ehci)))
421                                 last_status = -EINPROGRESS;
422                 }
423
424                 /* if we're removing something not at the queue head,
425                  * patch the hardware queue pointer.
426                  */
427                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
428                         last = list_entry (qtd->qtd_list.prev,
429                                         struct ehci_qtd, qtd_list);
430                         last->hw_next = qtd->hw_next;
431                 }
432
433                 /* remove qtd; it's recycled after possible urb completion */
434                 list_del (&qtd->qtd_list);
435                 last = qtd;
436
437                 /* reinit the xacterr counter for the next qtd */
438                 qh->xacterrs = QH_XACTERR_MAX;
439         }
440
441         /* last urb's completion might still need calling */
442         if (likely (last != NULL)) {
443                 ehci_urb_done(ehci, last->urb, last_status);
444                 count++;
445                 ehci_qtd_free (ehci, last);
446         }
447
448         /* restore original state; caller must unlink or relink */
449         qh->qh_state = state;
450
451         /* be sure the hardware's done with the qh before refreshing
452          * it after fault cleanup, or recovering from silicon wrongly
453          * overlaying the dummy qtd (which reduces DMA chatter).
454          */
455         if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
456                 switch (state) {
457                 case QH_STATE_IDLE:
458                         qh_refresh(ehci, qh);
459                         break;
460                 case QH_STATE_LINKED:
461                         /* We won't refresh a QH that's linked (after the HC
462                          * stopped the queue).  That avoids a race:
463                          *  - HC reads first part of QH;
464                          *  - CPU updates that first part and the token;
465                          *  - HC reads rest of that QH, including token
466                          * Result:  HC gets an inconsistent image, and then
467                          * DMAs to/from the wrong memory (corrupting it).
468                          *
469                          * That should be rare for interrupt transfers,
470                          * except maybe high bandwidth ...
471                          */
472                         if ((cpu_to_hc32(ehci, QH_SMASK)
473                                         & qh->hw_info2) != 0) {
474                                 intr_deschedule (ehci, qh);
475                                 (void) qh_schedule (ehci, qh);
476                         } else
477                                 unlink_async (ehci, qh);
478                         break;
479                 /* otherwise, unlink already started */
480                 }
481         }
482
483         return count;
484 }
485
486 /*-------------------------------------------------------------------------*/
487
488 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
489 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
490 // ... and packet size, for any kind of endpoint descriptor
491 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
492
493 /*
494  * reverse of qh_urb_transaction:  free a list of TDs.
495  * used for cleanup after errors, before HC sees an URB's TDs.
496  */
497 static void qtd_list_free (
498         struct ehci_hcd         *ehci,
499         struct urb              *urb,
500         struct list_head        *qtd_list
501 ) {
502         struct list_head        *entry, *temp;
503
504         list_for_each_safe (entry, temp, qtd_list) {
505                 struct ehci_qtd *qtd;
506
507                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
508                 list_del (&qtd->qtd_list);
509                 ehci_qtd_free (ehci, qtd);
510         }
511 }
512
513 /*
514  * create a list of filled qtds for this URB; won't link into qh.
515  */
516 static struct list_head *
517 qh_urb_transaction (
518         struct ehci_hcd         *ehci,
519         struct urb              *urb,
520         struct list_head        *head,
521         gfp_t                   flags
522 ) {
523         struct ehci_qtd         *qtd, *qtd_prev;
524         dma_addr_t              buf;
525         int                     len, maxpacket;
526         int                     is_input;
527         u32                     token;
528
529         /*
530          * URBs map to sequences of QTDs:  one logical transaction
531          */
532         qtd = ehci_qtd_alloc (ehci, flags);
533         if (unlikely (!qtd))
534                 return NULL;
535         list_add_tail (&qtd->qtd_list, head);
536         qtd->urb = urb;
537
538         token = QTD_STS_ACTIVE;
539         token |= (EHCI_TUNE_CERR << 10);
540         /* for split transactions, SplitXState initialized to zero */
541
542         len = urb->transfer_buffer_length;
543         is_input = usb_pipein (urb->pipe);
544         if (usb_pipecontrol (urb->pipe)) {
545                 /* SETUP pid */
546                 qtd_fill(ehci, qtd, urb->setup_dma,
547                                 sizeof (struct usb_ctrlrequest),
548                                 token | (2 /* "setup" */ << 8), 8);
549
550                 /* ... and always at least one more pid */
551                 token ^= QTD_TOGGLE;
552                 qtd_prev = qtd;
553                 qtd = ehci_qtd_alloc (ehci, flags);
554                 if (unlikely (!qtd))
555                         goto cleanup;
556                 qtd->urb = urb;
557                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
558                 list_add_tail (&qtd->qtd_list, head);
559
560                 /* for zero length DATA stages, STATUS is always IN */
561                 if (len == 0)
562                         token |= (1 /* "in" */ << 8);
563         }
564
565         /*
566          * data transfer stage:  buffer setup
567          */
568         buf = urb->transfer_dma;
569
570         if (is_input)
571                 token |= (1 /* "in" */ << 8);
572         /* else it's already initted to "out" pid (0 << 8) */
573
574         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
575
576         /*
577          * buffer gets wrapped in one or more qtds;
578          * last one may be "short" (including zero len)
579          * and may serve as a control status ack
580          */
581         for (;;) {
582                 int this_qtd_len;
583
584                 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
585                 len -= this_qtd_len;
586                 buf += this_qtd_len;
587
588                 /*
589                  * short reads advance to a "magic" dummy instead of the next
590                  * qtd ... that forces the queue to stop, for manual cleanup.
591                  * (this will usually be overridden later.)
592                  */
593                 if (is_input)
594                         qtd->hw_alt_next = ehci->async->hw_alt_next;
595
596                 /* qh makes control packets use qtd toggle; maybe switch it */
597                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
598                         token ^= QTD_TOGGLE;
599
600                 if (likely (len <= 0))
601                         break;
602
603                 qtd_prev = qtd;
604                 qtd = ehci_qtd_alloc (ehci, flags);
605                 if (unlikely (!qtd))
606                         goto cleanup;
607                 qtd->urb = urb;
608                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
609                 list_add_tail (&qtd->qtd_list, head);
610         }
611
612         /*
613          * unless the caller requires manual cleanup after short reads,
614          * have the alt_next mechanism keep the queue running after the
615          * last data qtd (the only one, for control and most other cases).
616          */
617         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
618                                 || usb_pipecontrol (urb->pipe)))
619                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
620
621         /*
622          * control requests may need a terminating data "status" ack;
623          * bulk ones may need a terminating short packet (zero length).
624          */
625         if (likely (urb->transfer_buffer_length != 0)) {
626                 int     one_more = 0;
627
628                 if (usb_pipecontrol (urb->pipe)) {
629                         one_more = 1;
630                         token ^= 0x0100;        /* "in" <--> "out"  */
631                         token |= QTD_TOGGLE;    /* force DATA1 */
632                 } else if (usb_pipebulk (urb->pipe)
633                                 && (urb->transfer_flags & URB_ZERO_PACKET)
634                                 && !(urb->transfer_buffer_length % maxpacket)) {
635                         one_more = 1;
636                 }
637                 if (one_more) {
638                         qtd_prev = qtd;
639                         qtd = ehci_qtd_alloc (ehci, flags);
640                         if (unlikely (!qtd))
641                                 goto cleanup;
642                         qtd->urb = urb;
643                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
644                         list_add_tail (&qtd->qtd_list, head);
645
646                         /* never any data in such packets */
647                         qtd_fill(ehci, qtd, 0, 0, token, 0);
648                 }
649         }
650
651         /* by default, enable interrupt on urb completion */
652         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
653                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
654         return head;
655
656 cleanup:
657         qtd_list_free (ehci, urb, head);
658         return NULL;
659 }
660
661 /*-------------------------------------------------------------------------*/
662
663 // Would be best to create all qh's from config descriptors,
664 // when each interface/altsetting is established.  Unlink
665 // any previous qh and cancel its urbs first; endpoints are
666 // implicitly reset then (data toggle too).
667 // That'd mean updating how usbcore talks to HCDs. (2.7?)
668
669
670 /*
671  * Each QH holds a qtd list; a QH is used for everything except iso.
672  *
673  * For interrupt urbs, the scheduler must set the microframe scheduling
674  * mask(s) each time the QH gets scheduled.  For highspeed, that's
675  * just one microframe in the s-mask.  For split interrupt transactions
676  * there are additional complications: c-mask, maybe FSTNs.
677  */
678 static struct ehci_qh *
679 qh_make (
680         struct ehci_hcd         *ehci,
681         struct urb              *urb,
682         gfp_t                   flags
683 ) {
684         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
685         u32                     info1 = 0, info2 = 0;
686         int                     is_input, type;
687         int                     maxp = 0;
688         struct usb_tt           *tt = urb->dev->tt;
689
690         if (!qh)
691                 return qh;
692
693         /*
694          * init endpoint/device data for this QH
695          */
696         info1 |= usb_pipeendpoint (urb->pipe) << 8;
697         info1 |= usb_pipedevice (urb->pipe) << 0;
698
699         is_input = usb_pipein (urb->pipe);
700         type = usb_pipetype (urb->pipe);
701         maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
702
703         /* 1024 byte maxpacket is a hardware ceiling.  High bandwidth
704          * acts like up to 3KB, but is built from smaller packets.
705          */
706         if (max_packet(maxp) > 1024) {
707                 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
708                 goto done;
709         }
710
711         /* Compute interrupt scheduling parameters just once, and save.
712          * - allowing for high bandwidth, how many nsec/uframe are used?
713          * - split transactions need a second CSPLIT uframe; same question
714          * - splits also need a schedule gap (for full/low speed I/O)
715          * - qh has a polling interval
716          *
717          * For control/bulk requests, the HC or TT handles these.
718          */
719         if (type == PIPE_INTERRUPT) {
720                 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
721                                 is_input, 0,
722                                 hb_mult(maxp) * max_packet(maxp)));
723                 qh->start = NO_FRAME;
724
725                 if (urb->dev->speed == USB_SPEED_HIGH) {
726                         qh->c_usecs = 0;
727                         qh->gap_uf = 0;
728
729                         qh->period = urb->interval >> 3;
730                         if (qh->period == 0 && urb->interval != 1) {
731                                 /* NOTE interval 2 or 4 uframes could work.
732                                  * But interval 1 scheduling is simpler, and
733                                  * includes high bandwidth.
734                                  */
735                                 dbg ("intr period %d uframes, NYET!",
736                                                 urb->interval);
737                                 goto done;
738                         }
739                 } else {
740                         int             think_time;
741
742                         /* gap is f(FS/LS transfer times) */
743                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
744                                         is_input, 0, maxp) / (125 * 1000);
745
746                         /* FIXME this just approximates SPLIT/CSPLIT times */
747                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
748                                 qh->c_usecs = qh->usecs + HS_USECS (0);
749                                 qh->usecs = HS_USECS (1);
750                         } else {                // SPLIT+DATA, gap, CSPLIT
751                                 qh->usecs += HS_USECS (1);
752                                 qh->c_usecs = HS_USECS (0);
753                         }
754
755                         think_time = tt ? tt->think_time : 0;
756                         qh->tt_usecs = NS_TO_US (think_time +
757                                         usb_calc_bus_time (urb->dev->speed,
758                                         is_input, 0, max_packet (maxp)));
759                         qh->period = urb->interval;
760                 }
761         }
762
763         /* support for tt scheduling, and access to toggles */
764         qh->dev = urb->dev;
765
766         /* using TT? */
767         switch (urb->dev->speed) {
768         case USB_SPEED_LOW:
769                 info1 |= (1 << 12);     /* EPS "low" */
770                 /* FALL THROUGH */
771
772         case USB_SPEED_FULL:
773                 /* EPS 0 means "full" */
774                 if (type != PIPE_INTERRUPT)
775                         info1 |= (EHCI_TUNE_RL_TT << 28);
776                 if (type == PIPE_CONTROL) {
777                         info1 |= (1 << 27);     /* for TT */
778                         info1 |= 1 << 14;       /* toggle from qtd */
779                 }
780                 info1 |= maxp << 16;
781
782                 info2 |= (EHCI_TUNE_MULT_TT << 30);
783
784                 /* Some Freescale processors have an erratum in which the
785                  * port number in the queue head was 0..N-1 instead of 1..N.
786                  */
787                 if (ehci_has_fsl_portno_bug(ehci))
788                         info2 |= (urb->dev->ttport-1) << 23;
789                 else
790                         info2 |= urb->dev->ttport << 23;
791
792                 /* set the address of the TT; for TDI's integrated
793                  * root hub tt, leave it zeroed.
794                  */
795                 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
796                         info2 |= tt->hub->devnum << 16;
797
798                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
799
800                 break;
801
802         case USB_SPEED_HIGH:            /* no TT involved */
803                 info1 |= (2 << 12);     /* EPS "high" */
804                 if (type == PIPE_CONTROL) {
805                         info1 |= (EHCI_TUNE_RL_HS << 28);
806                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
807                         info1 |= 1 << 14;       /* toggle from qtd */
808                         info2 |= (EHCI_TUNE_MULT_HS << 30);
809                 } else if (type == PIPE_BULK) {
810                         info1 |= (EHCI_TUNE_RL_HS << 28);
811                         /* The USB spec says that high speed bulk endpoints
812                          * always use 512 byte maxpacket.  But some device
813                          * vendors decided to ignore that, and MSFT is happy
814                          * to help them do so.  So now people expect to use
815                          * such nonconformant devices with Linux too; sigh.
816                          */
817                         info1 |= max_packet(maxp) << 16;
818                         info2 |= (EHCI_TUNE_MULT_HS << 30);
819                 } else {                /* PIPE_INTERRUPT */
820                         info1 |= max_packet (maxp) << 16;
821                         info2 |= hb_mult (maxp) << 30;
822                 }
823                 break;
824         default:
825                 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
826 done:
827                 qh_put (qh);
828                 return NULL;
829         }
830
831         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
832
833         /* init as live, toggle clear, advance to dummy */
834         qh->qh_state = QH_STATE_IDLE;
835         qh->hw_info1 = cpu_to_hc32(ehci, info1);
836         qh->hw_info2 = cpu_to_hc32(ehci, info2);
837         qh_refresh (ehci, qh);
838         return qh;
839 }
840
841 /*-------------------------------------------------------------------------*/
842
843 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
844
845 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
846 {
847         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
848         struct ehci_qh  *head;
849
850         /* (re)start the async schedule? */
851         head = ehci->async;
852         timer_action_done (ehci, TIMER_ASYNC_OFF);
853         if (!head->qh_next.qh) {
854                 u32     cmd = ehci_readl(ehci, &ehci->regs->command);
855
856                 if (!(cmd & CMD_ASE)) {
857                         /* in case a clear of CMD_ASE didn't take yet */
858                         (void)handshake(ehci, &ehci->regs->status,
859                                         STS_ASS, 0, 150);
860                         cmd |= CMD_ASE | CMD_RUN;
861                         ehci_writel(ehci, cmd, &ehci->regs->command);
862                         ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
863                         /* posted write need not be known to HC yet ... */
864                 }
865         }
866
867         /* clear halt and maybe recover from silicon quirk */
868         if (qh->qh_state == QH_STATE_IDLE)
869                 qh_refresh (ehci, qh);
870
871         /* splice right after start */
872         qh->qh_next = head->qh_next;
873         qh->hw_next = head->hw_next;
874         wmb ();
875
876         head->qh_next.qh = qh;
877         head->hw_next = dma;
878
879         qh->xacterrs = QH_XACTERR_MAX;
880         qh->qh_state = QH_STATE_LINKED;
881         /* qtd completions reported later by interrupt */
882 }
883
884 /*-------------------------------------------------------------------------*/
885
886 /*
887  * For control/bulk/interrupt, return QH with these TDs appended.
888  * Allocates and initializes the QH if necessary.
889  * Returns null if it can't allocate a QH it needs to.
890  * If the QH has TDs (urbs) already, that's great.
891  */
892 static struct ehci_qh *qh_append_tds (
893         struct ehci_hcd         *ehci,
894         struct urb              *urb,
895         struct list_head        *qtd_list,
896         int                     epnum,
897         void                    **ptr
898 )
899 {
900         struct ehci_qh          *qh = NULL;
901         __hc32                  qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
902
903         qh = (struct ehci_qh *) *ptr;
904         if (unlikely (qh == NULL)) {
905                 /* can't sleep here, we have ehci->lock... */
906                 qh = qh_make (ehci, urb, GFP_ATOMIC);
907                 *ptr = qh;
908         }
909         if (likely (qh != NULL)) {
910                 struct ehci_qtd *qtd;
911
912                 if (unlikely (list_empty (qtd_list)))
913                         qtd = NULL;
914                 else
915                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
916                                         qtd_list);
917
918                 /* control qh may need patching ... */
919                 if (unlikely (epnum == 0)) {
920
921                         /* usb_reset_device() briefly reverts to address 0 */
922                         if (usb_pipedevice (urb->pipe) == 0)
923                                 qh->hw_info1 &= ~qh_addr_mask;
924                 }
925
926                 /* just one way to queue requests: swap with the dummy qtd.
927                  * only hc or qh_refresh() ever modify the overlay.
928                  */
929                 if (likely (qtd != NULL)) {
930                         struct ehci_qtd         *dummy;
931                         dma_addr_t              dma;
932                         __hc32                  token;
933
934                         /* to avoid racing the HC, use the dummy td instead of
935                          * the first td of our list (becomes new dummy).  both
936                          * tds stay deactivated until we're done, when the
937                          * HC is allowed to fetch the old dummy (4.10.2).
938                          */
939                         token = qtd->hw_token;
940                         qtd->hw_token = HALT_BIT(ehci);
941                         wmb ();
942                         dummy = qh->dummy;
943
944                         dma = dummy->qtd_dma;
945                         *dummy = *qtd;
946                         dummy->qtd_dma = dma;
947
948                         list_del (&qtd->qtd_list);
949                         list_add (&dummy->qtd_list, qtd_list);
950                         list_splice_tail(qtd_list, &qh->qtd_list);
951
952                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
953                         qh->dummy = qtd;
954
955                         /* hc must see the new dummy at list end */
956                         dma = qtd->qtd_dma;
957                         qtd = list_entry (qh->qtd_list.prev,
958                                         struct ehci_qtd, qtd_list);
959                         qtd->hw_next = QTD_NEXT(ehci, dma);
960
961                         /* let the hc process these next qtds */
962                         wmb ();
963                         dummy->hw_token = token;
964
965                         urb->hcpriv = qh_get (qh);
966                 }
967         }
968         return qh;
969 }
970
971 /*-------------------------------------------------------------------------*/
972
973 static int
974 submit_async (
975         struct ehci_hcd         *ehci,
976         struct urb              *urb,
977         struct list_head        *qtd_list,
978         gfp_t                   mem_flags
979 ) {
980         struct ehci_qtd         *qtd;
981         int                     epnum;
982         unsigned long           flags;
983         struct ehci_qh          *qh = NULL;
984         int                     rc;
985
986         qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
987         epnum = urb->ep->desc.bEndpointAddress;
988
989 #ifdef EHCI_URB_TRACE
990         ehci_dbg (ehci,
991                 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
992                 __func__, urb->dev->devpath, urb,
993                 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
994                 urb->transfer_buffer_length,
995                 qtd, urb->ep->hcpriv);
996 #endif
997
998         spin_lock_irqsave (&ehci->lock, flags);
999         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1000                                &ehci_to_hcd(ehci)->flags))) {
1001                 rc = -ESHUTDOWN;
1002                 goto done;
1003         }
1004         rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1005         if (unlikely(rc))
1006                 goto done;
1007
1008         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1009         if (unlikely(qh == NULL)) {
1010                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1011                 rc = -ENOMEM;
1012                 goto done;
1013         }
1014
1015         /* Control/bulk operations through TTs don't need scheduling,
1016          * the HC and TT handle it when the TT has a buffer ready.
1017          */
1018         if (likely (qh->qh_state == QH_STATE_IDLE))
1019                 qh_link_async (ehci, qh_get (qh));
1020  done:
1021         spin_unlock_irqrestore (&ehci->lock, flags);
1022         if (unlikely (qh == NULL))
1023                 qtd_list_free (ehci, urb, qtd_list);
1024         return rc;
1025 }
1026
1027 /*-------------------------------------------------------------------------*/
1028
1029 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
1030
1031 static void end_unlink_async (struct ehci_hcd *ehci)
1032 {
1033         struct ehci_qh          *qh = ehci->reclaim;
1034         struct ehci_qh          *next;
1035
1036         iaa_watchdog_done(ehci);
1037
1038         // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1039         qh->qh_state = QH_STATE_IDLE;
1040         qh->qh_next.qh = NULL;
1041         qh_put (qh);                    // refcount from reclaim
1042
1043         /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1044         next = qh->reclaim;
1045         ehci->reclaim = next;
1046         qh->reclaim = NULL;
1047
1048         qh_completions (ehci, qh);
1049
1050         if (!list_empty (&qh->qtd_list)
1051                         && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1052                 qh_link_async (ehci, qh);
1053         else {
1054                 qh_put (qh);            // refcount from async list
1055
1056                 /* it's not free to turn the async schedule on/off; leave it
1057                  * active but idle for a while once it empties.
1058                  */
1059                 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1060                                 && ehci->async->qh_next.qh == NULL)
1061                         timer_action (ehci, TIMER_ASYNC_OFF);
1062         }
1063
1064         if (next) {
1065                 ehci->reclaim = NULL;
1066                 start_unlink_async (ehci, next);
1067         }
1068 }
1069
1070 /* makes sure the async qh will become idle */
1071 /* caller must own ehci->lock */
1072
1073 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1074 {
1075         int             cmd = ehci_readl(ehci, &ehci->regs->command);
1076         struct ehci_qh  *prev;
1077
1078 #ifdef DEBUG
1079         assert_spin_locked(&ehci->lock);
1080         if (ehci->reclaim
1081                         || (qh->qh_state != QH_STATE_LINKED
1082                                 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1083                         )
1084                 BUG ();
1085 #endif
1086
1087         /* stop async schedule right now? */
1088         if (unlikely (qh == ehci->async)) {
1089                 /* can't get here without STS_ASS set */
1090                 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1091                                 && !ehci->reclaim) {
1092                         /* ... and CMD_IAAD clear */
1093                         ehci_writel(ehci, cmd & ~CMD_ASE,
1094                                     &ehci->regs->command);
1095                         wmb ();
1096                         // handshake later, if we need to
1097                         timer_action_done (ehci, TIMER_ASYNC_OFF);
1098                 }
1099                 return;
1100         }
1101
1102         qh->qh_state = QH_STATE_UNLINK;
1103         ehci->reclaim = qh = qh_get (qh);
1104
1105         prev = ehci->async;
1106         while (prev->qh_next.qh != qh)
1107                 prev = prev->qh_next.qh;
1108
1109         prev->hw_next = qh->hw_next;
1110         prev->qh_next = qh->qh_next;
1111         wmb ();
1112
1113         /* If the controller isn't running, we don't have to wait for it */
1114         if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
1115                 /* if (unlikely (qh->reclaim != 0))
1116                  *      this will recurse, probably not much
1117                  */
1118                 end_unlink_async (ehci);
1119                 return;
1120         }
1121
1122         cmd |= CMD_IAAD;
1123         ehci_writel(ehci, cmd, &ehci->regs->command);
1124         (void)ehci_readl(ehci, &ehci->regs->command);
1125         iaa_watchdog_start(ehci);
1126 }
1127
1128 /*-------------------------------------------------------------------------*/
1129
1130 static void scan_async (struct ehci_hcd *ehci)
1131 {
1132         struct ehci_qh          *qh;
1133         enum ehci_timer_action  action = TIMER_IO_WATCHDOG;
1134
1135         ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
1136         timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1137 rescan:
1138         qh = ehci->async->qh_next.qh;
1139         if (likely (qh != NULL)) {
1140                 do {
1141                         /* clean any finished work for this qh */
1142                         if (!list_empty (&qh->qtd_list)
1143                                         && qh->stamp != ehci->stamp) {
1144                                 int temp;
1145
1146                                 /* unlinks could happen here; completion
1147                                  * reporting drops the lock.  rescan using
1148                                  * the latest schedule, but don't rescan
1149                                  * qhs we already finished (no looping).
1150                                  */
1151                                 qh = qh_get (qh);
1152                                 qh->stamp = ehci->stamp;
1153                                 temp = qh_completions (ehci, qh);
1154                                 qh_put (qh);
1155                                 if (temp != 0) {
1156                                         goto rescan;
1157                                 }
1158                         }
1159
1160                         /* unlink idle entries, reducing DMA usage as well
1161                          * as HCD schedule-scanning costs.  delay for any qh
1162                          * we just scanned, there's a not-unusual case that it
1163                          * doesn't stay idle for long.
1164                          * (plus, avoids some kind of re-activation race.)
1165                          */
1166                         if (list_empty(&qh->qtd_list)
1167                                         && qh->qh_state == QH_STATE_LINKED) {
1168                                 if (!ehci->reclaim
1169                                         && ((ehci->stamp - qh->stamp) & 0x1fff)
1170                                                 >= (EHCI_SHRINK_FRAMES * 8))
1171                                         start_unlink_async(ehci, qh);
1172                                 else
1173                                         action = TIMER_ASYNC_SHRINK;
1174                         }
1175
1176                         qh = qh->qh_next.qh;
1177                 } while (qh);
1178         }
1179         if (action == TIMER_ASYNC_SHRINK)
1180                 timer_action (ehci, TIMER_ASYNC_SHRINK);
1181 }