writeback: fix periodic superblock dirty inode flushing
[linux-2.6] / include / asm-arm / arch-pxa / pxafb.h
1 /*
2  *  linux/include/asm-arm/arch-pxa/pxafb.h
3  *
4  *  Support for the xscale frame buffer.
5  *
6  *  Author:     Jean-Frederic Clere
7  *  Created:    Sep 22, 2003
8  *  Copyright:  jfclere@sinix.net
9  *
10  *  This program is free software; you can redistribute it and/or modify
11  *  it under the terms of the GNU General Public License version 2 as
12  *  published by the Free Software Foundation.
13  */
14
15 #include <linux/fb.h>
16
17 /*
18  * This structure describes the machine which we are running on.
19  * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine
20  * of linux/drivers/video/pxafb.c
21  */
22 struct pxafb_mode_info {
23         u_long          pixclock;
24
25         u_short         xres;
26         u_short         yres;
27
28         u_char          bpp;
29         u_char          hsync_len;
30         u_char          left_margin;
31         u_char          right_margin;
32
33         u_char          vsync_len;
34         u_char          upper_margin;
35         u_char          lower_margin;
36         u_char          sync;
37
38         u_int           cmap_greyscale:1,
39                         unused:31;
40 };
41
42 struct pxafb_mach_info {
43         struct pxafb_mode_info *modes;
44         unsigned int num_modes;
45
46         u_int           fixed_modes:1,
47                         cmap_inverse:1,
48                         cmap_static:1,
49                         unused:29;
50
51         /* The following should be defined in LCCR0
52          *      LCCR0_Act or LCCR0_Pas          Active or Passive
53          *      LCCR0_Sngl or LCCR0_Dual        Single/Dual panel
54          *      LCCR0_Mono or LCCR0_Color       Mono/Color
55          *      LCCR0_4PixMono or LCCR0_8PixMono (in mono single mode)
56          *      LCCR0_DMADel(Tcpu) (optional)   DMA request delay
57          *
58          * The following should not be defined in LCCR0:
59          *      LCCR0_OUM, LCCR0_BM, LCCR0_QDM, LCCR0_DIS, LCCR0_EFM
60          *      LCCR0_IUM, LCCR0_SFM, LCCR0_LDM, LCCR0_ENB
61          */
62         u_int           lccr0;
63         /* The following should be defined in LCCR3
64          *      LCCR3_OutEnH or LCCR3_OutEnL    Output enable polarity
65          *      LCCR3_PixRsEdg or LCCR3_PixFlEdg Pixel clock edge type
66          *      LCCR3_Acb(X)                    AB Bias pin frequency
67          *      LCCR3_DPC (optional)            Double Pixel Clock mode (untested)
68          *
69          * The following should not be defined in LCCR3
70          *      LCCR3_HSP, LCCR3_VSP, LCCR0_Pcd(x), LCCR3_Bpp
71          */
72         u_int           lccr3;
73         /* The following should be defined in LCCR4
74          *      LCCR4_PAL_FOR_0 or LCCR4_PAL_FOR_1 or LCCR4_PAL_FOR_2
75          *
76          * All other bits in LCCR4 should be left alone.
77          */
78         u_int           lccr4;
79         void (*pxafb_backlight_power)(int);
80         void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
81
82 };
83 void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info);
84 void set_pxa_fb_parent(struct device *parent_dev);
85 unsigned long pxafb_get_hsync_time(struct device *dev);