git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/config.h>
  19 #include <linux/kernel.h>
  20 #include <linux/types.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/bootmem.h>
  24 #include <linux/module.h>
  25
  26 #include <asm/prom.h>
  27 #include <asm/of_device.h>
  28 #include <asm/oplib.h>
  29 #include <asm/irq.h>
  30 #include <asm/asi.h>
  31 #include <asm/upa.h>
  32
  33 static struct device_node *allnodes;
  34
  35 /* use when traversing tree through the allnext, child, sibling,
  36  * or parent members of struct device_node.
  37  */
  38 static DEFINE_RWLOCK(devtree_lock);
  39
  40 int of_device_is_compatible(struct device_node *device, const char *compat)
  41 {
  42         const char* cp;
  43         int cplen, l;
  44
  45         cp = (char *) of_get_property(device, "compatible", &cplen);
  46         if (cp == NULL)
  47                 return 0;
  48         while (cplen > 0) {
  49                 if (strncmp(cp, compat, strlen(compat)) == 0)
  50                         return 1;
  51                 l = strlen(cp) + 1;
  52                 cp += l;
  53                 cplen -= l;
  54         }
  55
  56         return 0;
  57 }
  58 EXPORT_SYMBOL(of_device_is_compatible);
  59
  60 struct device_node *of_get_parent(const struct device_node *node)
  61 {
  62         struct device_node *np;
  63
  64         if (!node)
  65                 return NULL;
  66
  67         np = node->parent;
  68
  69         return np;
  70 }
  71 EXPORT_SYMBOL(of_get_parent);
  72
  73 struct device_node *of_get_next_child(const struct device_node *node,
  74         struct device_node *prev)
  75 {
  76         struct device_node *next;
  77
  78         next = prev ? prev->sibling : node->child;
  79         for (; next != 0; next = next->sibling) {
  80                 break;
  81         }
  82
  83         return next;
  84 }
  85 EXPORT_SYMBOL(of_get_next_child);
  86
  87 struct device_node *of_find_node_by_path(const char *path)
  88 {
  89         struct device_node *np = allnodes;
  90
  91         for (; np != 0; np = np->allnext) {
  92                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  93                         break;
  94         }
  95
  96         return np;
  97 }
  98 EXPORT_SYMBOL(of_find_node_by_path);
  99
 100 struct device_node *of_find_node_by_phandle(phandle handle)
 101 {
 102         struct device_node *np;
 103
 104         for (np = allnodes; np != 0; np = np->allnext)
 105                 if (np->node == handle)
 106                         break;
 107
 108         return np;
 109 }
 110 EXPORT_SYMBOL(of_find_node_by_phandle);
 111
 112 struct device_node *of_find_node_by_name(struct device_node *from,
 113         const char *name)
 114 {
 115         struct device_node *np;
 116
 117         np = from ? from->allnext : allnodes;
 118         for (; np != NULL; np = np->allnext)
 119                 if (np->name != NULL && strcmp(np->name, name) == 0)
 120                         break;
 121
 122         return np;
 123 }
 124 EXPORT_SYMBOL(of_find_node_by_name);
 125
 126 struct device_node *of_find_node_by_type(struct device_node *from,
 127         const char *type)
 128 {
 129         struct device_node *np;
 130
 131         np = from ? from->allnext : allnodes;
 132         for (; np != 0; np = np->allnext)
 133                 if (np->type != 0 && strcmp(np->type, type) == 0)
 134                         break;
 135
 136         return np;
 137 }
 138 EXPORT_SYMBOL(of_find_node_by_type);
 139
 140 struct device_node *of_find_compatible_node(struct device_node *from,
 141         const char *type, const char *compatible)
 142 {
 143         struct device_node *np;
 144
 145         np = from ? from->allnext : allnodes;
 146         for (; np != 0; np = np->allnext) {
 147                 if (type != NULL
 148                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 149                         continue;
 150                 if (of_device_is_compatible(np, compatible))
 151                         break;
 152         }
 153
 154         return np;
 155 }
 156 EXPORT_SYMBOL(of_find_compatible_node);
 157
 158 struct property *of_find_property(struct device_node *np, const char *name,
 159                                   int *lenp)
 160 {
 161         struct property *pp;
 162
 163         for (pp = np->properties; pp != 0; pp = pp->next) {
 164                 if (strcmp(pp->name, name) == 0) {
 165                         if (lenp != 0)
 166                                 *lenp = pp->length;
 167                         break;
 168                 }
 169         }
 170         return pp;
 171 }
 172 EXPORT_SYMBOL(of_find_property);
 173
 174 /*
 175  * Find a property with a given name for a given node
 176  * and return the value.
 177  */
 178 void *of_get_property(struct device_node *np, const char *name, int *lenp)
 179 {
 180         struct property *pp = of_find_property(np,name,lenp);
 181         return pp ? pp->value : NULL;
 182 }
 183 EXPORT_SYMBOL(of_get_property);
 184
 185 int of_getintprop_default(struct device_node *np, const char *name, int def)
 186 {
 187         struct property *prop;
 188         int len;
 189
 190         prop = of_find_property(np, name, &len);
 191         if (!prop || len != 4)
 192                 return def;
 193
 194         return *(int *) prop->value;
 195 }
 196 EXPORT_SYMBOL(of_getintprop_default);
 197
 198 int of_n_addr_cells(struct device_node *np)
 199 {
 200         int* ip;
 201         do {
 202                 if (np->parent)
 203                         np = np->parent;
 204                 ip = of_get_property(np, "#address-cells", NULL);
 205                 if (ip != NULL)
 206                         return *ip;
 207         } while (np->parent);
 208         /* No #address-cells property for the root node, default to 2 */
 209         return 2;
 210 }
 211 EXPORT_SYMBOL(of_n_addr_cells);
 212
 213 int of_n_size_cells(struct device_node *np)
 214 {
 215         int* ip;
 216         do {
 217                 if (np->parent)
 218                         np = np->parent;
 219                 ip = of_get_property(np, "#size-cells", NULL);
 220                 if (ip != NULL)
 221                         return *ip;
 222         } while (np->parent);
 223         /* No #size-cells property for the root node, default to 1 */
 224         return 1;
 225 }
 226 EXPORT_SYMBOL(of_n_size_cells);
 227
 228 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 229 {
 230         struct property **prevp;
 231         void *new_val;
 232         int err;
 233
 234         new_val = kmalloc(len, GFP_KERNEL);
 235         if (!new_val)
 236                 return -ENOMEM;
 237
 238         memcpy(new_val, val, len);
 239
 240         err = -ENODEV;
 241
 242         write_lock(&devtree_lock);
 243         prevp = &dp->properties;
 244         while (*prevp) {
 245                 struct property *prop = *prevp;
 246
 247                 if (!strcmp(prop->name, name)) {
 248                         void *old_val = prop->value;
 249                         int ret;
 250
 251                         ret = prom_setprop(dp->node, name, val, len);
 252                         err = -EINVAL;
 253                         if (ret >= 0) {
 254                                 prop->value = new_val;
 255                                 prop->length = len;
 256
 257                                 if (OF_IS_DYNAMIC(prop))
 258                                         kfree(old_val);
 259
 260                                 OF_MARK_DYNAMIC(prop);
 261
 262                                 err = 0;
 263                         }
 264                         break;
 265                 }
 266                 prevp = &(*prevp)->next;
 267         }
 268         write_unlock(&devtree_lock);
 269
 270         /* XXX Upate procfs if necessary... */
 271
 272         return err;
 273 }
 274 EXPORT_SYMBOL(of_set_property);
 275
 276 static unsigned int prom_early_allocated;
 277
 278 static void * __init prom_early_alloc(unsigned long size)
 279 {
 280         void *ret;
 281
 282         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 283         if (ret != NULL)
 284                 memset(ret, 0, size);
 285
 286         prom_early_allocated += size;
 287
 288         return ret;
 289 }
 290
 291 #ifdef CONFIG_PCI
 292 /* PSYCHO interrupt mapping support. */
 293 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 294 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 295 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 296 {
 297         unsigned int bus =  (ino & 0x10) >> 4;
 298         unsigned int slot = (ino & 0x0c) >> 2;
 299
 300         if (bus == 0)
 301                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 302         else
 303                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 304 }
 305
 306 #define PSYCHO_IMAP_SCSI        0x1000UL
 307 #define PSYCHO_IMAP_ETH         0x1008UL
 308 #define PSYCHO_IMAP_BPP         0x1010UL
 309 #define PSYCHO_IMAP_AU_REC      0x1018UL
 310 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 311 #define PSYCHO_IMAP_PFAIL       0x1028UL
 312 #define PSYCHO_IMAP_KMS         0x1030UL
 313 #define PSYCHO_IMAP_FLPY        0x1038UL
 314 #define PSYCHO_IMAP_SHW         0x1040UL
 315 #define PSYCHO_IMAP_KBD         0x1048UL
 316 #define PSYCHO_IMAP_MS          0x1050UL
 317 #define PSYCHO_IMAP_SER         0x1058UL
 318 #define PSYCHO_IMAP_TIM0        0x1060UL
 319 #define PSYCHO_IMAP_TIM1        0x1068UL
 320 #define PSYCHO_IMAP_UE          0x1070UL
 321 #define PSYCHO_IMAP_CE          0x1078UL
 322 #define PSYCHO_IMAP_A_ERR       0x1080UL
 323 #define PSYCHO_IMAP_B_ERR       0x1088UL
 324 #define PSYCHO_IMAP_PMGMT       0x1090UL
 325 #define PSYCHO_IMAP_GFX         0x1098UL
 326 #define PSYCHO_IMAP_EUPA        0x10a0UL
 327
 328 static unsigned long __psycho_onboard_imap_off[] = {
 329 /*0x20*/        PSYCHO_IMAP_SCSI,
 330 /*0x21*/        PSYCHO_IMAP_ETH,
 331 /*0x22*/        PSYCHO_IMAP_BPP,
 332 /*0x23*/        PSYCHO_IMAP_AU_REC,
 333 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 334 /*0x25*/        PSYCHO_IMAP_PFAIL,
 335 /*0x26*/        PSYCHO_IMAP_KMS,
 336 /*0x27*/        PSYCHO_IMAP_FLPY,
 337 /*0x28*/        PSYCHO_IMAP_SHW,
 338 /*0x29*/        PSYCHO_IMAP_KBD,
 339 /*0x2a*/        PSYCHO_IMAP_MS,
 340 /*0x2b*/        PSYCHO_IMAP_SER,
 341 /*0x2c*/        PSYCHO_IMAP_TIM0,
 342 /*0x2d*/        PSYCHO_IMAP_TIM1,
 343 /*0x2e*/        PSYCHO_IMAP_UE,
 344 /*0x2f*/        PSYCHO_IMAP_CE,
 345 /*0x30*/        PSYCHO_IMAP_A_ERR,
 346 /*0x31*/        PSYCHO_IMAP_B_ERR,
 347 /*0x32*/        PSYCHO_IMAP_PMGMT
 348 };
 349 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 350 #define PSYCHO_ONBOARD_IRQ_LAST         0x32
 351 #define psycho_onboard_imap_offset(__ino) \
 352         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 353
 354 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 355 #define PSYCHO_ICLR_SCSI        0x1800UL
 356
 357 #define psycho_iclr_offset(ino)                                       \
 358         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 359                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 360
 361 static unsigned int psycho_irq_build(struct device_node *dp,
 362                                      unsigned int ino,
 363                                      void *_data)
 364 {
 365         unsigned long controller_regs = (unsigned long) _data;
 366         unsigned long imap, iclr;
 367         unsigned long imap_off, iclr_off;
 368         int inofixup = 0;
 369
 370         ino &= 0x3f;
 371         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 372                 /* PCI slot */
 373                 imap_off = psycho_pcislot_imap_offset(ino);
 374         } else {
 375                 /* Onboard device */
 376                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 377                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 378                         prom_halt();
 379                 }
 380                 imap_off = psycho_onboard_imap_offset(ino);
 381         }
 382
 383         /* Now build the IRQ bucket. */
 384         imap = controller_regs + imap_off;
 385         imap += 4;
 386
 387         iclr_off = psycho_iclr_offset(ino);
 388         iclr = controller_regs + iclr_off;
 389         iclr += 4;
 390
 391         if ((ino & 0x20) == 0)
 392                 inofixup = ino & 0x03;
 393
 394         return build_irq(inofixup, iclr, imap);
 395 }
 396
 397 static void psycho_irq_trans_init(struct device_node *dp)
 398 {
 399         struct linux_prom64_registers *regs;
 400
 401         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 402         dp->irq_trans->irq_build = psycho_irq_build;
 403
 404         regs = of_get_property(dp, "reg", NULL);
 405         dp->irq_trans->data = (void *) regs[2].phys_addr;
 406 }
 407
 408 #define sabre_read(__reg) \
 409 ({      u64 __ret; \
 410         __asm__ __volatile__("ldxa [%1] %2, %0" \
 411                              : "=r" (__ret) \
 412                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 413                              : "memory"); \
 414         __ret; \
 415 })
 416
 417 struct sabre_irq_data {
 418         unsigned long controller_regs;
 419         unsigned int pci_first_busno;
 420 };
 421 #define SABRE_CONFIGSPACE       0x001000000UL
 422 #define SABRE_WRSYNC            0x1c20UL
 423
 424 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 425         (CONFIG_SPACE | (1UL << 24))
 426 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 427         (((unsigned long)(BUS)   << 16) |       \
 428          ((unsigned long)(DEVFN) << 8)  |       \
 429          ((unsigned long)(REG)))
 430
 431 /* When a device lives behind a bridge deeper in the PCI bus topology
 432  * than APB, a special sequence must run to make sure all pending DMA
 433  * transfers at the time of IRQ delivery are visible in the coherency
 434  * domain by the cpu.  This sequence is to perform a read on the far
 435  * side of the non-APB bridge, then perform a read of Sabre's DMA
 436  * write-sync register.
 437  */
 438 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 439 {
 440         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 441         struct sabre_irq_data *irq_data = _arg2;
 442         unsigned long controller_regs = irq_data->controller_regs;
 443         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 444         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 445         unsigned int bus, devfn;
 446         u16 _unused;
 447
 448         config_space = SABRE_CONFIG_BASE(config_space);
 449
 450         bus = (phys_hi >> 16) & 0xff;
 451         devfn = (phys_hi >> 8) & 0xff;
 452
 453         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 454
 455         __asm__ __volatile__("membar #Sync\n\t"
 456                              "lduha [%1] %2, %0\n\t"
 457                              "membar #Sync"
 458                              : "=r" (_unused)
 459                              : "r" ((u16 *) config_space),
 460                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 461                              : "memory");
 462
 463         sabre_read(sync_reg);
 464 }
 465
 466 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 467 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 468 #define SABRE_IMAP_SCSI         0x1000UL
 469 #define SABRE_IMAP_ETH          0x1008UL
 470 #define SABRE_IMAP_BPP          0x1010UL
 471 #define SABRE_IMAP_AU_REC       0x1018UL
 472 #define SABRE_IMAP_AU_PLAY      0x1020UL
 473 #define SABRE_IMAP_PFAIL        0x1028UL
 474 #define SABRE_IMAP_KMS          0x1030UL
 475 #define SABRE_IMAP_FLPY         0x1038UL
 476 #define SABRE_IMAP_SHW          0x1040UL
 477 #define SABRE_IMAP_KBD          0x1048UL
 478 #define SABRE_IMAP_MS           0x1050UL
 479 #define SABRE_IMAP_SER          0x1058UL
 480 #define SABRE_IMAP_UE           0x1070UL
 481 #define SABRE_IMAP_CE           0x1078UL
 482 #define SABRE_IMAP_PCIERR       0x1080UL
 483 #define SABRE_IMAP_GFX          0x1098UL
 484 #define SABRE_IMAP_EUPA         0x10a0UL
 485 #define SABRE_ICLR_A_SLOT0      0x1400UL
 486 #define SABRE_ICLR_B_SLOT0      0x1480UL
 487 #define SABRE_ICLR_SCSI         0x1800UL
 488 #define SABRE_ICLR_ETH          0x1808UL
 489 #define SABRE_ICLR_BPP          0x1810UL
 490 #define SABRE_ICLR_AU_REC       0x1818UL
 491 #define SABRE_ICLR_AU_PLAY      0x1820UL
 492 #define SABRE_ICLR_PFAIL        0x1828UL
 493 #define SABRE_ICLR_KMS          0x1830UL
 494 #define SABRE_ICLR_FLPY         0x1838UL
 495 #define SABRE_ICLR_SHW          0x1840UL
 496 #define SABRE_ICLR_KBD          0x1848UL
 497 #define SABRE_ICLR_MS           0x1850UL
 498 #define SABRE_ICLR_SER          0x1858UL
 499 #define SABRE_ICLR_UE           0x1870UL
 500 #define SABRE_ICLR_CE           0x1878UL
 501 #define SABRE_ICLR_PCIERR       0x1880UL
 502
 503 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 504 {
 505         unsigned int bus =  (ino & 0x10) >> 4;
 506         unsigned int slot = (ino & 0x0c) >> 2;
 507
 508         if (bus == 0)
 509                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 510         else
 511                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 512 }
 513
 514 static unsigned long __sabre_onboard_imap_off[] = {
 515 /*0x20*/        SABRE_IMAP_SCSI,
 516 /*0x21*/        SABRE_IMAP_ETH,
 517 /*0x22*/        SABRE_IMAP_BPP,
 518 /*0x23*/        SABRE_IMAP_AU_REC,
 519 /*0x24*/        SABRE_IMAP_AU_PLAY,
 520 /*0x25*/        SABRE_IMAP_PFAIL,
 521 /*0x26*/        SABRE_IMAP_KMS,
 522 /*0x27*/        SABRE_IMAP_FLPY,
 523 /*0x28*/        SABRE_IMAP_SHW,
 524 /*0x29*/        SABRE_IMAP_KBD,
 525 /*0x2a*/        SABRE_IMAP_MS,
 526 /*0x2b*/        SABRE_IMAP_SER,
 527 /*0x2c*/        0 /* reserved */,
 528 /*0x2d*/        0 /* reserved */,
 529 /*0x2e*/        SABRE_IMAP_UE,
 530 /*0x2f*/        SABRE_IMAP_CE,
 531 /*0x30*/        SABRE_IMAP_PCIERR,
 532 };
 533 #define SABRE_ONBOARD_IRQ_BASE          0x20
 534 #define SABRE_ONBOARD_IRQ_LAST          0x30
 535 #define sabre_onboard_imap_offset(__ino) \
 536         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 537
 538 #define sabre_iclr_offset(ino)                                        \
 539         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 540                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 541
 542 static int sabre_device_needs_wsync(struct device_node *dp)
 543 {
 544         struct device_node *parent = dp->parent;
 545         char *parent_model, *parent_compat;
 546
 547         /* This traversal up towards the root is meant to
 548          * handle two cases:
 549          *
 550          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 551          * 2) the PCI controller interrupts themselves, which
 552          *    will use the sabre_irq_build but do not need
 553          *    the DMA synchronization handling
 554          */
 555         while (parent) {
 556                 if (!strcmp(parent->type, "pci"))
 557                         break;
 558                 parent = parent->parent;
 559         }
 560
 561         if (!parent)
 562                 return 0;
 563
 564         parent_model = of_get_property(parent,
 565                                        "model", NULL);
 566         if (parent_model &&
 567             (!strcmp(parent_model, "SUNW,sabre") ||
 568              !strcmp(parent_model, "SUNW,simba")))
 569                 return 0;
 570
 571         parent_compat = of_get_property(parent,
 572                                         "compatible", NULL);
 573         if (parent_compat &&
 574             (!strcmp(parent_compat, "pci108e,a000") ||
 575              !strcmp(parent_compat, "pci108e,a001")))
 576                 return 0;
 577
 578         return 1;
 579 }
 580
 581 static unsigned int sabre_irq_build(struct device_node *dp,
 582                                     unsigned int ino,
 583                                     void *_data)
 584 {
 585         struct sabre_irq_data *irq_data = _data;
 586         unsigned long controller_regs = irq_data->controller_regs;
 587         struct linux_prom_pci_registers *regs;
 588         unsigned long imap, iclr;
 589         unsigned long imap_off, iclr_off;
 590         int inofixup = 0;
 591         int virt_irq;
 592
 593         ino &= 0x3f;
 594         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 595                 /* PCI slot */
 596                 imap_off = sabre_pcislot_imap_offset(ino);
 597         } else {
 598                 /* onboard device */
 599                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 600                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 601                         prom_halt();
 602                 }
 603                 imap_off = sabre_onboard_imap_offset(ino);
 604         }
 605
 606         /* Now build the IRQ bucket. */
 607         imap = controller_regs + imap_off;
 608         imap += 4;
 609
 610         iclr_off = sabre_iclr_offset(ino);
 611         iclr = controller_regs + iclr_off;
 612         iclr += 4;
 613
 614         if ((ino & 0x20) == 0)
 615                 inofixup = ino & 0x03;
 616
 617         virt_irq = build_irq(inofixup, iclr, imap);
 618
 619         /* If the parent device is a PCI<->PCI bridge other than
 620          * APB, we have to install a pre-handler to ensure that
 621          * all pending DMA is drained before the interrupt handler
 622          * is run.
 623          */
 624         regs = of_get_property(dp, "reg", NULL);
 625         if (regs && sabre_device_needs_wsync(dp)) {
 626                 irq_install_pre_handler(virt_irq,
 627                                         sabre_wsync_handler,
 628                                         (void *) (long) regs->phys_hi,
 629                                         (void *) irq_data);
 630         }
 631
 632         return virt_irq;
 633 }
 634
 635 static void sabre_irq_trans_init(struct device_node *dp)
 636 {
 637         struct linux_prom64_registers *regs;
 638         struct sabre_irq_data *irq_data;
 639         u32 *busrange;
 640
 641         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 642         dp->irq_trans->irq_build = sabre_irq_build;
 643
 644         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 645
 646         regs = of_get_property(dp, "reg", NULL);
 647         irq_data->controller_regs = regs[0].phys_addr;
 648
 649         busrange = of_get_property(dp, "bus-range", NULL);
 650         irq_data->pci_first_busno = busrange[0];
 651
 652         dp->irq_trans->data = irq_data;
 653 }
 654
 655 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 656  * imap/iclr registers are per-PBM.
 657  */
 658 #define SCHIZO_IMAP_BASE        0x1000UL
 659 #define SCHIZO_ICLR_BASE        0x1400UL
 660
 661 static unsigned long schizo_imap_offset(unsigned long ino)
 662 {
 663         return SCHIZO_IMAP_BASE + (ino * 8UL);
 664 }
 665
 666 static unsigned long schizo_iclr_offset(unsigned long ino)
 667 {
 668         return SCHIZO_ICLR_BASE + (ino * 8UL);
 669 }
 670
 671 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 672                                         unsigned int ino)
 673 {
 674         return pbm_regs + schizo_iclr_offset(ino) + 4;
 675 }
 676
 677 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 678                                         unsigned int ino)
 679 {
 680         return pbm_regs + schizo_imap_offset(ino) + 4;
 681 }
 682
 683 #define schizo_read(__reg) \
 684 ({      u64 __ret; \
 685         __asm__ __volatile__("ldxa [%1] %2, %0" \
 686                              : "=r" (__ret) \
 687                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 688                              : "memory"); \
 689         __ret; \
 690 })
 691 #define schizo_write(__reg, __val) \
 692         __asm__ __volatile__("stxa %0, [%1] %2" \
 693                              : /* no outputs */ \
 694                              : "r" (__val), "r" (__reg), \
 695                                "i" (ASI_PHYS_BYPASS_EC_E) \
 696                              : "memory")
 697
 698 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 699 {
 700         unsigned long sync_reg = (unsigned long) _arg2;
 701         u64 mask = 1UL << (ino & IMAP_INO);
 702         u64 val;
 703         int limit;
 704
 705         schizo_write(sync_reg, mask);
 706
 707         limit = 100000;
 708         val = 0;
 709         while (--limit) {
 710                 val = schizo_read(sync_reg);
 711                 if (!(val & mask))
 712                         break;
 713         }
 714         if (limit <= 0) {
 715                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 716                        val, mask);
 717         }
 718
 719         if (_arg1) {
 720                 static unsigned char cacheline[64]
 721                         __attribute__ ((aligned (64)));
 722
 723                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 724                                      "or %0, %4, %1\n\t"
 725                                      "wr %1, 0x0, %%fprs\n\t"
 726                                      "stda %%f0, [%5] %6\n\t"
 727                                      "wr %0, 0x0, %%fprs\n\t"
 728                                      "membar #Sync"
 729                                      : "=&r" (mask), "=&r" (val)
 730                                      : "0" (mask), "1" (val),
 731                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 732                                      "i" (ASI_BLK_COMMIT_P));
 733         }
 734 }
 735
 736 struct schizo_irq_data {
 737         unsigned long pbm_regs;
 738         unsigned long sync_reg;
 739         u32 portid;
 740         int chip_version;
 741 };
 742
 743 static unsigned int schizo_irq_build(struct device_node *dp,
 744                                      unsigned int ino,
 745                                      void *_data)
 746 {
 747         struct schizo_irq_data *irq_data = _data;
 748         unsigned long pbm_regs = irq_data->pbm_regs;
 749         unsigned long imap, iclr;
 750         int ign_fixup;
 751         int virt_irq;
 752         int is_tomatillo;
 753
 754         ino &= 0x3f;
 755
 756         /* Now build the IRQ bucket. */
 757         imap = schizo_ino_to_imap(pbm_regs, ino);
 758         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 759
 760         /* On Schizo, no inofixup occurs.  This is because each
 761          * INO has it's own IMAP register.  On Psycho and Sabre
 762          * there is only one IMAP register for each PCI slot even
 763          * though four different INOs can be generated by each
 764          * PCI slot.
 765          *
 766          * But, for JBUS variants (essentially, Tomatillo), we have
 767          * to fixup the lowest bit of the interrupt group number.
 768          */
 769         ign_fixup = 0;
 770
 771         is_tomatillo = (irq_data->sync_reg != 0UL);
 772
 773         if (is_tomatillo) {
 774                 if (irq_data->portid & 1)
 775                         ign_fixup = (1 << 6);
 776         }
 777
 778         virt_irq = build_irq(ign_fixup, iclr, imap);
 779
 780         if (is_tomatillo) {
 781                 irq_install_pre_handler(virt_irq,
 782                                         tomatillo_wsync_handler,
 783                                         ((irq_data->chip_version <= 4) ?
 784                                          (void *) 1 : (void *) 0),
 785                                         (void *) irq_data->sync_reg);
 786         }
 787
 788         return virt_irq;
 789 }
 790
 791 static void schizo_irq_trans_init(struct device_node *dp)
 792 {
 793         struct linux_prom64_registers *regs;
 794         struct schizo_irq_data *irq_data;
 795
 796         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 797         dp->irq_trans->irq_build = schizo_irq_build;
 798
 799         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 800
 801         regs = of_get_property(dp, "reg", NULL);
 802         dp->irq_trans->data = irq_data;
 803
 804         irq_data->pbm_regs = regs[0].phys_addr;
 805         irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 806         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 807         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 808 }
 809
 810 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 811                                         unsigned int devino,
 812                                         void *_data)
 813 {
 814         u32 devhandle = (u32) (unsigned long) _data;
 815
 816         return sun4v_build_irq(devhandle, devino);
 817 }
 818
 819 static void pci_sun4v_irq_trans_init(struct device_node *dp)
 820 {
 821         struct linux_prom64_registers *regs;
 822
 823         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 824         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 825
 826         regs = of_get_property(dp, "reg", NULL);
 827         dp->irq_trans->data = (void *) (unsigned long)
 828                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 829 }
 830 #endif /* CONFIG_PCI */
 831
 832 #ifdef CONFIG_SBUS
 833 /* INO number to IMAP register offset for SYSIO external IRQ's.
 834  * This should conform to both Sunfire/Wildfire server and Fusion
 835  * desktop designs.
 836  */
 837 #define SYSIO_IMAP_SLOT0        0x2c04UL
 838 #define SYSIO_IMAP_SLOT1        0x2c0cUL
 839 #define SYSIO_IMAP_SLOT2        0x2c14UL
 840 #define SYSIO_IMAP_SLOT3        0x2c1cUL
 841 #define SYSIO_IMAP_SCSI         0x3004UL
 842 #define SYSIO_IMAP_ETH          0x300cUL
 843 #define SYSIO_IMAP_BPP          0x3014UL
 844 #define SYSIO_IMAP_AUDIO        0x301cUL
 845 #define SYSIO_IMAP_PFAIL        0x3024UL
 846 #define SYSIO_IMAP_KMS          0x302cUL
 847 #define SYSIO_IMAP_FLPY         0x3034UL
 848 #define SYSIO_IMAP_SHW          0x303cUL
 849 #define SYSIO_IMAP_KBD          0x3044UL
 850 #define SYSIO_IMAP_MS           0x304cUL
 851 #define SYSIO_IMAP_SER          0x3054UL
 852 #define SYSIO_IMAP_TIM0         0x3064UL
 853 #define SYSIO_IMAP_TIM1         0x306cUL
 854 #define SYSIO_IMAP_UE           0x3074UL
 855 #define SYSIO_IMAP_CE           0x307cUL
 856 #define SYSIO_IMAP_SBERR        0x3084UL
 857 #define SYSIO_IMAP_PMGMT        0x308cUL
 858 #define SYSIO_IMAP_GFX          0x3094UL
 859 #define SYSIO_IMAP_EUPA         0x309cUL
 860
 861 #define bogon     ((unsigned long) -1)
 862 static unsigned long sysio_irq_offsets[] = {
 863         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 864         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 865         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 866         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 867         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 868         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 869         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 870         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 871         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 872
 873         /* Onboard devices (not relevant/used on SunFire). */
 874         SYSIO_IMAP_SCSI,
 875         SYSIO_IMAP_ETH,
 876         SYSIO_IMAP_BPP,
 877         bogon,
 878         SYSIO_IMAP_AUDIO,
 879         SYSIO_IMAP_PFAIL,
 880         bogon,
 881         bogon,
 882         SYSIO_IMAP_KMS,
 883         SYSIO_IMAP_FLPY,
 884         SYSIO_IMAP_SHW,
 885         SYSIO_IMAP_KBD,
 886         SYSIO_IMAP_MS,
 887         SYSIO_IMAP_SER,
 888         bogon,
 889         bogon,
 890         SYSIO_IMAP_TIM0,
 891         SYSIO_IMAP_TIM1,
 892         bogon,
 893         bogon,
 894         SYSIO_IMAP_UE,
 895         SYSIO_IMAP_CE,
 896         SYSIO_IMAP_SBERR,
 897         SYSIO_IMAP_PMGMT,
 898 };
 899
 900 #undef bogon
 901
 902 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 903
 904 /* Convert Interrupt Mapping register pointer to associated
 905  * Interrupt Clear register pointer, SYSIO specific version.
 906  */
 907 #define SYSIO_ICLR_UNUSED0      0x3400UL
 908 #define SYSIO_ICLR_SLOT0        0x340cUL
 909 #define SYSIO_ICLR_SLOT1        0x344cUL
 910 #define SYSIO_ICLR_SLOT2        0x348cUL
 911 #define SYSIO_ICLR_SLOT3        0x34ccUL
 912 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 913 {
 914         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 915         return imap + diff;
 916 }
 917
 918 static unsigned int sbus_of_build_irq(struct device_node *dp,
 919                                       unsigned int ino,
 920                                       void *_data)
 921 {
 922         unsigned long reg_base = (unsigned long) _data;
 923         struct linux_prom_registers *regs;
 924         unsigned long imap, iclr;
 925         int sbus_slot = 0;
 926         int sbus_level = 0;
 927
 928         ino &= 0x3f;
 929
 930         regs = of_get_property(dp, "reg", NULL);
 931         if (regs)
 932                 sbus_slot = regs->which_io;
 933
 934         if (ino < 0x20)
 935                 ino += (sbus_slot * 8);
 936
 937         imap = sysio_irq_offsets[ino];
 938         if (imap == ((unsigned long)-1)) {
 939                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 940                             ino);
 941                 prom_halt();
 942         }
 943         imap += reg_base;
 944
 945         /* SYSIO inconsistency.  For external SLOTS, we have to select
 946          * the right ICLR register based upon the lower SBUS irq level
 947          * bits.
 948          */
 949         if (ino >= 0x20) {
 950                 iclr = sysio_imap_to_iclr(imap);
 951         } else {
 952                 sbus_level = ino & 0x7;
 953
 954                 switch(sbus_slot) {
 955                 case 0:
 956                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 957                         break;
 958                 case 1:
 959                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 960                         break;
 961                 case 2:
 962                         iclr = reg_base + SYSIO_ICLR_SLOT2;
 963                         break;
 964                 default:
 965                 case 3:
 966                         iclr = reg_base + SYSIO_ICLR_SLOT3;
 967                         break;
 968                 };
 969
 970                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
 971         }
 972         return build_irq(sbus_level, iclr, imap);
 973 }
 974
 975 static void sbus_irq_trans_init(struct device_node *dp)
 976 {
 977         struct linux_prom64_registers *regs;
 978
 979         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 980         dp->irq_trans->irq_build = sbus_of_build_irq;
 981
 982         regs = of_get_property(dp, "reg", NULL);
 983         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
 984 }
 985 #endif /* CONFIG_SBUS */
 986
 987
 988 static unsigned int central_build_irq(struct device_node *dp,
 989                                       unsigned int ino,
 990                                       void *_data)
 991 {
 992         struct device_node *central_dp = _data;
 993         struct of_device *central_op = of_find_device_by_node(central_dp);
 994         struct resource *res;
 995         unsigned long imap, iclr;
 996         u32 tmp;
 997
 998         if (!strcmp(dp->name, "eeprom")) {
 999                 res = &central_op->resource[5];
1000         } else if (!strcmp(dp->name, "zs")) {
1001                 res = &central_op->resource[4];
1002         } else if (!strcmp(dp->name, "clock-board")) {
1003                 res = &central_op->resource[3];
1004         } else {
1005                 return ino;
1006         }
1007
1008         imap = res->start + 0x00UL;
1009         iclr = res->start + 0x10UL;
1010
1011         /* Set the INO state to idle, and disable.  */
1012         upa_writel(0, iclr);
1013         upa_readl(iclr);
1014
1015         tmp = upa_readl(imap);
1016         tmp &= ~0x80000000;
1017         upa_writel(tmp, imap);
1018
1019         return build_irq(0, iclr, imap);
1020 }
1021
1022 static void central_irq_trans_init(struct device_node *dp)
1023 {
1024         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1025         dp->irq_trans->irq_build = central_build_irq;
1026
1027         dp->irq_trans->data = dp;
1028 }
1029
1030 struct irq_trans {
1031         const char *name;
1032         void (*init)(struct device_node *);
1033 };
1034
1035 #ifdef CONFIG_PCI
1036 static struct irq_trans pci_irq_trans_table[] = {
1037         { "SUNW,sabre", sabre_irq_trans_init },
1038         { "pci108e,a000", sabre_irq_trans_init },
1039         { "pci108e,a001", sabre_irq_trans_init },
1040         { "SUNW,psycho", psycho_irq_trans_init },
1041         { "pci108e,8000", psycho_irq_trans_init },
1042         { "SUNW,schizo", schizo_irq_trans_init },
1043         { "pci108e,8001", schizo_irq_trans_init },
1044         { "SUNW,schizo+", schizo_irq_trans_init },
1045         { "pci108e,8002", schizo_irq_trans_init },
1046         { "SUNW,tomatillo", schizo_irq_trans_init },
1047         { "pci108e,a801", schizo_irq_trans_init },
1048         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1049 };
1050 #endif
1051
1052 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1053                                          unsigned int devino,
1054                                          void *_data)
1055 {
1056         u32 devhandle = (u32) (unsigned long) _data;
1057
1058         return sun4v_build_irq(devhandle, devino);
1059 }
1060
1061 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1062 {
1063         struct linux_prom64_registers *regs;
1064
1065         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1066         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1067
1068         regs = of_get_property(dp, "reg", NULL);
1069         dp->irq_trans->data = (void *) (unsigned long)
1070                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1071 }
1072
1073 static void irq_trans_init(struct device_node *dp)
1074 {
1075         const char *model;
1076 #ifdef CONFIG_PCI
1077         int i;
1078 #endif
1079
1080         model = of_get_property(dp, "model", NULL);
1081         if (!model)
1082                 model = of_get_property(dp, "compatible", NULL);
1083         if (!model)
1084                 return;
1085
1086 #ifdef CONFIG_PCI
1087         for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1088                 struct irq_trans *t = &pci_irq_trans_table[i];
1089
1090                 if (!strcmp(model, t->name))
1091                         return t->init(dp);
1092         }
1093 #endif
1094 #ifdef CONFIG_SBUS
1095         if (!strcmp(dp->name, "sbus") ||
1096             !strcmp(dp->name, "sbi"))
1097                 return sbus_irq_trans_init(dp);
1098 #endif
1099         if (!strcmp(dp->name, "central"))
1100                 return central_irq_trans_init(dp->child);
1101         if (!strcmp(dp->name, "virtual-devices"))
1102                 return sun4v_vdev_irq_trans_init(dp);
1103 }
1104
1105 static int is_root_node(const struct device_node *dp)
1106 {
1107         if (!dp)
1108                 return 0;
1109
1110         return (dp->parent == NULL);
1111 }
1112
1113 /* The following routines deal with the black magic of fully naming a
1114  * node.
1115  *
1116  * Certain well known named nodes are just the simple name string.
1117  *
1118  * Actual devices have an address specifier appended to the base name
1119  * string, like this "foo@addr".  The "addr" can be in any number of
1120  * formats, and the platform plus the type of the node determine the
1121  * format and how it is constructed.
1122  *
1123  * For children of the ROOT node, the naming convention is fixed and
1124  * determined by whether this is a sun4u or sun4v system.
1125  *
1126  * For children of other nodes, it is bus type specific.  So
1127  * we walk up the tree until we discover a "device_type" property
1128  * we recognize and we go from there.
1129  *
1130  * As an example, the boot device on my workstation has a full path:
1131  *
1132  *      /pci@1e,600000/ide@d/disk@0,0:c
1133  */
1134 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1135 {
1136         struct linux_prom64_registers *regs;
1137         struct property *rprop;
1138         u32 high_bits, low_bits, type;
1139
1140         rprop = of_find_property(dp, "reg", NULL);
1141         if (!rprop)
1142                 return;
1143
1144         regs = rprop->value;
1145         if (!is_root_node(dp->parent)) {
1146                 sprintf(tmp_buf, "%s@%x,%x",
1147                         dp->name,
1148                         (unsigned int) (regs->phys_addr >> 32UL),
1149                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1150                 return;
1151         }
1152
1153         type = regs->phys_addr >> 60UL;
1154         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1155         low_bits = (regs->phys_addr & 0xffffffffUL);
1156
1157         if (type == 0 || type == 8) {
1158                 const char *prefix = (type == 0) ? "m" : "i";
1159
1160                 if (low_bits)
1161                         sprintf(tmp_buf, "%s@%s%x,%x",
1162                                 dp->name, prefix,
1163                                 high_bits, low_bits);
1164                 else
1165                         sprintf(tmp_buf, "%s@%s%x",
1166                                 dp->name,
1167                                 prefix,
1168                                 high_bits);
1169         } else if (type == 12) {
1170                 sprintf(tmp_buf, "%s@%x",
1171                         dp->name, high_bits);
1172         }
1173 }
1174
1175 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1176 {
1177         struct linux_prom64_registers *regs;
1178         struct property *prop;
1179
1180         prop = of_find_property(dp, "reg", NULL);
1181         if (!prop)
1182                 return;
1183
1184         regs = prop->value;
1185         if (!is_root_node(dp->parent)) {
1186                 sprintf(tmp_buf, "%s@%x,%x",
1187                         dp->name,
1188                         (unsigned int) (regs->phys_addr >> 32UL),
1189                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1190                 return;
1191         }
1192
1193         prop = of_find_property(dp, "upa-portid", NULL);
1194         if (!prop)
1195                 prop = of_find_property(dp, "portid", NULL);
1196         if (prop) {
1197                 unsigned long mask = 0xffffffffUL;
1198
1199                 if (tlb_type >= cheetah)
1200                         mask = 0x7fffff;
1201
1202                 sprintf(tmp_buf, "%s@%x,%x",
1203                         dp->name,
1204                         *(u32 *)prop->value,
1205                         (unsigned int) (regs->phys_addr & mask));
1206         }
1207 }
1208
1209 /* "name@slot,offset"  */
1210 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1211 {
1212         struct linux_prom_registers *regs;
1213         struct property *prop;
1214
1215         prop = of_find_property(dp, "reg", NULL);
1216         if (!prop)
1217                 return;
1218
1219         regs = prop->value;
1220         sprintf(tmp_buf, "%s@%x,%x",
1221                 dp->name,
1222                 regs->which_io,
1223                 regs->phys_addr);
1224 }
1225
1226 /* "name@devnum[,func]" */
1227 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1228 {
1229         struct linux_prom_pci_registers *regs;
1230         struct property *prop;
1231         unsigned int devfn;
1232
1233         prop = of_find_property(dp, "reg", NULL);
1234         if (!prop)
1235                 return;
1236
1237         regs = prop->value;
1238         devfn = (regs->phys_hi >> 8) & 0xff;
1239         if (devfn & 0x07) {
1240                 sprintf(tmp_buf, "%s@%x,%x",
1241                         dp->name,
1242                         devfn >> 3,
1243                         devfn & 0x07);
1244         } else {
1245                 sprintf(tmp_buf, "%s@%x",
1246                         dp->name,
1247                         devfn >> 3);
1248         }
1249 }
1250
1251 /* "name@UPA_PORTID,offset" */
1252 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1253 {
1254         struct linux_prom64_registers *regs;
1255         struct property *prop;
1256
1257         prop = of_find_property(dp, "reg", NULL);
1258         if (!prop)
1259                 return;
1260
1261         regs = prop->value;
1262
1263         prop = of_find_property(dp, "upa-portid", NULL);
1264         if (!prop)
1265                 return;
1266
1267         sprintf(tmp_buf, "%s@%x,%x",
1268                 dp->name,
1269                 *(u32 *) prop->value,
1270                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1271 }
1272
1273 /* "name@reg" */
1274 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1275 {
1276         struct property *prop;
1277         u32 *regs;
1278
1279         prop = of_find_property(dp, "reg", NULL);
1280         if (!prop)
1281                 return;
1282
1283         regs = prop->value;
1284
1285         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1286 }
1287
1288 /* "name@addrhi,addrlo" */
1289 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1290 {
1291         struct linux_prom64_registers *regs;
1292         struct property *prop;
1293
1294         prop = of_find_property(dp, "reg", NULL);
1295         if (!prop)
1296                 return;
1297
1298         regs = prop->value;
1299
1300         sprintf(tmp_buf, "%s@%x,%x",
1301                 dp->name,
1302                 (unsigned int) (regs->phys_addr >> 32UL),
1303                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1304 }
1305
1306 /* "name@bus,addr" */
1307 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1308 {
1309         struct property *prop;
1310         u32 *regs;
1311
1312         prop = of_find_property(dp, "reg", NULL);
1313         if (!prop)
1314                 return;
1315
1316         regs = prop->value;
1317
1318         /* This actually isn't right... should look at the #address-cells
1319          * property of the i2c bus node etc. etc.
1320          */
1321         sprintf(tmp_buf, "%s@%x,%x",
1322                 dp->name, regs[0], regs[1]);
1323 }
1324
1325 /* "name@reg0[,reg1]" */
1326 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1327 {
1328         struct property *prop;
1329         u32 *regs;
1330
1331         prop = of_find_property(dp, "reg", NULL);
1332         if (!prop)
1333                 return;
1334
1335         regs = prop->value;
1336
1337         if (prop->length == sizeof(u32) || regs[1] == 1) {
1338                 sprintf(tmp_buf, "%s@%x",
1339                         dp->name, regs[0]);
1340         } else {
1341                 sprintf(tmp_buf, "%s@%x,%x",
1342                         dp->name, regs[0], regs[1]);
1343         }
1344 }
1345
1346 /* "name@reg0reg1[,reg2reg3]" */
1347 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1348 {
1349         struct property *prop;
1350         u32 *regs;
1351
1352         prop = of_find_property(dp, "reg", NULL);
1353         if (!prop)
1354                 return;
1355
1356         regs = prop->value;
1357
1358         if (regs[2] || regs[3]) {
1359                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1360                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1361         } else {
1362                 sprintf(tmp_buf, "%s@%08x%08x",
1363                         dp->name, regs[0], regs[1]);
1364         }
1365 }
1366
1367 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1368 {
1369         struct device_node *parent = dp->parent;
1370
1371         if (parent != NULL) {
1372                 if (!strcmp(parent->type, "pci") ||
1373                     !strcmp(parent->type, "pciex"))
1374                         return pci_path_component(dp, tmp_buf);
1375                 if (!strcmp(parent->type, "sbus"))
1376                         return sbus_path_component(dp, tmp_buf);
1377                 if (!strcmp(parent->type, "upa"))
1378                         return upa_path_component(dp, tmp_buf);
1379                 if (!strcmp(parent->type, "ebus"))
1380                         return ebus_path_component(dp, tmp_buf);
1381                 if (!strcmp(parent->name, "usb") ||
1382                     !strcmp(parent->name, "hub"))
1383                         return usb_path_component(dp, tmp_buf);
1384                 if (!strcmp(parent->type, "i2c"))
1385                         return i2c_path_component(dp, tmp_buf);
1386                 if (!strcmp(parent->type, "firewire"))
1387                         return ieee1394_path_component(dp, tmp_buf);
1388                 if (!strcmp(parent->type, "virtual-devices"))
1389                         return vdev_path_component(dp, tmp_buf);
1390
1391                 /* "isa" is handled with platform naming */
1392         }
1393
1394         /* Use platform naming convention.  */
1395         if (tlb_type == hypervisor)
1396                 return sun4v_path_component(dp, tmp_buf);
1397         else
1398                 return sun4u_path_component(dp, tmp_buf);
1399 }
1400
1401 static char * __init build_path_component(struct device_node *dp)
1402 {
1403         char tmp_buf[64], *n;
1404
1405         tmp_buf[0] = '\0';
1406         __build_path_component(dp, tmp_buf);
1407         if (tmp_buf[0] == '\0')
1408                 strcpy(tmp_buf, dp->name);
1409
1410         n = prom_early_alloc(strlen(tmp_buf) + 1);
1411         strcpy(n, tmp_buf);
1412
1413         return n;
1414 }
1415
1416 static char * __init build_full_name(struct device_node *dp)
1417 {
1418         int len, ourlen, plen;
1419         char *n;
1420
1421         plen = strlen(dp->parent->full_name);
1422         ourlen = strlen(dp->path_component_name);
1423         len = ourlen + plen + 2;
1424
1425         n = prom_early_alloc(len);
1426         strcpy(n, dp->parent->full_name);
1427         if (!is_root_node(dp->parent)) {
1428                 strcpy(n + plen, "/");
1429                 plen++;
1430         }
1431         strcpy(n + plen, dp->path_component_name);
1432
1433         return n;
1434 }
1435
1436 static unsigned int unique_id;
1437
1438 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1439 {
1440         static struct property *tmp = NULL;
1441         struct property *p;
1442
1443         if (tmp) {
1444                 p = tmp;
1445                 memset(p, 0, sizeof(*p) + 32);
1446                 tmp = NULL;
1447         } else {
1448                 p = prom_early_alloc(sizeof(struct property) + 32);
1449                 p->unique_id = unique_id++;
1450         }
1451
1452         p->name = (char *) (p + 1);
1453         if (special_name) {
1454                 strcpy(p->name, special_name);
1455                 p->length = special_len;
1456                 p->value = prom_early_alloc(special_len);
1457                 memcpy(p->value, special_val, special_len);
1458         } else {
1459                 if (prev == NULL) {
1460                         prom_firstprop(node, p->name);
1461                 } else {
1462                         prom_nextprop(node, prev, p->name);
1463                 }
1464                 if (strlen(p->name) == 0) {
1465                         tmp = p;
1466                         return NULL;
1467                 }
1468                 p->length = prom_getproplen(node, p->name);
1469                 if (p->length <= 0) {
1470                         p->length = 0;
1471                 } else {
1472                         p->value = prom_early_alloc(p->length + 1);
1473                         prom_getproperty(node, p->name, p->value, p->length);
1474                         ((unsigned char *)p->value)[p->length] = '\0';
1475                 }
1476         }
1477         return p;
1478 }
1479
1480 static struct property * __init build_prop_list(phandle node)
1481 {
1482         struct property *head, *tail;
1483
1484         head = tail = build_one_prop(node, NULL,
1485                                      ".node", &node, sizeof(node));
1486
1487         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1488         tail = tail->next;
1489         while(tail) {
1490                 tail->next = build_one_prop(node, tail->name,
1491                                             NULL, NULL, 0);
1492                 tail = tail->next;
1493         }
1494
1495         return head;
1496 }
1497
1498 static char * __init get_one_property(phandle node, const char *name)
1499 {
1500         char *buf = "<NULL>";
1501         int len;
1502
1503         len = prom_getproplen(node, name);
1504         if (len > 0) {
1505                 buf = prom_early_alloc(len);
1506                 prom_getproperty(node, name, buf, len);
1507         }
1508
1509         return buf;
1510 }
1511
1512 static struct device_node * __init create_node(phandle node)
1513 {
1514         struct device_node *dp;
1515
1516         if (!node)
1517                 return NULL;
1518
1519         dp = prom_early_alloc(sizeof(*dp));
1520         dp->unique_id = unique_id++;
1521
1522         kref_init(&dp->kref);
1523
1524         dp->name = get_one_property(node, "name");
1525         dp->type = get_one_property(node, "device_type");
1526         dp->node = node;
1527
1528         dp->properties = build_prop_list(node);
1529
1530         irq_trans_init(dp);
1531
1532         return dp;
1533 }
1534
1535 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1536 {
1537         struct device_node *dp;
1538
1539         dp = create_node(node);
1540         if (dp) {
1541                 *(*nextp) = dp;
1542                 *nextp = &dp->allnext;
1543
1544                 dp->parent = parent;
1545                 dp->path_component_name = build_path_component(dp);
1546                 dp->full_name = build_full_name(dp);
1547
1548                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1549
1550                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1551         }
1552
1553         return dp;
1554 }
1555
1556 void __init prom_build_devicetree(void)
1557 {
1558         struct device_node **nextp;
1559
1560         allnodes = create_node(prom_root_node);
1561         allnodes->path_component_name = "";
1562         allnodes->full_name = "/";
1563
1564         nextp = &allnodes->allnext;
1565         allnodes->child = build_tree(allnodes,
1566                                      prom_getchild(allnodes->node),
1567                                      &nextp);
1568         printk("PROM: Built device tree with %u bytes of memory.\n",
1569                prom_early_allocated);
1570 }