2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
4 * Written 2000 by Adam Fritzler
6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference.
9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 Ringnode MC16
11 * - Madge Smart 16/4 Ringnode MC32 (??)
14 * AF Adam Fritzler mid@auk.cx
16 * Modification History:
17 * 16-Jan-00 AF Created
20 static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
22 #include <linux/module.h>
23 #include <linux/mca.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/init.h>
27 #include <linux/netdevice.h>
28 #include <linux/trdevice.h>
30 #include <asm/system.h>
35 #include "madgemc.h" /* Madge-specific constants */
37 #define MADGEMC_IO_EXTENT 32
38 #define MADGEMC_SIF_OFFSET 0x08
42 * These are read from the BIA ROM.
45 unsigned int cardtype;
50 * These are read from the MCA POS registers.
52 unsigned int burstmode:2;
53 unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */
54 unsigned int arblevel:4;
55 unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
56 unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */
59 static int madgemc_open(struct net_device *dev);
60 static int madgemc_close(struct net_device *dev);
61 static int madgemc_chipset_init(struct net_device *dev);
62 static void madgemc_read_rom(struct net_device *dev, struct card_info *card);
63 static unsigned short madgemc_setnselout_pins(struct net_device *dev);
64 static void madgemc_setcabletype(struct net_device *dev, int type);
66 static int madgemc_mcaproc(char *buf, int slot, void *d);
68 static void madgemc_setregpage(struct net_device *dev, int page);
69 static void madgemc_setsifsel(struct net_device *dev, int val);
70 static void madgemc_setint(struct net_device *dev, int val);
72 static irqreturn_t madgemc_interrupt(int irq, void *dev_id);
75 * These work around paging, however they don't guarentee you're on the
78 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
79 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
80 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
81 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
84 * Read a byte-length value from the register.
86 static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg)
92 madgemc_setregpage(dev, 1);
94 madgemc_setregpage(dev, 0);
100 * Write a byte-length value to a register.
102 static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
107 madgemc_setregpage(dev, 1);
109 madgemc_setregpage(dev, 0);
115 * Read a word-length value from a register
117 static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg)
123 madgemc_setregpage(dev, 1);
125 madgemc_setregpage(dev, 0);
131 * Write a word-length value to a register.
133 static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
138 madgemc_setregpage(dev, 1);
140 madgemc_setregpage(dev, 0);
147 static int __devinit madgemc_probe(struct device *device)
149 static int versionprinted;
150 struct net_device *dev;
151 struct net_local *tp;
152 struct card_info *card;
153 struct mca_device *mdev = to_mca_device(device);
156 if (versionprinted++ == 0)
157 printk("%s", version);
159 if(mca_device_claimed(mdev))
161 mca_device_set_claim(mdev, 1);
163 dev = alloc_trdev(sizeof(struct net_local));
165 printk("madgemc: unable to allocate dev space\n");
166 mca_device_set_claim(mdev, 0);
171 SET_MODULE_OWNER(dev);
174 card = kmalloc(sizeof(struct card_info), GFP_KERNEL);
176 printk("madgemc: unable to allocate card struct\n");
182 * Parse configuration information. This all comes
183 * directly from the publicly available @002d.ADF.
184 * Get it from Madge or your local ADF library.
190 dev->base_addr = 0x0a20 +
191 ((mdev->pos[2] & MC16_POS2_ADDR2)?0x0400:0) +
192 ((mdev->pos[0] & MC16_POS0_ADDR1)?0x1000:0) +
193 ((mdev->pos[3] & MC16_POS3_ADDR3)?0x2000:0);
198 switch(mdev->pos[0] >> 6) { /* upper two bits */
199 case 0x1: dev->irq = 3; break;
200 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */
201 case 0x3: dev->irq = 10; break;
202 default: dev->irq = 0; break;
206 printk("%s: invalid IRQ\n", dev->name);
211 if (!request_region(dev->base_addr, MADGEMC_IO_EXTENT,
213 printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev->slot, dev->base_addr);
214 dev->base_addr += MADGEMC_SIF_OFFSET;
218 dev->base_addr += MADGEMC_SIF_OFFSET;
223 card->arblevel = ((mdev->pos[0] >> 1) & 0x7) + 8;
226 * Burst mode and Fairness
228 card->burstmode = ((mdev->pos[2] >> 6) & 0x3);
229 card->fairness = ((mdev->pos[2] >> 4) & 0x1);
234 if ((mdev->pos[1] >> 2)&0x1)
235 card->ringspeed = 2; /* not selected */
236 else if ((mdev->pos[2] >> 5) & 0x1)
237 card->ringspeed = 1; /* 16Mb */
239 card->ringspeed = 0; /* 4Mb */
244 if ((mdev->pos[1] >> 6)&0x1)
245 card->cabletype = 1; /* STP/DB9 */
247 card->cabletype = 0; /* UTP/RJ-45 */
251 * ROM Info. This requires us to actually twiddle
252 * bits on the card, so we must ensure above that
253 * the base address is free of conflict (request_region above).
255 madgemc_read_rom(dev, card);
257 if (card->manid != 0x4d) { /* something went wrong */
258 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid);
262 if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) {
263 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype);
268 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
269 if ((card->cardtype == 0x08) && (card->cardrev <= 0x01))
274 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
276 (card->cardtype == 0x08)?MADGEMC16_CARDNAME:
277 MADGEMC32_CARDNAME, card->cardrev,
278 dev->base_addr, dev->irq);
280 if (card->cardtype == 0x0d)
281 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev->name);
283 if (card->ringspeed==2) { /* Unknown */
284 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name);
285 card->ringspeed = 1; /* default to 16mb */
288 printk("%s: RAM Size: %dKB\n", dev->name, card->ramsize);
290 printk("%s: Ring Speed: %dMb/sec on %s\n", dev->name,
291 (card->ringspeed)?16:4,
292 card->cabletype?"STP/DB9":"UTP/RJ-45");
293 printk("%s: Arbitration Level: %d\n", dev->name,
296 printk("%s: Burst Mode: ", dev->name);
297 switch(card->burstmode) {
298 case 0: printk("Cycle steal"); break;
299 case 1: printk("Limited burst"); break;
300 case 2: printk("Delayed release"); break;
301 case 3: printk("Immediate release"); break;
303 printk(" (%s)\n", (card->fairness)?"Unfair":"Fair");
307 * Enable SIF before we assign the interrupt handler,
308 * just in case we get spurious interrupts that need
311 outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */
312 madgemc_setsifsel(dev, 1);
313 if (request_irq(dev->irq, madgemc_interrupt, IRQF_SHARED,
319 madgemc_chipset_init(dev); /* enables interrupts! */
320 madgemc_setcabletype(dev, card->cabletype);
322 /* Setup MCA structures */
323 mca_device_set_name(mdev, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME);
324 mca_set_adapter_procfn(mdev->slot, madgemc_mcaproc, dev);
326 printk("%s: Ring Station Address: ", dev->name);
327 printk("%2.2x", dev->dev_addr[0]);
328 for (i = 1; i < 6; i++)
329 printk(":%2.2x", dev->dev_addr[i]);
332 if (tmsdev_init(dev, device)) {
333 printk("%s: unable to get memory for dev->priv.\n",
338 tp = netdev_priv(dev);
341 * The MC16 is physically a 32bit card. However, Madge
342 * insists on calling it 16bit, so I'll assume here that
343 * they know what they're talking about. Cut off DMA
346 tp->setnselout = madgemc_setnselout_pins;
347 tp->sifwriteb = madgemc_sifwriteb;
348 tp->sifreadb = madgemc_sifreadb;
349 tp->sifwritew = madgemc_sifwritew;
350 tp->sifreadw = madgemc_sifreadw;
351 tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4;
353 memcpy(tp->ProductID, "Madge MCA 16/4 ", PROD_ID_SIZE + 1);
355 dev->open = madgemc_open;
356 dev->stop = madgemc_close;
359 dev_set_drvdata(device, dev);
361 if (register_netdev(dev) == 0)
364 dev_set_drvdata(device, NULL);
367 free_irq(dev->irq, dev);
369 release_region(dev->base_addr-MADGEMC_SIF_OFFSET,
376 mca_device_set_claim(mdev, 0);
381 * Handle interrupts generated by the card
383 * The MicroChannel Madge cards need slightly more handling
384 * after an interrupt than other TMS380 cards do.
386 * First we must make sure it was this card that generated the
387 * interrupt (since interrupt sharing is allowed). Then,
388 * because we're using level-triggered interrupts (as is
389 * standard on MCA), we must toggle the interrupt line
390 * on the card in order to claim and acknowledge the interrupt.
391 * Once that is done, the interrupt should be handlable in
392 * the normal tms380tr_interrupt() routine.
394 * There's two ways we can check to see if the interrupt is ours,
395 * both with their own disadvantages...
397 * 1) Read in the SIFSTS register from the TMS controller. This
398 * is guarenteed to be accurate, however, there's a fairly
399 * large performance penalty for doing so: the Madge chips
400 * must request the register from the Eagle, the Eagle must
401 * read them from its internal bus, and then take the route
402 * back out again, for a 16bit read.
404 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
405 * The major disadvantage here is that the accuracy of the
406 * bit is in question. However, it cuts out the extra read
407 * cycles it takes to read the Eagle's SIF, as its only an
408 * 8bit read, and theoretically the Madge bit is directly
409 * connected to the interrupt latch coming out of the Eagle
410 * hardware (that statement is not verified).
412 * I can't determine which of these methods has the best win. For now,
413 * we make a compromise. Use the Madge way for the first interrupt,
414 * which should be the fast-path, and then once we hit the first
415 * interrupt, keep on trying using the SIF method until we've
416 * exhausted all contiguous interrupts.
419 static irqreturn_t madgemc_interrupt(int irq, void *dev_id)
422 struct net_device *dev;
425 printk("madgemc_interrupt: was not passed a dev_id!\n");
429 dev = (struct net_device *)dev_id;
431 /* Make sure its really us. -- the Madge way */
432 pending = inb(dev->base_addr + MC_CONTROL_REG0);
433 if (!(pending & MC_CONTROL_REG0_SINTR))
434 return IRQ_NONE; /* not our interrupt */
437 * Since we're level-triggered, we may miss the rising edge
438 * of the next interrupt while we're off handling this one,
439 * so keep checking until the SIF verifies that it has nothing
442 pending = STS_SYSTEM_IRQ;
444 if (pending & STS_SYSTEM_IRQ) {
446 /* Toggle the interrupt to reset the latch on card */
447 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
448 outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
449 dev->base_addr + MC_CONTROL_REG1);
450 outb(reg1, dev->base_addr + MC_CONTROL_REG1);
452 /* Continue handling as normal */
453 tms380tr_interrupt(irq, dev_id);
455 pending = SIFREADW(SIFSTS); /* restart - the SIF way */
461 return IRQ_HANDLED; /* not reachable */
465 * Set the card to the prefered ring speed.
467 * Unlike newer cards, the MC16/32 have their speed selection
468 * circuit connected to the Madge ASICs and not to the TMS380
469 * NSELOUT pins. Set the ASIC bits correctly here, and return
470 * zero to leave the TMS NSELOUT bits unaffected.
473 unsigned short madgemc_setnselout_pins(struct net_device *dev)
476 struct net_local *tp = netdev_priv(dev);
478 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
480 if(tp->DataRate == SPEED_16)
481 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */
482 else if (reg1 & MC_CONTROL_REG1_SPEED_SEL)
483 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */
484 outb(reg1, dev->base_addr + MC_CONTROL_REG1);
486 return 0; /* no change */
490 * Set the register page. This equates to the SRSX line
493 * Register selection is normally done via three contiguous
494 * bits. However, some boards (such as the MC16/32) use only
495 * two bits, plus a separate bit in the glue chip. This
496 * sets the SRSX bit (the top bit). See page 4-17 in the
497 * Yellow Book for which registers are affected.
500 static void madgemc_setregpage(struct net_device *dev, int page)
504 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
505 if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) {
506 outb(reg1 ^ MC_CONTROL_REG1_SRSX,
507 dev->base_addr + MC_CONTROL_REG1);
509 else if (page == 1) {
510 outb(reg1 | MC_CONTROL_REG1_SRSX,
511 dev->base_addr + MC_CONTROL_REG1);
513 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
519 * The SIF registers are not mapped into register space by default
520 * Set this to 1 to map them, 0 to map the BIA ROM.
523 static void madgemc_setsifsel(struct net_device *dev, int val)
527 reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
528 if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) {
529 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL,
530 dev->base_addr + MC_CONTROL_REG0);
531 } else if (val == 1) {
532 outb(reg0 | MC_CONTROL_REG0_SIFSEL,
533 dev->base_addr + MC_CONTROL_REG0);
535 reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
541 * Enable SIF interrupts
543 * This does not enable interrupts in the SIF, but rather
544 * enables SIF interrupts to be passed onto the host.
547 static void madgemc_setint(struct net_device *dev, int val)
551 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
552 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) {
553 outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
554 dev->base_addr + MC_CONTROL_REG1);
555 } else if (val == 1) {
556 outb(reg1 | MC_CONTROL_REG1_SINTEN,
557 dev->base_addr + MC_CONTROL_REG1);
564 * Cable type is set via control register 7. Bit zero high
565 * for UTP, low for STP.
567 static void madgemc_setcabletype(struct net_device *dev, int type)
569 outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP,
570 dev->base_addr + MC_CONTROL_REG7);
574 * Enable the functions of the Madge chipset needed for
575 * full working order.
577 static int madgemc_chipset_init(struct net_device *dev)
579 outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */
580 tms380tr_wait(100); /* wait for card to reset */
582 /* bring back into normal operating mode */
583 outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1);
585 /* map SIF registers */
586 madgemc_setsifsel(dev, 1);
588 /* enable SIF interrupts */
589 madgemc_setint(dev, 1);
595 * Disable the board, and put back into power-up state.
597 static void madgemc_chipset_close(struct net_device *dev)
599 /* disable interrupts */
600 madgemc_setint(dev, 0);
601 /* unmap SIF registers */
602 madgemc_setsifsel(dev, 0);
608 * Read the card type (MC16 or MC32) from the card.
610 * The configuration registers are stored in two separate
611 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
612 * for page zero, or setting bit 3 for page one.
614 * Page zero contains the following data:
615 * Byte 0: Manufacturer ID (0x4D -- ASCII "M")
619 * Byte 2: Card revision
620 * Byte 3: Mirror of POS config register 0
621 * Byte 4: Mirror of POS 1
622 * Byte 5: Mirror of POS 2
624 * Page one contains the following data:
626 * Byte 1-6: BIA, MSB to LSB.
628 * Note that to read the BIA, we must unmap the SIF registers
629 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
630 * will reside in the same logical location. For this reason,
631 * _never_ read the BIA while the Eagle processor is running!
632 * The SIF will be completely inaccessible until the BIA operation
636 static void madgemc_read_rom(struct net_device *dev, struct card_info *card)
638 unsigned long ioaddr;
639 unsigned char reg0, reg1, tmpreg0, i;
641 ioaddr = dev->base_addr;
643 reg0 = inb(ioaddr + MC_CONTROL_REG0);
644 reg1 = inb(ioaddr + MC_CONTROL_REG1);
646 /* Switch to page zero and unmap SIF */
647 tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL);
648 outb(tmpreg0, ioaddr + MC_CONTROL_REG0);
650 card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID);
651 card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID);
652 card->cardrev = inb(ioaddr + MC_ROM_REVISION);
654 /* Switch to rom page one */
655 outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0);
659 for (i = 0; i < 6; i++)
660 dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i);
662 /* Restore original register values */
663 outb(reg0, ioaddr + MC_CONTROL_REG0);
664 outb(reg1, ioaddr + MC_CONTROL_REG1);
669 static int madgemc_open(struct net_device *dev)
672 * Go ahead and reinitialize the chipset again, just to
673 * make sure we didn't get left in a bad state.
675 madgemc_chipset_init(dev);
680 static int madgemc_close(struct net_device *dev)
683 madgemc_chipset_close(dev);
688 * Give some details available from /proc/mca/slotX
690 static int madgemc_mcaproc(char *buf, int slot, void *d)
692 struct net_device *dev = (struct net_device *)d;
693 struct net_local *tp = dev->priv;
694 struct card_info *curcard = tp->tmspriv;
697 len += sprintf(buf+len, "-------\n");
699 struct net_local *tp = netdev_priv(dev);
702 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev);
703 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize);
704 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45");
705 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4);
706 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4);
707 len += sprintf(buf+len, "Device: %s\n", dev->name);
708 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr);
709 len += sprintf(buf+len, "IRQ: %d\n", dev->irq);
710 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel);
711 len += sprintf(buf+len, "Burst Mode: ");
712 switch(curcard->burstmode) {
713 case 0: len += sprintf(buf+len, "Cycle steal"); break;
714 case 1: len += sprintf(buf+len, "Limited burst"); break;
715 case 2: len += sprintf(buf+len, "Delayed release"); break;
716 case 3: len += sprintf(buf+len, "Immediate release"); break;
718 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair");
720 len += sprintf(buf+len, "Ring Station Address: ");
721 len += sprintf(buf+len, "%2.2x", dev->dev_addr[0]);
722 for (i = 1; i < 6; i++)
723 len += sprintf(buf+len, " %2.2x", dev->dev_addr[i]);
724 len += sprintf(buf+len, "\n");
726 len += sprintf(buf+len, "Card not configured\n");
731 static int __devexit madgemc_remove(struct device *device)
733 struct net_device *dev = dev_get_drvdata(device);
734 struct net_local *tp;
735 struct card_info *card;
744 unregister_netdev(dev);
745 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT);
746 free_irq(dev->irq, dev);
749 dev_set_drvdata(device, NULL);
754 static short madgemc_adapter_ids[] __initdata = {
759 static struct mca_driver madgemc_driver = {
760 .id_table = madgemc_adapter_ids,
763 .bus = &mca_bus_type,
764 .probe = madgemc_probe,
765 .remove = __devexit_p(madgemc_remove),
769 static int __init madgemc_init (void)
771 return mca_register_driver (&madgemc_driver);
774 static void __exit madgemc_exit (void)
776 mca_unregister_driver (&madgemc_driver);
779 module_init(madgemc_init);
780 module_exit(madgemc_exit);
782 MODULE_LICENSE("GPL");