2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
15 as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
16 -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
17 else echo "$(2)"; fi ;)
22 # Select the object file format to substitute into the linker script.
24 ifdef CONFIG_CPU_LITTLE_ENDIAN
25 32bit-tool-prefix = mipsel-linux-
26 64bit-tool-prefix = mips64el-linux-
27 32bit-bfd = elf32-tradlittlemips
28 64bit-bfd = elf64-tradlittlemips
29 32bit-emul = elf32ltsmip
30 64bit-emul = elf64ltsmip
32 32bit-tool-prefix = mips-linux-
33 64bit-tool-prefix = mips64-linux-
34 32bit-bfd = elf32-tradbigmips
35 64bit-bfd = elf64-tradbigmips
36 32bit-emul = elf32btsmip
37 64bit-emul = elf64btsmip
42 tool-prefix = $(32bit-tool-prefix)
47 tool-prefix = $(64bit-tool-prefix)
51 ifdef CONFIG_CROSSCOMPILE
52 CROSS_COMPILE := $(tool-prefix)
55 CHECKFLAGS-y += -D__linux__ -D__mips__ \
60 CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
63 -D__PTRDIFF_TYPE__=int
64 CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
67 -D__PTRDIFF_TYPE__="long int"
68 CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
69 CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
71 CHECKFLAGS = $(CHECKFLAGS-y)
73 ifdef CONFIG_BUILD_ELF64
75 ld-emul = $(64bit-emul)
76 vmlinux-32 = vmlinux.32
80 ld-emul = $(32bit-emul)
82 vmlinux-64 = vmlinux.64
84 cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs)
88 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
89 # code since it only slows down the whole thing. At some point we might make
90 # use of global pointer optimizations but their use of $28 conflicts with
91 # the current pointer optimization.
93 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
94 # machines may also. Since BFD is incredibly buggy with respect to
95 # crossformat linking we rely on the elf2ecoff tool for format conversion.
97 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
98 cflags-y += -msoft-float
99 LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
100 MODFLAGS += -mlong-calls
103 # We explicitly add the endianness specifier if needed, this allows
104 # to compile kernels with a toolchain for the other endianness. We
105 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
106 # when fed the toolchain default!
108 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
109 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
111 cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
114 # Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
116 # <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
118 # <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
119 # with up to the oldest supported tools)
120 # <isa2> -- an ISA designation used as an ABI selector for
121 # gcc versions that do not support "-mabi=32"
122 # (depending on the CPU type, either "mips1" or
125 set_gccflags = $(shell \
127 cpu=$(1); isa=-$(2); \
128 for gcc_opt in -march= -mcpu=; do \
129 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
130 -xc /dev/null > /dev/null 2>&1 && \
133 cpu=$(3); isa=-$(4); \
134 for gcc_opt in -march= -mcpu=; do \
135 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
136 -xc /dev/null > /dev/null 2>&1 && \
141 gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
142 if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
145 gcc_abi=; gcc_isa=-$(5); \
147 gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
149 for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
150 $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
151 -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
154 gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
157 if test "$(gcc-abi)" != "$(gas-abi)"; then \
158 gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
160 if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
161 $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
162 -xc /dev/null > /dev/null 2>&1 && \
165 echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
168 # CPU-dependent compiler/assembler options for optimization.
170 cflags-$(CONFIG_CPU_R3000) += \
171 $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
172 CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
174 cflags-$(CONFIG_CPU_TX39XX) += \
175 $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
176 CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
178 cflags-$(CONFIG_CPU_R6000) += \
179 $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
181 CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2
183 cflags-$(CONFIG_CPU_R4300) += \
184 $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
186 CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
188 cflags-$(CONFIG_CPU_VR41XX) += \
189 $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
191 CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
193 cflags-$(CONFIG_CPU_R4X00) += \
194 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
196 CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
198 cflags-$(CONFIG_CPU_TX49XX) += \
199 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
201 CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
203 cflags-$(CONFIG_CPU_MIPS32_R1) += \
204 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
206 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
208 cflags-$(CONFIG_CPU_MIPS32_R2) += \
209 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
211 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
213 cflags-$(CONFIG_CPU_MIPS64_R1) += \
214 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
216 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
218 cflags-$(CONFIG_CPU_MIPS64_R2) += \
219 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
221 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
223 cflags-$(CONFIG_CPU_R5000) += \
224 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
226 CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
228 cflags-$(CONFIG_CPU_R5432) += \
229 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
231 CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
233 cflags-$(CONFIG_CPU_NEVADA) += \
234 $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
236 CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
238 cflags-$(CONFIG_CPU_RM7000) += \
239 $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
241 CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
243 cflags-$(CONFIG_CPU_RM9000) += \
244 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
246 CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
249 cflags-$(CONFIG_CPU_SB1) += \
250 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
252 CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
254 cflags-$(CONFIG_CPU_R8000) += \
255 $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
257 CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
259 cflags-$(CONFIG_CPU_R10000) += \
260 $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
262 CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
265 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
266 MODFLAGS += -msb1-pass1-workarounds
273 libs-$(CONFIG_ARC) += arch/mips/arc/
274 libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
277 # Board-dependent options and extra files
281 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
283 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
284 cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
285 load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
288 # Common Alchemy Au1x00 stuff
290 core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
291 cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
294 # AMD Alchemy Pb1000 eval board
296 libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
297 cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
298 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
301 # AMD Alchemy Pb1100 eval board
303 libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
304 cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
305 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
308 # AMD Alchemy Pb1500 eval board
310 libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
311 cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
312 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
315 # AMD Alchemy Pb1550 eval board
317 libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
318 cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
319 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
322 # AMD Alchemy Pb1200 eval board
324 libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
325 cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
326 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
329 # AMD Alchemy Db1000 eval board
331 libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
332 cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
333 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
336 # AMD Alchemy Db1100 eval board
338 libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
339 cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
340 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
343 # AMD Alchemy Db1500 eval board
345 libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
346 cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
347 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
350 # AMD Alchemy Db1550 eval board
352 libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
353 cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
354 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
357 # AMD Alchemy Db1200 eval board
359 libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
360 cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
361 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
364 # AMD Alchemy Bosporus eval board
366 libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
367 cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
368 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
371 # AMD Alchemy Mirage eval board
373 libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
374 cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
375 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
378 # 4G-Systems eval board
380 libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
381 load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
386 libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
387 load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
392 core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
393 cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
394 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
399 core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
400 cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
401 libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
402 load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
403 CLEAN_FILES += drivers/tc/lk201-map.c
406 # Galileo EV64120 Board
408 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
409 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
410 cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
411 load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
414 # Galileo EV96100 Board
416 core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
417 cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
418 load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
421 # Globespan IVR eval board with QED 5231 CPU
423 core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
424 core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
425 load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
428 # ITE 8172 eval board with QED 5231 CPU
430 core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
431 load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
434 # For all MIPS, Inc. eval boards
436 core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
441 core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
442 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
443 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
444 load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
449 core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
450 cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
451 load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
456 core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
457 load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
462 core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
463 cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
464 load-$(CONFIG_MIPS_SIM) += 0x80100000
467 # Momentum Ocelot board
469 # The Ocelot setup.o must be linked early - it does the ioremap() for the
472 core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
473 arch/mips/gt64120/momenco_ocelot/
474 cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
475 load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
478 # Momentum Ocelot-G board
480 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
483 core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
484 load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
487 # Momentum Ocelot-C and -CS boards
489 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
491 core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
492 load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
495 # PMC-Sierra Yosemite
497 core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
498 cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
499 load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
501 # Qemu simulating MIPS32 4Kc
503 core-$(CONFIG_QEMU) += arch/mips/qemu/
504 cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
505 load-$(CONFIG_QEMU) += 0xffffffff80010000
510 core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
511 cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
512 load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
515 # Momentum Jaguar ATX
517 core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
518 cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
519 #ifdef CONFIG_JAGUAR_DMALOW
520 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
522 load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
528 core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
533 core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
534 load-$(CONFIG_DDB5074) += 0xffffffff80080000
539 core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
540 load-$(CONFIG_DDB5476) += 0xffffffff80080000
545 core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
546 load-$(CONFIG_DDB5477) += 0xffffffff80100000
548 core-$(CONFIG_LASAT) += arch/mips/lasat/
549 cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
550 load-$(CONFIG_LASAT) += 0xffffffff80000000
555 core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
556 cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
561 core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
562 load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
565 # ZAO Networks Capcella (VR4131)
567 load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
570 # Victor MP-C303/304 (VR4122)
572 load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
575 # IBM WorkPad z50 (VR4121)
577 core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
578 load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
581 # CASIO CASSIPEIA E-55/65 (VR4111)
583 core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
584 load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
587 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
589 load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
592 # Common Philips PNX8550
594 core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
595 cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
598 # Philips PNX8550 JBS board
600 libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
601 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
602 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
605 # SGI IP22 (Indy/Indigo2)
607 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
608 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
609 # be aligned to a multiple of the kernel stack size or the handling of the
610 # current variable will break so for 64-bit kernels we have to raise the start
613 core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
614 cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
616 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
619 load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
623 # SGI-IP27 (Origin200/2000)
625 # Set the load address to >= 0xc000000000300000 if you want to leave space for
626 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
627 # be 16kb aligned or the handling of the current variable will break.
629 ifdef CONFIG_SGI_IP27
630 core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
631 cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
632 ifdef CONFIG_BUILD_ELF64
633 ifdef CONFIG_MAPPED_KERNEL
634 load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
635 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
636 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
638 load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
639 OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
642 ifdef CONFIG_MAPPED_KERNEL
643 load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000
644 OBJCOPYFLAGS := --change-addresses=0xc000000080000000
645 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
647 load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000
648 OBJCOPYFLAGS := --change-addresses=0xa800000080000000
656 # Set the load address to >= 80069000 if you want to leave space for symmon,
657 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
658 # a multiple of the kernel stack size or the handling of the current variable
661 core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
662 cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
663 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
668 # This is a LIB so that it links at the end, and initcalls are later
669 # the sequence; but it is built as an object so that modules don't get
670 # removed (as happens, even if they have __initcall/module_init)
672 core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
673 cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
674 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
676 core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
677 cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
678 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
680 core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
681 cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
682 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
684 core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
685 cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
686 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
689 # Sibyte BCM91120x (Carmel) board
690 # Sibyte BCM91120C (CRhine) board
691 # Sibyte BCM91125C (CRhone) board
692 # Sibyte BCM91125E (Rhone) board
694 # Sibyte BCM91x80 (BigSur) board
696 libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
697 load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
698 libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
699 load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
700 libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
701 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
702 libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
703 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
704 libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
705 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
706 libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
707 load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
708 libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
709 load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
714 core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
715 cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
716 load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
719 # Toshiba JMR-TX3927 board
721 core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
722 arch/mips/jmr3927/common/
723 cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
724 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
727 # Toshiba RBTX4927 board or
728 # Toshiba RBTX4937 board
730 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
731 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
732 load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
735 # Toshiba RBTX4938 board
737 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
738 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
739 load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
741 cflags-y += -Iinclude/asm-mips/mach-generic
742 drivers-$(CONFIG_PCI) += arch/mips/pci/
745 ifdef CONFIG_CPU_LITTLE_ENDIAN
748 JIFFIES = jiffies_64 + 4
754 AFLAGS += $(cflags-y)
755 CFLAGS += $(cflags-y)
757 LDFLAGS += -m $(ld-emul)
759 OBJCOPYFLAGS += --remove-section=.reginfo
762 # Choosing incompatible machines durings configuration will result in
763 # error messages during linking. Select a default linkscript if
764 # none has been choosen above.
767 CPPFLAGS_vmlinux.lds := \
769 -D"LOADADDR=$(load-y)" \
770 -D"JIFFIES=$(JIFFIES)" \
771 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
773 head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
775 libs-y += arch/mips/lib/
776 libs-$(CONFIG_32BIT) += arch/mips/lib-32/
777 libs-$(CONFIG_64BIT) += arch/mips/lib-64/
779 core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
781 drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
784 rom.bin rom.sw: vmlinux
785 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
789 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
790 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
791 # convert to ECOFF using elf2ecoff.
794 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
797 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
798 # ELF files from 32-bit files by conversion.
801 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
803 makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
805 ifdef CONFIG_BOOT_ELF32
809 ifdef CONFIG_BOOT_ELF64
813 ifdef CONFIG_MIPS_ATLAS
817 ifdef CONFIG_MIPS_MALTA
821 ifdef CONFIG_MIPS_SEAD
829 ifdef CONFIG_SNI_RM200_PCI
833 vmlinux.bin: $(vmlinux-32)
834 +@$(call makeboot,$@)
836 vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
837 +@$(call makeboot,$@)
839 vmlinux.srec: $(vmlinux-32)
840 +@$(call makeboot,$@)
842 CLEAN_FILES += vmlinux.ecoff \
848 @$(MAKE) $(clean)=arch/mips/boot
849 @$(MAKE) $(clean)=arch/mips/lasat
851 CLEAN_FILES += vmlinux.32 \