2 * linux/arch/arm/mach-omap2/mcbsp.c
4 * Copyright (C) 2008 Instituto Nokia de Tecnologia
5 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Multichannel mode not supported.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
18 #include <linux/platform_device.h>
23 #include <mach/mcbsp.h>
25 struct mcbsp_internal_clk {
31 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
32 static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
34 const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
37 mclk->n_childs = ARRAY_SIZE(clk_names);
38 mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
41 for (i = 0; i < mclk->n_childs; i++) {
42 /* We fake a platform device to get correct device id */
43 struct platform_device pdev;
45 pdev.dev.bus = &platform_bus_type;
46 pdev.id = mclk->clk.id;
47 mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
48 if (IS_ERR(mclk->childs[i]))
49 printk(KERN_ERR "Could not get clock %s (%d).\n",
50 clk_names[i], mclk->clk.id);
54 static int omap_mcbsp_clk_enable(struct clk *clk)
56 struct mcbsp_internal_clk *mclk = container_of(clk,
57 struct mcbsp_internal_clk, clk);
60 for (i = 0; i < mclk->n_childs; i++)
61 clk_enable(mclk->childs[i]);
65 static void omap_mcbsp_clk_disable(struct clk *clk)
67 struct mcbsp_internal_clk *mclk = container_of(clk,
68 struct mcbsp_internal_clk, clk);
71 for (i = 0; i < mclk->n_childs; i++)
72 clk_disable(mclk->childs[i]);
75 static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
80 .enable = omap_mcbsp_clk_enable,
81 .disable = omap_mcbsp_clk_disable,
88 .enable = omap_mcbsp_clk_enable,
89 .disable = omap_mcbsp_clk_disable,
94 #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
96 #define omap_mcbsp_clks_size 0
97 static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
98 static inline void omap_mcbsp_clk_init(struct clk *clk)
102 static void omap2_mcbsp2_mux_setup(void)
104 omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
105 omap_cfg_reg(R14_24XX_MCBSP2_FSX);
106 omap_cfg_reg(W15_24XX_MCBSP2_DR);
107 omap_cfg_reg(V15_24XX_MCBSP2_DX);
108 omap_cfg_reg(V14_24XX_GPIO117);
110 * TODO: Need to add MUX settings for OMAP 2430 SDP
114 static void omap2_mcbsp_request(unsigned int id)
116 if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
117 omap2_mcbsp2_mux_setup();
120 static int omap2_mcbsp_check(unsigned int id)
122 if (id > OMAP_MAX_MCBSP_COUNT - 1) {
123 printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
129 static struct omap_mcbsp_ops omap2_mcbsp_ops = {
130 .request = omap2_mcbsp_request,
131 .check = omap2_mcbsp_check,
134 #ifdef CONFIG_ARCH_OMAP24XX
135 static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
137 .phys_base = OMAP24XX_MCBSP1_BASE,
138 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
139 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
140 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
141 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
142 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
143 .ops = &omap2_mcbsp_ops,
144 .clk_name = "mcbsp_clk",
147 .phys_base = OMAP24XX_MCBSP2_BASE,
148 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
149 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
150 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
151 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
152 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
153 .ops = &omap2_mcbsp_ops,
154 .clk_name = "mcbsp_clk",
157 #define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata)
159 #define omap24xx_mcbsp_pdata NULL
160 #define OMAP24XX_MCBSP_PDATA_SZ 0
163 #ifdef CONFIG_ARCH_OMAP34XX
164 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
166 .phys_base = OMAP34XX_MCBSP1_BASE,
167 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
168 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
169 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
170 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
171 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
172 .ops = &omap2_mcbsp_ops,
173 .clk_name = "mcbsp_clk",
176 .phys_base = OMAP34XX_MCBSP2_BASE,
177 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
178 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
179 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
180 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
181 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
182 .ops = &omap2_mcbsp_ops,
183 .clk_name = "mcbsp_clk",
186 #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
188 #define omap34xx_mcbsp_pdata NULL
189 #define OMAP34XX_MCBSP_PDATA_SZ 0
192 int __init omap2_mcbsp_init(void)
196 for (i = 0; i < omap_mcbsp_clks_size; i++) {
197 /* Once we call clk_get inside init, we do not register it */
198 omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
199 clk_register(&omap_mcbsp_clks[i].clk);
202 if (cpu_is_omap24xx())
203 omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata,
204 OMAP24XX_MCBSP_PDATA_SZ);
206 if (cpu_is_omap34xx())
207 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
208 OMAP34XX_MCBSP_PDATA_SZ);
210 return omap_mcbsp_init();
212 arch_initcall(omap2_mcbsp_init);