2 * Driver for NEC VR4100 series Serial Interface Unit.
4 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
6 * Based on drivers/serial/8250.c, by Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/console.h>
29 #include <linux/device.h>
30 #include <linux/err.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/interrupt.h>
34 #include <linux/module.h>
35 #include <linux/serial.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial_reg.h>
38 #include <linux/tty.h>
39 #include <linux/tty_flip.h>
42 #include <asm/vr41xx/siu.h>
43 #include <asm/vr41xx/vr41xx.h>
45 #define SIU_PORTS_MAX 2
46 #define SIU_BAUD_BASE 1152000
48 #define SIU_MINOR_BASE 82
50 #define RX_MAX_COUNT 256
51 #define TX_MAX_COUNT 15
57 #define IRMSEL_HP 0x08
58 #define IRMSEL_TEMIC 0x04
59 #define IRMSEL_SHARP 0x00
69 static const struct siu_port siu_type1_ports[] = {
70 { .type = PORT_VR41XX_SIU,
72 .start = 0x0c000000UL, },
75 #define SIU_TYPE1_NR_PORTS (sizeof(siu_type1_ports) / sizeof(struct siu_port))
77 static const struct siu_port siu_type2_ports[] = {
78 { .type = PORT_VR41XX_SIU,
80 .start = 0x0f000800UL, },
81 { .type = PORT_VR41XX_DSIU,
83 .start = 0x0f000820UL, },
86 #define SIU_TYPE2_NR_PORTS (sizeof(siu_type2_ports) / sizeof(struct siu_port))
88 static struct uart_port siu_uart_ports[SIU_PORTS_MAX];
89 static uint8_t lsr_break_flag[SIU_PORTS_MAX];
91 #define siu_read(port, offset) readb((port)->membase + (offset))
92 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
94 void vr41xx_select_siu_interface(siu_interface_t interface)
96 struct uart_port *port;
100 port = &siu_uart_ports[0];
102 spin_lock_irqsave(&port->lock, flags);
104 irsel = siu_read(port, SIUIRSEL);
105 if (interface == SIU_INTERFACE_IRDA)
109 siu_write(port, SIUIRSEL, irsel);
111 spin_unlock_irqrestore(&port->lock, flags);
114 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
116 void vr41xx_use_irda(irda_use_t use)
118 struct uart_port *port;
122 port = &siu_uart_ports[0];
124 spin_lock_irqsave(&port->lock, flags);
126 irsel = siu_read(port, SIUIRSEL);
127 if (use == FIR_USE_IRDA)
131 siu_write(port, SIUIRSEL, irsel);
133 spin_unlock_irqrestore(&port->lock, flags);
136 EXPORT_SYMBOL_GPL(vr41xx_use_irda);
138 void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
140 struct uart_port *port;
144 port = &siu_uart_ports[0];
146 spin_lock_irqsave(&port->lock, flags);
148 irsel = siu_read(port, SIUIRSEL);
149 irsel &= ~(IRMSEL | TMICTX | TMICMODE);
152 irsel |= IRMSEL_SHARP;
155 irsel |= IRMSEL_TEMIC | TMICMODE;
156 if (speed == IRDA_TX_4MBPS)
165 siu_write(port, SIUIRSEL, irsel);
167 spin_unlock_irqrestore(&port->lock, flags);
170 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
172 static inline void siu_clear_fifo(struct uart_port *port)
174 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
175 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
176 UART_FCR_CLEAR_XMIT);
177 siu_write(port, UART_FCR, 0);
180 static inline int siu_probe_ports(void)
182 switch (current_cpu_data.cputype) {
185 return SIU_TYPE1_NR_PORTS;
189 return SIU_TYPE2_NR_PORTS;
195 static inline unsigned long siu_port_size(struct uart_port *port)
197 switch (port->type) {
198 case PORT_VR41XX_SIU:
200 case PORT_VR41XX_DSIU:
207 static inline unsigned int siu_check_type(struct uart_port *port)
209 switch (current_cpu_data.cputype) {
213 return PORT_VR41XX_SIU;
219 return PORT_VR41XX_SIU;
220 else if (port->line == 1)
221 return PORT_VR41XX_DSIU;
228 static inline const char *siu_type_name(struct uart_port *port)
230 switch (port->type) {
231 case PORT_VR41XX_SIU:
233 case PORT_VR41XX_DSIU:
240 static unsigned int siu_tx_empty(struct uart_port *port)
244 lsr = siu_read(port, UART_LSR);
245 if (lsr & UART_LSR_TEMT)
251 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
255 if (mctrl & TIOCM_DTR)
257 if (mctrl & TIOCM_RTS)
259 if (mctrl & TIOCM_OUT1)
260 mcr |= UART_MCR_OUT1;
261 if (mctrl & TIOCM_OUT2)
262 mcr |= UART_MCR_OUT2;
263 if (mctrl & TIOCM_LOOP)
264 mcr |= UART_MCR_LOOP;
266 siu_write(port, UART_MCR, mcr);
269 static unsigned int siu_get_mctrl(struct uart_port *port)
272 unsigned int mctrl = 0;
274 msr = siu_read(port, UART_MSR);
275 if (msr & UART_MSR_DCD)
277 if (msr & UART_MSR_RI)
279 if (msr & UART_MSR_DSR)
281 if (msr & UART_MSR_CTS)
287 static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop)
292 spin_lock_irqsave(&port->lock, flags);
294 ier = siu_read(port, UART_IER);
295 ier &= ~UART_IER_THRI;
296 siu_write(port, UART_IER, ier);
298 spin_unlock_irqrestore(&port->lock, flags);
301 static void siu_start_tx(struct uart_port *port, unsigned int tty_start)
306 spin_lock_irqsave(&port->lock, flags);
308 ier = siu_read(port, UART_IER);
309 ier |= UART_IER_THRI;
310 siu_write(port, UART_IER, ier);
312 spin_unlock_irqrestore(&port->lock, flags);
315 static void siu_stop_rx(struct uart_port *port)
320 spin_lock_irqsave(&port->lock, flags);
322 ier = siu_read(port, UART_IER);
323 ier &= ~UART_IER_RLSI;
324 siu_write(port, UART_IER, ier);
326 port->read_status_mask &= ~UART_LSR_DR;
328 spin_unlock_irqrestore(&port->lock, flags);
331 static void siu_enable_ms(struct uart_port *port)
336 spin_lock_irqsave(&port->lock, flags);
338 ier = siu_read(port, UART_IER);
340 siu_write(port, UART_IER, ier);
342 spin_unlock_irqrestore(&port->lock, flags);
345 static void siu_break_ctl(struct uart_port *port, int ctl)
350 spin_lock_irqsave(&port->lock, flags);
352 lcr = siu_read(port, UART_LCR);
356 lcr &= ~UART_LCR_SBC;
357 siu_write(port, UART_LCR, lcr);
359 spin_unlock_irqrestore(&port->lock, flags);
362 static inline void receive_chars(struct uart_port *port, uint8_t *status,
363 struct pt_regs *regs)
365 struct tty_struct *tty;
368 int max_count = RX_MAX_COUNT;
370 tty = port->info->tty;
374 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
375 if (tty->low_latency)
376 tty_flip_buffer_push(tty);
379 ch = siu_read(port, UART_RX);
383 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
384 lsr |= lsr_break_flag[port->line];
385 lsr_break_flag[port->line] = 0;
387 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
388 UART_LSR_PE | UART_LSR_OE))) {
389 if (lsr & UART_LSR_BI) {
390 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
393 if (uart_handle_break(port))
397 if (lsr & UART_LSR_FE)
398 port->icount.frame++;
399 if (lsr & UART_LSR_PE)
400 port->icount.parity++;
401 if (lsr & UART_LSR_OE)
402 port->icount.overrun++;
404 lsr &= port->read_status_mask;
405 if (lsr & UART_LSR_BI)
407 if (lsr & UART_LSR_FE)
409 if (lsr & UART_LSR_PE)
413 if (uart_handle_sysrq_char(port, ch, regs))
416 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
419 lsr = siu_read(port, UART_LSR);
420 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
422 tty_flip_buffer_push(tty);
427 static inline void check_modem_status(struct uart_port *port)
431 msr = siu_read(port, UART_MSR);
432 if ((msr & UART_MSR_ANY_DELTA) == 0)
434 if (msr & UART_MSR_DDCD)
435 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
436 if (msr & UART_MSR_TERI)
438 if (msr & UART_MSR_DDSR)
440 if (msr & UART_MSR_DCTS)
441 uart_handle_cts_change(port, msr & UART_MSR_CTS);
443 wake_up_interruptible(&port->info->delta_msr_wait);
446 static inline void transmit_chars(struct uart_port *port)
448 struct circ_buf *xmit;
449 int max_count = TX_MAX_COUNT;
451 xmit = &port->info->xmit;
454 siu_write(port, UART_TX, port->x_char);
460 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
461 siu_stop_tx(port, 0);
466 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
467 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
469 if (uart_circ_empty(xmit))
471 } while (max_count-- > 0);
473 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
474 uart_write_wakeup(port);
476 if (uart_circ_empty(xmit))
477 siu_stop_tx(port, 0);
480 static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs)
482 struct uart_port *port;
488 port = (struct uart_port *)dev_id;
490 iir = siu_read(port, UART_IIR);
491 if (iir & UART_IIR_NO_INT)
494 lsr = siu_read(port, UART_LSR);
495 if (lsr & UART_LSR_DR)
496 receive_chars(port, &lsr, regs);
498 check_modem_status(port);
500 if (lsr & UART_LSR_THRE)
501 transmit_chars(port);
506 static int siu_startup(struct uart_port *port)
510 siu_clear_fifo(port);
512 (void)siu_read(port, UART_LSR);
513 (void)siu_read(port, UART_RX);
514 (void)siu_read(port, UART_IIR);
515 (void)siu_read(port, UART_MSR);
517 if (siu_read(port, UART_LSR) == 0xff)
520 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
524 if (port->type == PORT_VR41XX_DSIU)
525 vr41xx_enable_dsiuint(DSIUINT_ALL);
527 siu_write(port, UART_LCR, UART_LCR_WLEN8);
529 spin_lock_irq(&port->lock);
530 siu_set_mctrl(port, port->mctrl);
531 spin_unlock_irq(&port->lock);
533 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
535 (void)siu_read(port, UART_LSR);
536 (void)siu_read(port, UART_RX);
537 (void)siu_read(port, UART_IIR);
538 (void)siu_read(port, UART_MSR);
543 static void siu_shutdown(struct uart_port *port)
548 if (port->membase == NULL)
551 siu_write(port, UART_IER, 0);
553 spin_lock_irqsave(&port->lock, flags);
555 port->mctrl &= ~TIOCM_OUT2;
556 siu_set_mctrl(port, port->mctrl);
558 spin_unlock_irqrestore(&port->lock, flags);
560 lcr = siu_read(port, UART_LCR);
561 lcr &= ~UART_LCR_SBC;
562 siu_write(port, UART_LCR, lcr);
564 siu_clear_fifo(port);
566 (void)siu_read(port, UART_RX);
568 if (port->type == PORT_VR41XX_DSIU)
569 vr41xx_disable_dsiuint(DSIUINT_ALL);
571 free_irq(port->irq, port);
574 static void siu_set_termios(struct uart_port *port, struct termios *new,
577 tcflag_t c_cflag, c_iflag;
578 uint8_t lcr, fcr, ier;
579 unsigned int baud, quot;
582 c_cflag = new->c_cflag;
583 switch (c_cflag & CSIZE) {
585 lcr = UART_LCR_WLEN5;
588 lcr = UART_LCR_WLEN6;
591 lcr = UART_LCR_WLEN7;
594 lcr = UART_LCR_WLEN8;
598 if (c_cflag & CSTOPB)
599 lcr |= UART_LCR_STOP;
600 if (c_cflag & PARENB)
601 lcr |= UART_LCR_PARITY;
602 if ((c_cflag & PARODD) != PARODD)
603 lcr |= UART_LCR_EPAR;
604 if (c_cflag & CMSPAR)
605 lcr |= UART_LCR_SPAR;
607 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
608 quot = uart_get_divisor(port, baud);
610 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
612 spin_lock_irqsave(&port->lock, flags);
614 uart_update_timeout(port, c_cflag, baud);
616 c_iflag = new->c_iflag;
618 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
620 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
621 if (c_iflag & (BRKINT | PARMRK))
622 port->read_status_mask |= UART_LSR_BI;
624 port->ignore_status_mask = 0;
625 if (c_iflag & IGNPAR)
626 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
627 if (c_iflag & IGNBRK) {
628 port->ignore_status_mask |= UART_LSR_BI;
629 if (c_iflag & IGNPAR)
630 port->ignore_status_mask |= UART_LSR_OE;
633 if ((c_cflag & CREAD) == 0)
634 port->ignore_status_mask |= UART_LSR_DR;
636 ier = siu_read(port, UART_IER);
637 ier &= ~UART_IER_MSI;
638 if (UART_ENABLE_MS(port, c_cflag))
640 siu_write(port, UART_IER, ier);
642 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
644 siu_write(port, UART_DLL, (uint8_t)quot);
645 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
647 siu_write(port, UART_LCR, lcr);
649 siu_write(port, UART_FCR, fcr);
651 siu_set_mctrl(port, port->mctrl);
653 spin_unlock_irqrestore(&port->lock, flags);
656 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
660 switch (port->type) {
661 case PORT_VR41XX_SIU:
662 vr41xx_supply_clock(SIU_CLOCK);
664 case PORT_VR41XX_DSIU:
665 vr41xx_supply_clock(DSIU_CLOCK);
670 switch (port->type) {
671 case PORT_VR41XX_SIU:
672 vr41xx_mask_clock(SIU_CLOCK);
674 case PORT_VR41XX_DSIU:
675 vr41xx_mask_clock(DSIU_CLOCK);
682 static const char *siu_type(struct uart_port *port)
684 return siu_type_name(port);
687 static void siu_release_port(struct uart_port *port)
691 if (port->flags & UPF_IOREMAP) {
692 iounmap(port->membase);
693 port->membase = NULL;
696 size = siu_port_size(port);
697 release_mem_region(port->mapbase, size);
700 static int siu_request_port(struct uart_port *port)
703 struct resource *res;
705 size = siu_port_size(port);
706 res = request_mem_region(port->mapbase, size, siu_type_name(port));
710 if (port->flags & UPF_IOREMAP) {
711 port->membase = ioremap(port->mapbase, size);
712 if (port->membase == NULL) {
713 release_resource(res);
721 static void siu_config_port(struct uart_port *port, int flags)
723 if (flags & UART_CONFIG_TYPE) {
724 port->type = siu_check_type(port);
725 (void)siu_request_port(port);
729 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
731 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
733 if (port->irq != serial->irq)
735 if (port->iotype != serial->io_type)
737 if (port->mapbase != (unsigned long)serial->iomem_base)
743 static struct uart_ops siu_uart_ops = {
744 .tx_empty = siu_tx_empty,
745 .set_mctrl = siu_set_mctrl,
746 .get_mctrl = siu_get_mctrl,
747 .stop_tx = siu_stop_tx,
748 .start_tx = siu_start_tx,
749 .stop_rx = siu_stop_rx,
750 .enable_ms = siu_enable_ms,
751 .break_ctl = siu_break_ctl,
752 .startup = siu_startup,
753 .shutdown = siu_shutdown,
754 .set_termios = siu_set_termios,
757 .release_port = siu_release_port,
758 .request_port = siu_request_port,
759 .config_port = siu_config_port,
760 .verify_port = siu_verify_port,
763 static int siu_init_ports(void)
765 const struct siu_port *siu;
766 struct uart_port *port;
769 switch (current_cpu_data.cputype) {
772 siu = siu_type1_ports;
777 siu = siu_type2_ports;
783 port = siu_uart_ports;
784 num = siu_probe_ports();
785 for (i = 0; i < num; i++) {
786 spin_lock_init(&port->lock);
787 port->irq = siu->irq;
788 port->uartclk = SIU_BAUD_BASE * 16;
791 port->iotype = UPIO_MEM;
792 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
793 port->type = siu->type;
795 port->mapbase = siu->start;
803 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
805 static void early_set_termios(struct uart_port *port, struct termios *new,
810 unsigned int baud, quot;
812 c_cflag = new->c_cflag;
813 switch (c_cflag & CSIZE) {
815 lcr = UART_LCR_WLEN5;
818 lcr = UART_LCR_WLEN6;
821 lcr = UART_LCR_WLEN7;
824 lcr = UART_LCR_WLEN8;
828 if (c_cflag & CSTOPB)
829 lcr |= UART_LCR_STOP;
830 if (c_cflag & PARENB)
831 lcr |= UART_LCR_PARITY;
832 if ((c_cflag & PARODD) != PARODD)
833 lcr |= UART_LCR_EPAR;
834 if (c_cflag & CMSPAR)
835 lcr |= UART_LCR_SPAR;
837 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
838 quot = uart_get_divisor(port, baud);
840 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
842 siu_write(port, UART_DLL, (uint8_t)quot);
843 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
845 siu_write(port, UART_LCR, lcr);
848 static struct uart_ops early_uart_ops = {
849 .set_termios = early_set_termios,
852 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
854 static void wait_for_xmitr(struct uart_port *port)
860 lsr = siu_read(port, UART_LSR);
861 if (lsr & UART_LSR_BI)
862 lsr_break_flag[port->line] = UART_LSR_BI;
864 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
866 } while (timeout-- > 0);
868 if (port->flags & UPF_CONS_FLOW) {
872 msr = siu_read(port, UART_MSR);
873 if ((msr & UART_MSR_CTS) != 0)
875 } while (timeout-- > 0);
879 static void siu_console_write(struct console *con, const char *s, unsigned count)
881 struct uart_port *port;
885 port = &siu_uart_ports[con->index];
887 ier = siu_read(port, UART_IER);
888 siu_write(port, UART_IER, 0);
890 for (i = 0; i < count && *s != '\0'; i++, s++) {
891 wait_for_xmitr(port);
892 siu_write(port, UART_TX, *s);
894 wait_for_xmitr(port);
895 siu_write(port, UART_TX, '\r');
899 wait_for_xmitr(port);
900 siu_write(port, UART_IER, ier);
903 static int siu_console_setup(struct console *con, char *options)
905 struct uart_port *port;
911 if (con->index >= SIU_PORTS_MAX)
914 port = &siu_uart_ports[con->index];
915 if (port->membase == NULL) {
916 if (port->mapbase == 0)
918 port->membase = (unsigned char __iomem *)KSEG1ADDR(port->mapbase);
921 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
924 uart_parse_options(options, &baud, &parity, &bits, &flow);
926 return uart_set_options(port, con, baud, parity, bits, flow);
929 static struct uart_driver siu_uart_driver;
931 static struct console siu_console = {
933 .write = siu_console_write,
934 .device = uart_console_device,
935 .setup = siu_console_setup,
936 .flags = CON_PRINTBUFFER,
938 .data = &siu_uart_driver,
941 static int __devinit siu_console_init(void)
943 struct uart_port *port;
946 num = siu_init_ports();
950 for (i = 0; i < num; i++) {
951 port = &siu_uart_ports[i];
952 port->ops = &early_uart_ops;
955 register_console(&siu_console);
960 console_initcall(siu_console_init);
962 #define SERIAL_VR41XX_CONSOLE &siu_console
964 #define SERIAL_VR41XX_CONSOLE NULL
967 static struct uart_driver siu_uart_driver = {
968 .owner = THIS_MODULE,
969 .driver_name = "SIU",
971 .devfs_name = "ttvr/",
973 .minor = SIU_MINOR_BASE,
974 .cons = SERIAL_VR41XX_CONSOLE,
977 static int siu_probe(struct device *dev)
979 struct uart_port *port;
982 num = siu_init_ports();
986 siu_uart_driver.nr = num;
987 retval = uart_register_driver(&siu_uart_driver);
991 for (i = 0; i < num; i++) {
992 port = &siu_uart_ports[i];
993 port->ops = &siu_uart_ops;
996 retval = uart_add_one_port(&siu_uart_driver, port);
1001 if (i == 0 && retval < 0) {
1002 uart_unregister_driver(&siu_uart_driver);
1009 static int siu_remove(struct device *dev)
1011 struct uart_port *port;
1014 for (i = 0; i < siu_uart_driver.nr; i++) {
1015 port = &siu_uart_ports[i];
1016 if (port->dev == dev) {
1017 uart_remove_one_port(&siu_uart_driver, port);
1022 uart_unregister_driver(&siu_uart_driver);
1027 static int siu_suspend(struct device *dev, pm_message_t state, u32 level)
1029 struct uart_port *port;
1032 if (level != SUSPEND_DISABLE)
1035 for (i = 0; i < siu_uart_driver.nr; i++) {
1036 port = &siu_uart_ports[i];
1037 if ((port->type == PORT_VR41XX_SIU ||
1038 port->type == PORT_VR41XX_DSIU) && port->dev == dev)
1039 uart_suspend_port(&siu_uart_driver, port);
1046 static int siu_resume(struct device *dev, u32 level)
1048 struct uart_port *port;
1051 if (level != RESUME_ENABLE)
1054 for (i = 0; i < siu_uart_driver.nr; i++) {
1055 port = &siu_uart_ports[i];
1056 if ((port->type == PORT_VR41XX_SIU ||
1057 port->type == PORT_VR41XX_DSIU) && port->dev == dev)
1058 uart_resume_port(&siu_uart_driver, port);
1064 static struct platform_device *siu_platform_device;
1066 static struct device_driver siu_device_driver = {
1068 .bus = &platform_bus_type,
1070 .remove = siu_remove,
1071 .suspend = siu_suspend,
1072 .resume = siu_resume,
1075 static int __devinit vr41xx_siu_init(void)
1079 siu_platform_device = platform_device_register_simple("SIU", -1, NULL, 0);
1080 if (IS_ERR(siu_platform_device))
1081 return PTR_ERR(siu_platform_device);
1083 retval = driver_register(&siu_device_driver);
1085 platform_device_unregister(siu_platform_device);
1090 static void __devexit vr41xx_siu_exit(void)
1092 driver_unregister(&siu_device_driver);
1094 platform_device_unregister(siu_platform_device);
1097 module_init(vr41xx_siu_init);
1098 module_exit(vr41xx_siu_exit);