3 * Copyright IBM Corporation 2001, 2005, 2006
4 * Copyright Dave Engebretsen & Todd Inglett 2001
5 * Copyright Linas Vepstas 2005, 2006
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/list.h>
27 #include <linux/pci.h>
28 #include <linux/proc_fs.h>
29 #include <linux/rbtree.h>
30 #include <linux/seq_file.h>
31 #include <linux/spinlock.h>
34 #include <asm/atomic.h>
36 #include <asm/eeh_event.h>
38 #include <asm/machdep.h>
39 #include <asm/ppc-pci.h>
44 * EEH, or "Extended Error Handling" is a PCI bridge technology for
45 * dealing with PCI bus errors that can't be dealt with within the
46 * usual PCI framework, except by check-stopping the CPU. Systems
47 * that are designed for high-availability/reliability cannot afford
48 * to crash due to a "mere" PCI error, thus the need for EEH.
49 * An EEH-capable bridge operates by converting a detected error
50 * into a "slot freeze", taking the PCI adapter off-line, making
51 * the slot behave, from the OS'es point of view, as if the slot
52 * were "empty": all reads return 0xff's and all writes are silently
53 * ignored. EEH slot isolation events can be triggered by parity
54 * errors on the address or data busses (e.g. during posted writes),
55 * which in turn might be caused by low voltage on the bus, dust,
56 * vibration, humidity, radioactivity or plain-old failed hardware.
58 * Note, however, that one of the leading causes of EEH slot
59 * freeze events are buggy device drivers, buggy device microcode,
60 * or buggy device hardware. This is because any attempt by the
61 * device to bus-master data to a memory address that is not
62 * assigned to the device will trigger a slot freeze. (The idea
63 * is to prevent devices-gone-wild from corrupting system memory).
64 * Buggy hardware/drivers will have a miserable time co-existing
67 * Ideally, a PCI device driver, when suspecting that an isolation
68 * event has occured (e.g. by reading 0xff's), will then ask EEH
69 * whether this is the case, and then take appropriate steps to
70 * reset the PCI slot, the PCI device, and then resume operations.
71 * However, until that day, the checking is done here, with the
72 * eeh_check_failure() routine embedded in the MMIO macros. If
73 * the slot is found to be isolated, an "EEH Event" is synthesized
74 * and sent out for processing.
77 /* If a device driver keeps reading an MMIO register in an interrupt
78 * handler after a slot isolation event, it might be broken.
79 * This sets the threshold for how many read attempts we allow
80 * before printing an error message.
82 #define EEH_MAX_FAILS 2100000
84 /* Time to wait for a PCI slot to report status, in milliseconds */
85 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
88 static int ibm_set_eeh_option;
89 static int ibm_set_slot_reset;
90 static int ibm_read_slot_reset_state;
91 static int ibm_read_slot_reset_state2;
92 static int ibm_slot_error_detail;
93 static int ibm_get_config_addr_info;
94 static int ibm_get_config_addr_info2;
95 static int ibm_configure_bridge;
97 int eeh_subsystem_enabled;
98 EXPORT_SYMBOL(eeh_subsystem_enabled);
100 /* Lock to avoid races due to multiple reports of an error */
101 static DEFINE_SPINLOCK(confirm_error_lock);
103 /* Buffer for reporting slot-error-detail rtas calls. Its here
104 * in BSS, and not dynamically alloced, so that it ends up in
105 * RMO where RTAS can access it.
107 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
108 static DEFINE_SPINLOCK(slot_errbuf_lock);
109 static int eeh_error_buf_size;
111 /* Buffer for reporting pci register dumps. Its here in BSS, and
112 * not dynamically alloced, so that it ends up in RMO where RTAS
115 #define EEH_PCI_REGS_LOG_LEN 4096
116 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
118 /* System monitoring statistics */
119 static unsigned long no_device;
120 static unsigned long no_dn;
121 static unsigned long no_cfg_addr;
122 static unsigned long ignored_check;
123 static unsigned long total_mmio_ffs;
124 static unsigned long false_positives;
125 static unsigned long slot_resets;
127 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
129 /* --------------------------------------------------------------- */
130 /* Below lies the EEH event infrastructure */
132 static void rtas_slot_error_detail(struct pci_dn *pdn, int severity,
133 char *driver_log, size_t loglen)
139 /* Log the error with the rtas logger */
140 spin_lock_irqsave(&slot_errbuf_lock, flags);
141 memset(slot_errbuf, 0, eeh_error_buf_size);
143 /* Use PE configuration address, if present */
144 config_addr = pdn->eeh_config_addr;
145 if (pdn->eeh_pe_config_addr)
146 config_addr = pdn->eeh_pe_config_addr;
148 rc = rtas_call(ibm_slot_error_detail,
149 8, 1, NULL, config_addr,
150 BUID_HI(pdn->phb->buid),
151 BUID_LO(pdn->phb->buid),
152 virt_to_phys(driver_log), loglen,
153 virt_to_phys(slot_errbuf),
158 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
159 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
163 * gather_pci_data - copy assorted PCI config space registers to buff
164 * @pdn: device to report data for
165 * @buf: point to buffer in which to log
166 * @len: amount of room in buffer
168 * This routine captures assorted PCI configuration space data,
169 * and puts them into a buffer for RTAS error logging.
171 static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
173 struct pci_dev *dev = pdn->pcidev;
178 n += scnprintf(buf+n, len-n, "%s\n", pdn->node->full_name);
179 printk(KERN_WARNING "EEH: of node=%s\n", pdn->node->full_name);
181 rtas_read_config(pdn, PCI_VENDOR_ID, 4, &cfg);
182 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
183 printk(KERN_WARNING "EEH: PCI device/vendor: %08x\n", cfg);
185 rtas_read_config(pdn, PCI_COMMAND, 4, &cfg);
186 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
187 printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
190 printk(KERN_WARNING "EEH: no PCI device for this of node\n");
194 /* Gather bridge-specific registers */
195 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
196 rtas_read_config(pdn, PCI_SEC_STATUS, 2, &cfg);
197 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
198 printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
200 rtas_read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg);
201 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
202 printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
205 /* Dump out the PCI-X command and status regs */
206 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
208 rtas_read_config(pdn, cap, 4, &cfg);
209 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
210 printk(KERN_WARNING "EEH: PCI-X cmd: %08x\n", cfg);
212 rtas_read_config(pdn, cap+4, 4, &cfg);
213 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
214 printk(KERN_WARNING "EEH: PCI-X status: %08x\n", cfg);
217 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
218 cap = pci_find_capability(dev, PCI_CAP_ID_EXP);
220 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
222 "EEH: PCI-E capabilities and status follow:\n");
224 for (i=0; i<=8; i++) {
225 rtas_read_config(pdn, cap+4*i, 4, &cfg);
226 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
227 printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
230 cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
232 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
234 "EEH: PCI-E AER capability register set follows:\n");
236 for (i=0; i<14; i++) {
237 rtas_read_config(pdn, cap+4*i, 4, &cfg);
238 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
239 printk(KERN_WARNING "EEH: PCI-E AER %02x: %08x\n", i, cfg);
244 /* Gather status on devices under the bridge */
245 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
246 struct device_node *dn;
248 for_each_child_of_node(pdn->node, dn) {
251 n += gather_pci_data(pdn, buf+n, len-n);
258 void eeh_slot_error_detail(struct pci_dn *pdn, int severity)
263 rtas_pci_enable(pdn, EEH_THAW_MMIO);
264 loglen = gather_pci_data(pdn, pci_regs_buf, EEH_PCI_REGS_LOG_LEN);
266 rtas_slot_error_detail(pdn, severity, pci_regs_buf, loglen);
270 * read_slot_reset_state - Read the reset state of a device node's slot
271 * @dn: device node to read
272 * @rets: array to return results in
274 static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
279 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
280 token = ibm_read_slot_reset_state2;
283 token = ibm_read_slot_reset_state;
284 rets[2] = 0; /* fake PE Unavailable info */
288 /* Use PE configuration address, if present */
289 config_addr = pdn->eeh_config_addr;
290 if (pdn->eeh_pe_config_addr)
291 config_addr = pdn->eeh_pe_config_addr;
293 return rtas_call(token, 3, outputs, rets, config_addr,
294 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
298 * eeh_wait_for_slot_status - returns error status of slot
299 * @pdn pci device node
300 * @max_wait_msecs maximum number to millisecs to wait
302 * Return negative value if a permanent error, else return
303 * Partition Endpoint (PE) status value.
305 * If @max_wait_msecs is positive, then this routine will
306 * sleep until a valid status can be obtained, or until
307 * the max allowed wait time is exceeded, in which case
311 eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs)
318 rc = read_slot_reset_state(pdn, rets);
320 if (rets[1] == 0) return -1; /* EEH is not supported */
322 if (rets[0] != 5) return rets[0]; /* return actual status */
324 if (rets[2] == 0) return -1; /* permanently unavailable */
326 if (max_wait_msecs <= 0) break;
331 "EEH: Firmware returned bad wait value=%d\n", mwait);
333 } else if (mwait > 300*1000) {
335 "EEH: Firmware is taking too long, time=%d\n", mwait);
338 max_wait_msecs -= mwait;
342 printk(KERN_WARNING "EEH: Timed out waiting for slot status\n");
347 * eeh_token_to_phys - convert EEH address token to phys address
348 * @token i/o token, should be address in the form 0xA....
350 static inline unsigned long eeh_token_to_phys(unsigned long token)
355 ptep = find_linux_pte(init_mm.pgd, token);
358 pa = pte_pfn(*ptep) << PAGE_SHIFT;
360 return pa | (token & (PAGE_SIZE-1));
364 * Return the "partitionable endpoint" (pe) under which this device lies
366 struct device_node * find_device_pe(struct device_node *dn)
368 while ((dn->parent) && PCI_DN(dn->parent) &&
369 (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
375 /** Mark all devices that are children of this device as failed.
376 * Mark the device driver too, so that it can see the failure
377 * immediately; this is critical, since some drivers poll
378 * status registers in interrupts ... If a driver is polling,
379 * and the slot is frozen, then the driver can deadlock in
380 * an interrupt context, which is bad.
383 static void __eeh_mark_slot(struct device_node *parent, int mode_flag)
385 struct device_node *dn;
387 for_each_child_of_node(parent, dn) {
389 /* Mark the pci device driver too */
390 struct pci_dev *dev = PCI_DN(dn)->pcidev;
392 PCI_DN(dn)->eeh_mode |= mode_flag;
394 if (dev && dev->driver)
395 dev->error_state = pci_channel_io_frozen;
397 __eeh_mark_slot(dn, mode_flag);
402 void eeh_mark_slot (struct device_node *dn, int mode_flag)
405 dn = find_device_pe (dn);
407 /* Back up one, since config addrs might be shared */
408 if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
411 PCI_DN(dn)->eeh_mode |= mode_flag;
413 /* Mark the pci device too */
414 dev = PCI_DN(dn)->pcidev;
416 dev->error_state = pci_channel_io_frozen;
418 __eeh_mark_slot(dn, mode_flag);
421 static void __eeh_clear_slot(struct device_node *parent, int mode_flag)
423 struct device_node *dn;
425 for_each_child_of_node(parent, dn) {
427 PCI_DN(dn)->eeh_mode &= ~mode_flag;
428 PCI_DN(dn)->eeh_check_count = 0;
429 __eeh_clear_slot(dn, mode_flag);
434 void eeh_clear_slot (struct device_node *dn, int mode_flag)
437 spin_lock_irqsave(&confirm_error_lock, flags);
439 dn = find_device_pe (dn);
441 /* Back up one, since config addrs might be shared */
442 if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
445 PCI_DN(dn)->eeh_mode &= ~mode_flag;
446 PCI_DN(dn)->eeh_check_count = 0;
447 __eeh_clear_slot(dn, mode_flag);
448 spin_unlock_irqrestore(&confirm_error_lock, flags);
452 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
454 * @dev pci device, if known
456 * Check for an EEH failure for the given device node. Call this
457 * routine if the result of a read was all 0xff's and you want to
458 * find out if this is due to an EEH slot freeze. This routine
459 * will query firmware for the EEH status.
461 * Returns 0 if there has not been an EEH error; otherwise returns
462 * a non-zero value and queues up a slot isolation event notification.
464 * It is safe to call this routine in an interrupt context.
466 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
473 const char *location;
477 if (!eeh_subsystem_enabled)
484 dn = find_device_pe(dn);
487 /* Access to IO BARs might get this far and still not want checking. */
488 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
489 pdn->eeh_mode & EEH_MODE_NOCHECK) {
492 printk ("EEH:ignored check (%x) for %s %s\n",
493 pdn->eeh_mode, pci_name (dev), dn->full_name);
498 if (!pdn->eeh_config_addr && !pdn->eeh_pe_config_addr) {
503 /* If we already have a pending isolation event for this
504 * slot, we know it's bad already, we don't need to check.
505 * Do this checking under a lock; as multiple PCI devices
506 * in one slot might report errors simultaneously, and we
507 * only want one error recovery routine running.
509 spin_lock_irqsave(&confirm_error_lock, flags);
511 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
512 pdn->eeh_check_count ++;
513 if (pdn->eeh_check_count % EEH_MAX_FAILS == 0) {
514 location = of_get_property(dn, "ibm,loc-code", NULL);
515 printk (KERN_ERR "EEH: %d reads ignored for recovering device at "
516 "location=%s driver=%s pci addr=%s\n",
517 pdn->eeh_check_count, location,
518 dev->driver->name, pci_name(dev));
519 printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n",
527 * Now test for an EEH failure. This is VERY expensive.
528 * Note that the eeh_config_addr may be a parent device
529 * in the case of a device behind a bridge, or it may be
530 * function zero of a multi-function device.
531 * In any case they must share a common PHB.
533 ret = read_slot_reset_state(pdn, rets);
535 /* If the call to firmware failed, punt */
537 printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
540 pdn->eeh_false_positives ++;
545 /* Note that config-io to empty slots may fail;
546 * they are empty when they don't have children. */
547 if ((rets[0] == 5) && (rets[2] == 0) && (dn->child == NULL)) {
549 pdn->eeh_false_positives ++;
554 /* If EEH is not supported on this device, punt. */
556 printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
559 pdn->eeh_false_positives ++;
564 /* If not the kind of error we know about, punt. */
565 if (rets[0] != 1 && rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
567 pdn->eeh_false_positives ++;
574 /* Avoid repeated reports of this failure, including problems
575 * with other functions on this device, and functions under
577 eeh_mark_slot (dn, EEH_MODE_ISOLATED);
578 spin_unlock_irqrestore(&confirm_error_lock, flags);
580 eeh_send_failure_event (dn, dev);
582 /* Most EEH events are due to device driver bugs. Having
583 * a stack trace will help the device-driver authors figure
584 * out what happened. So print that out. */
589 spin_unlock_irqrestore(&confirm_error_lock, flags);
593 EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
596 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
597 * @token i/o token, should be address in the form 0xA....
598 * @val value, should be all 1's (XXX why do we need this arg??)
600 * Check for an EEH failure at the given token address. Call this
601 * routine if the result of a read was all 0xff's and you want to
602 * find out if this is due to an EEH slot freeze event. This routine
603 * will query firmware for the EEH status.
605 * Note this routine is safe to call in an interrupt context.
607 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
611 struct device_node *dn;
613 /* Finding the phys addr + pci device; this is pretty quick. */
614 addr = eeh_token_to_phys((unsigned long __force) token);
615 dev = pci_get_device_by_addr(addr);
621 dn = pci_device_to_OF_node(dev);
622 eeh_dn_check_failure (dn, dev);
628 EXPORT_SYMBOL(eeh_check_failure);
630 /* ------------------------------------------------------------- */
631 /* The code below deals with error recovery */
634 * rtas_pci_enable - enable MMIO or DMA transfers for this slot
635 * @pdn pci device node
639 rtas_pci_enable(struct pci_dn *pdn, int function)
644 /* Use PE configuration address, if present */
645 config_addr = pdn->eeh_config_addr;
646 if (pdn->eeh_pe_config_addr)
647 config_addr = pdn->eeh_pe_config_addr;
649 rc = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
651 BUID_HI(pdn->phb->buid),
652 BUID_LO(pdn->phb->buid),
656 printk(KERN_WARNING "EEH: Unexpected state change %d, err=%d dn=%s\n",
657 function, rc, pdn->node->full_name);
659 rc = eeh_wait_for_slot_status (pdn, PCI_BUS_RESET_WAIT_MSEC);
660 if ((rc == 4) && (function == EEH_THAW_MMIO))
667 * rtas_pci_slot_reset - raises/lowers the pci #RST line
668 * @pdn pci device node
669 * @state: 1/0 to raise/lower the #RST
671 * Clear the EEH-frozen condition on a slot. This routine
672 * asserts the PCI #RST line if the 'state' argument is '1',
673 * and drops the #RST line if 'state is '0'. This routine is
674 * safe to call in an interrupt context.
679 rtas_pci_slot_reset(struct pci_dn *pdn, int state)
687 printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n",
688 pdn->node->full_name);
692 /* Use PE configuration address, if present */
693 config_addr = pdn->eeh_config_addr;
694 if (pdn->eeh_pe_config_addr)
695 config_addr = pdn->eeh_pe_config_addr;
697 rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
699 BUID_HI(pdn->phb->buid),
700 BUID_LO(pdn->phb->buid),
703 printk (KERN_WARNING "EEH: Unable to reset the failed slot,"
704 " (%d) #RST=%d dn=%s\n",
705 rc, state, pdn->node->full_name);
709 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
710 * @dev: pci device struct
711 * @state: reset state to enter
716 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
718 struct device_node *dn = pci_device_to_OF_node(dev);
719 struct pci_dn *pdn = PCI_DN(dn);
722 case pcie_deassert_reset:
723 rtas_pci_slot_reset(pdn, 0);
726 rtas_pci_slot_reset(pdn, 1);
728 case pcie_warm_reset:
729 rtas_pci_slot_reset(pdn, 3);
739 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
740 * @pdn: pci device node to be reset.
742 * Return 0 if success, else a non-zero value.
745 static void __rtas_set_slot_reset(struct pci_dn *pdn)
747 rtas_pci_slot_reset (pdn, 1);
749 /* The PCI bus requires that the reset be held high for at least
750 * a 100 milliseconds. We wait a bit longer 'just in case'. */
752 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
753 msleep (PCI_BUS_RST_HOLD_TIME_MSEC);
755 /* We might get hit with another EEH freeze as soon as the
756 * pci slot reset line is dropped. Make sure we don't miss
757 * these, and clear the flag now. */
758 eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED);
760 rtas_pci_slot_reset (pdn, 0);
762 /* After a PCI slot has been reset, the PCI Express spec requires
763 * a 1.5 second idle time for the bus to stabilize, before starting
765 #define PCI_BUS_SETTLE_TIME_MSEC 1800
766 msleep (PCI_BUS_SETTLE_TIME_MSEC);
769 int rtas_set_slot_reset(struct pci_dn *pdn)
773 /* Take three shots at resetting the bus */
774 for (i=0; i<3; i++) {
775 __rtas_set_slot_reset(pdn);
777 rc = eeh_wait_for_slot_status(pdn, PCI_BUS_RESET_WAIT_MSEC);
782 printk(KERN_ERR "EEH: unrecoverable slot failure %s\n",
783 pdn->node->full_name);
786 printk(KERN_ERR "EEH: bus reset %d failed on slot %s, rc=%d\n",
787 i+1, pdn->node->full_name, rc);
793 /* ------------------------------------------------------- */
794 /** Save and restore of PCI BARs
796 * Although firmware will set up BARs during boot, it doesn't
797 * set up device BAR's after a device reset, although it will,
798 * if requested, set up bridge configuration. Thus, we need to
799 * configure the PCI devices ourselves.
803 * __restore_bars - Restore the Base Address Registers
804 * @pdn: pci device node
806 * Loads the PCI configuration space base address registers,
807 * the expansion ROM base address, the latency timer, and etc.
808 * from the saved values in the device node.
810 static inline void __restore_bars (struct pci_dn *pdn)
815 if (NULL==pdn->phb) return;
816 for (i=4; i<10; i++) {
817 rtas_write_config(pdn, i*4, 4, pdn->config_space[i]);
820 /* 12 == Expansion ROM Address */
821 rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]);
823 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
824 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
826 rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1,
827 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
829 rtas_write_config (pdn, PCI_LATENCY_TIMER, 1,
830 SAVED_BYTE(PCI_LATENCY_TIMER));
832 /* max latency, min grant, interrupt pin and line */
833 rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
835 /* Restore PERR & SERR bits, some devices require it,
836 don't touch the other command bits */
837 rtas_read_config(pdn, PCI_COMMAND, 4, &cmd);
838 if (pdn->config_space[1] & PCI_COMMAND_PARITY)
839 cmd |= PCI_COMMAND_PARITY;
841 cmd &= ~PCI_COMMAND_PARITY;
842 if (pdn->config_space[1] & PCI_COMMAND_SERR)
843 cmd |= PCI_COMMAND_SERR;
845 cmd &= ~PCI_COMMAND_SERR;
846 rtas_write_config(pdn, PCI_COMMAND, 4, cmd);
850 * eeh_restore_bars - restore the PCI config space info
852 * This routine performs a recursive walk to the children
853 * of this device as well.
855 void eeh_restore_bars(struct pci_dn *pdn)
857 struct device_node *dn;
861 if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
862 __restore_bars (pdn);
864 for_each_child_of_node(pdn->node, dn)
865 eeh_restore_bars (PCI_DN(dn));
869 * eeh_save_bars - save device bars
871 * Save the values of the device bars. Unlike the restore
872 * routine, this routine is *not* recursive. This is because
873 * PCI devices are added individuallly; but, for the restore,
874 * an entire slot is reset at a time.
876 static void eeh_save_bars(struct pci_dn *pdn)
883 for (i = 0; i < 16; i++)
884 rtas_read_config(pdn, i * 4, 4, &pdn->config_space[i]);
888 rtas_configure_bridge(struct pci_dn *pdn)
893 /* Use PE configuration address, if present */
894 config_addr = pdn->eeh_config_addr;
895 if (pdn->eeh_pe_config_addr)
896 config_addr = pdn->eeh_pe_config_addr;
898 rc = rtas_call(ibm_configure_bridge,3,1, NULL,
900 BUID_HI(pdn->phb->buid),
901 BUID_LO(pdn->phb->buid));
903 printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n",
904 rc, pdn->node->full_name);
908 /* ------------------------------------------------------------- */
909 /* The code below deals with enabling EEH for devices during the
910 * early boot sequence. EEH must be enabled before any PCI probing
916 struct eeh_early_enable_info {
917 unsigned int buid_hi;
918 unsigned int buid_lo;
921 static int get_pe_addr (int config_addr,
922 struct eeh_early_enable_info *info)
924 unsigned int rets[3];
927 /* Use latest config-addr token on power6 */
928 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
929 /* Make sure we have a PE in hand */
930 ret = rtas_call (ibm_get_config_addr_info2, 4, 2, rets,
931 config_addr, info->buid_hi, info->buid_lo, 1);
932 if (ret || (rets[0]==0))
935 ret = rtas_call (ibm_get_config_addr_info2, 4, 2, rets,
936 config_addr, info->buid_hi, info->buid_lo, 0);
942 /* Use older config-addr token on power5 */
943 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
944 ret = rtas_call (ibm_get_config_addr_info, 4, 2, rets,
945 config_addr, info->buid_hi, info->buid_lo, 0);
953 /* Enable eeh for the given device node. */
954 static void *early_enable_eeh(struct device_node *dn, void *data)
956 unsigned int rets[3];
957 struct eeh_early_enable_info *info = data;
959 const u32 *class_code = of_get_property(dn, "class-code", NULL);
960 const u32 *vendor_id = of_get_property(dn, "vendor-id", NULL);
961 const u32 *device_id = of_get_property(dn, "device-id", NULL);
964 struct pci_dn *pdn = PCI_DN(dn);
968 pdn->eeh_check_count = 0;
969 pdn->eeh_freeze_count = 0;
970 pdn->eeh_false_positives = 0;
972 if (!of_device_is_available(dn))
975 /* Ignore bad nodes. */
976 if (!class_code || !vendor_id || !device_id)
979 /* There is nothing to check on PCI to ISA bridges */
980 if (dn->type && !strcmp(dn->type, "isa")) {
981 pdn->eeh_mode |= EEH_MODE_NOCHECK;
984 pdn->class_code = *class_code;
986 /* Ok... see if this device supports EEH. Some do, some don't,
987 * and the only way to find out is to check each and every one. */
988 regs = of_get_property(dn, "reg", NULL);
990 /* First register entry is addr (00BBSS00) */
991 /* Try to enable eeh */
992 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
993 regs[0], info->buid_hi, info->buid_lo,
998 pdn->eeh_config_addr = regs[0];
1000 /* If the newer, better, ibm,get-config-addr-info is supported,
1001 * then use that instead. */
1002 pdn->eeh_pe_config_addr = get_pe_addr(pdn->eeh_config_addr, info);
1004 /* Some older systems (Power4) allow the
1005 * ibm,set-eeh-option call to succeed even on nodes
1006 * where EEH is not supported. Verify support
1008 ret = read_slot_reset_state(pdn, rets);
1009 if ((ret == 0) && (rets[1] == 1))
1014 eeh_subsystem_enabled = 1;
1015 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
1018 printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n",
1019 dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr);
1023 /* This device doesn't support EEH, but it may have an
1024 * EEH parent, in which case we mark it as supported. */
1025 if (dn->parent && PCI_DN(dn->parent)
1026 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
1027 /* Parent supports EEH. */
1028 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
1029 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
1034 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
1043 * Initialize EEH by trying to enable it for all of the adapters in the system.
1044 * As a side effect we can determine here if eeh is supported at all.
1045 * Note that we leave EEH on so failed config cycles won't cause a machine
1046 * check. If a user turns off EEH for a particular adapter they are really
1047 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
1048 * grant access to a slot if EEH isn't enabled, and so we always enable
1049 * EEH for all slots/all devices.
1051 * The eeh-force-off option disables EEH checking globally, for all slots.
1052 * Even if force-off is set, the EEH hardware is still enabled, so that
1053 * newer systems can boot.
1055 void __init eeh_init(void)
1057 struct device_node *phb, *np;
1058 struct eeh_early_enable_info info;
1060 spin_lock_init(&confirm_error_lock);
1061 spin_lock_init(&slot_errbuf_lock);
1063 np = of_find_node_by_path("/rtas");
1067 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
1068 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
1069 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
1070 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
1071 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
1072 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
1073 ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
1074 ibm_configure_bridge = rtas_token ("ibm,configure-bridge");
1076 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
1079 eeh_error_buf_size = rtas_token("rtas-error-log-max");
1080 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
1081 eeh_error_buf_size = 1024;
1083 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
1084 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
1085 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
1086 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
1089 /* Enable EEH for all adapters. Note that eeh requires buid's */
1090 for (phb = of_find_node_by_name(NULL, "pci"); phb;
1091 phb = of_find_node_by_name(phb, "pci")) {
1094 buid = get_phb_buid(phb);
1095 if (buid == 0 || PCI_DN(phb) == NULL)
1098 info.buid_lo = BUID_LO(buid);
1099 info.buid_hi = BUID_HI(buid);
1100 traverse_pci_devices(phb, early_enable_eeh, &info);
1103 if (eeh_subsystem_enabled)
1104 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
1106 printk(KERN_WARNING "EEH: No capable adapters found\n");
1110 * eeh_add_device_early - enable EEH for the indicated device_node
1111 * @dn: device node for which to set up EEH
1113 * This routine must be used to perform EEH initialization for PCI
1114 * devices that were added after system boot (e.g. hotplug, dlpar).
1115 * This routine must be called before any i/o is performed to the
1116 * adapter (inluding any config-space i/o).
1117 * Whether this actually enables EEH or not for this device depends
1118 * on the CEC architecture, type of the device, on earlier boot
1119 * command-line arguments & etc.
1121 static void eeh_add_device_early(struct device_node *dn)
1123 struct pci_controller *phb;
1124 struct eeh_early_enable_info info;
1126 if (!dn || !PCI_DN(dn))
1128 phb = PCI_DN(dn)->phb;
1130 /* USB Bus children of PCI devices will not have BUID's */
1131 if (NULL == phb || 0 == phb->buid)
1134 info.buid_hi = BUID_HI(phb->buid);
1135 info.buid_lo = BUID_LO(phb->buid);
1136 early_enable_eeh(dn, &info);
1139 void eeh_add_device_tree_early(struct device_node *dn)
1141 struct device_node *sib;
1143 for_each_child_of_node(dn, sib)
1144 eeh_add_device_tree_early(sib);
1145 eeh_add_device_early(dn);
1147 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1150 * eeh_add_device_late - perform EEH initialization for the indicated pci device
1151 * @dev: pci device for which to set up EEH
1153 * This routine must be used to complete EEH initialization for PCI
1154 * devices that were added after system boot (e.g. hotplug, dlpar).
1156 static void eeh_add_device_late(struct pci_dev *dev)
1158 struct device_node *dn;
1161 if (!dev || !eeh_subsystem_enabled)
1165 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
1169 dn = pci_device_to_OF_node(dev);
1173 pci_addr_cache_insert_device(dev);
1174 eeh_sysfs_add_device(dev);
1177 void eeh_add_device_tree_late(struct pci_bus *bus)
1179 struct pci_dev *dev;
1181 list_for_each_entry(dev, &bus->devices, bus_list) {
1182 eeh_add_device_late(dev);
1183 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1184 struct pci_bus *subbus = dev->subordinate;
1186 eeh_add_device_tree_late(subbus);
1190 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1193 * eeh_remove_device - undo EEH setup for the indicated pci device
1194 * @dev: pci device to be removed
1196 * This routine should be called when a device is removed from
1197 * a running system (e.g. by hotplug or dlpar). It unregisters
1198 * the PCI device from the EEH subsystem. I/O errors affecting
1199 * this device will no longer be detected after this call; thus,
1200 * i/o errors affecting this slot may leave this device unusable.
1202 static void eeh_remove_device(struct pci_dev *dev)
1204 struct device_node *dn;
1205 if (!dev || !eeh_subsystem_enabled)
1208 /* Unregister the device with the EEH/PCI address search system */
1210 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
1212 pci_addr_cache_remove_device(dev);
1213 eeh_sysfs_remove_device(dev);
1215 dn = pci_device_to_OF_node(dev);
1216 if (PCI_DN(dn)->pcidev) {
1217 PCI_DN(dn)->pcidev = NULL;
1222 void eeh_remove_bus_device(struct pci_dev *dev)
1224 struct pci_bus *bus = dev->subordinate;
1225 struct pci_dev *child, *tmp;
1227 eeh_remove_device(dev);
1229 if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1230 list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
1231 eeh_remove_bus_device(child);
1234 EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
1236 static int proc_eeh_show(struct seq_file *m, void *v)
1238 if (0 == eeh_subsystem_enabled) {
1239 seq_printf(m, "EEH Subsystem is globally disabled\n");
1240 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs);
1242 seq_printf(m, "EEH Subsystem is enabled\n");
1245 "no device node=%ld\n"
1246 "no config address=%ld\n"
1247 "check not wanted=%ld\n"
1248 "eeh_total_mmio_ffs=%ld\n"
1249 "eeh_false_positives=%ld\n"
1250 "eeh_slot_resets=%ld\n",
1251 no_device, no_dn, no_cfg_addr,
1252 ignored_check, total_mmio_ffs,
1260 static int proc_eeh_open(struct inode *inode, struct file *file)
1262 return single_open(file, proc_eeh_show, NULL);
1265 static const struct file_operations proc_eeh_operations = {
1266 .open = proc_eeh_open,
1268 .llseek = seq_lseek,
1269 .release = single_release,
1272 static int __init eeh_init_proc(void)
1274 if (machine_is(pseries))
1275 proc_create("ppc64/eeh", 0, NULL, &proc_eeh_operations);
1278 __initcall(eeh_init_proc);