2 * Mips Jazz DMA controller support
3 * Copyright (C) 1995, 1996 by Andreas Busse
5 * NOTE: Some of the argument checking could be removed when
6 * things have settled down. Also, instead of returning 0xffffffff
7 * on failure of vdma_alloc() one could leave page #0 unused
8 * and return the more usual NULL pointer as logical address.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/errno.h>
15 #include <linux/bootmem.h>
16 #include <linux/spinlock.h>
17 #include <asm/mipsregs.h>
20 #include <asm/uaccess.h>
22 #include <asm/jazzdma.h>
23 #include <asm/pgtable.h>
26 * Set this to one to enable additional vdma debug code.
28 #define CONF_DEBUG_VDMA 0
30 static unsigned long vdma_pagetable_start;
32 static DEFINE_SPINLOCK(vdma_lock);
37 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
39 static int debuglvl = 3;
42 * Initialize the pagetable with a one-to-one mapping of
43 * the first 16 Mbytes of main memory and declare all
44 * entries to be unused. Using this method will at least
45 * allow some early device driver operations to work.
47 static inline void vdma_pgtbl_init(void)
49 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
50 unsigned long paddr = 0;
53 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
54 pgtbl[i].frame = paddr;
55 pgtbl[i].owner = VDMA_PAGE_EMPTY;
56 paddr += VDMA_PAGESIZE;
61 * Initialize the Jazz R4030 dma controller
63 void __init vdma_init(void)
66 * Allocate 32k of memory for DMA page tables. This needs to be page
67 * aligned and should be uncached to avoid cache flushing after every
70 vdma_pagetable_start = alloc_bootmem_low_pages(VDMA_PGTBL_SIZE);
71 if (!vdma_pagetable_start)
73 dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE);
74 vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start);
77 * Clear the R4030 translation table
81 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
82 CPHYSADDR(vdma_pagetable_start));
83 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
84 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
86 printk("VDMA: R4030 DMA pagetables initialized.\n");
90 * Allocate DMA pagetables using a simple first-fit algorithm
92 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
94 VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
95 int first, last, pages, frame, i;
96 unsigned long laddr, flags;
100 if (paddr > 0x1fffffff) {
102 printk("vdma_alloc: Invalid physical address: %08lx\n",
104 return VDMA_ERROR; /* invalid physical address */
106 if (size > 0x400000 || size == 0) {
108 printk("vdma_alloc: Invalid size: %08lx\n", size);
109 return VDMA_ERROR; /* invalid physical address */
112 spin_lock_irqsave(&vdma_lock, flags);
116 pages = (size + 4095) >> 12; /* no. of pages to allocate */
119 while (entry[first].owner != VDMA_PAGE_EMPTY &&
120 first < VDMA_PGTBL_ENTRIES) first++;
121 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
122 spin_unlock_irqrestore(&vdma_lock, flags);
127 while (entry[last].owner == VDMA_PAGE_EMPTY
128 && last - first < pages)
131 if (last - first == pages)
136 * Mark pages as allocated
138 laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
139 frame = paddr & ~(VDMA_PAGESIZE - 1);
141 for (i = first; i < last; i++) {
142 entry[i].frame = frame;
143 entry[i].owner = laddr;
144 frame += VDMA_PAGESIZE;
148 * Update translation table and return logical start address
150 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
153 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
156 if (vdma_debug > 2) {
158 for (i = first; i < last; i++)
159 printk("%08x ", i << 12);
161 for (i = first; i < last; i++)
162 printk("%08x ", entry[i].frame);
164 for (i = first; i < last; i++)
165 printk("%08x ", entry[i].owner);
169 spin_unlock_irqrestore(&vdma_lock, flags);
174 EXPORT_SYMBOL(vdma_alloc);
177 * Free previously allocated dma translation pages
178 * Note that this does NOT change the translation table,
179 * it just marks the free'd pages as unused!
181 int vdma_free(unsigned long laddr)
183 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
188 if (pgtbl[i].owner != laddr) {
190 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
195 while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
196 pgtbl[i].owner = VDMA_PAGE_EMPTY;
201 printk("vdma_free: freed %ld pages starting from %08lx\n",
202 i - (laddr >> 12), laddr);
207 EXPORT_SYMBOL(vdma_free);
210 * Map certain page(s) to another physical address.
211 * Caller must have allocated the page(s) before.
213 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
215 VDMA_PGTBL_ENTRY *pgtbl =
216 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
217 int first, pages, npages;
219 if (laddr > 0xffffff) {
222 ("vdma_map: Invalid logical address: %08lx\n",
224 return -EINVAL; /* invalid logical address */
226 if (paddr > 0x1fffffff) {
229 ("vdma_map: Invalid physical address: %08lx\n",
231 return -EINVAL; /* invalid physical address */
235 (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
238 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
239 if (first + pages > VDMA_PGTBL_ENTRIES) {
241 printk("vdma_alloc: Invalid size: %08lx\n", size);
245 paddr &= ~(VDMA_PAGESIZE - 1);
246 while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
247 if (pgtbl[first].owner != laddr) {
249 printk("Trying to remap other's pages.\n");
250 return -EPERM; /* not owner */
252 pgtbl[first].frame = paddr;
253 paddr += VDMA_PAGESIZE;
259 * Update translation table
261 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
263 if (vdma_debug > 2) {
265 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
268 for (i = first; i < first + pages; i++)
269 printk("%08x ", i << 12);
271 for (i = first; i < first + pages; i++)
272 printk("%08x ", pgtbl[i].frame);
274 for (i = first; i < first + pages; i++)
275 printk("%08x ", pgtbl[i].owner);
283 * Translate a physical address to a logical address.
284 * This will return the logical address of the first
287 unsigned long vdma_phys2log(unsigned long paddr)
291 VDMA_PGTBL_ENTRY *pgtbl =
292 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
294 frame = paddr & ~(VDMA_PAGESIZE - 1);
296 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
297 if (pgtbl[i].frame == frame)
301 if (i == VDMA_PGTBL_ENTRIES)
304 return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
307 EXPORT_SYMBOL(vdma_phys2log);
310 * Translate a logical DMA address to a physical address
312 unsigned long vdma_log2phys(unsigned long laddr)
314 VDMA_PGTBL_ENTRY *pgtbl =
315 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
317 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
320 EXPORT_SYMBOL(vdma_log2phys);
323 * Print DMA statistics
325 void vdma_stats(void)
329 printk("vdma_stats: CONFIG: %08x\n",
330 r4030_read_reg32(JAZZ_R4030_CONFIG));
331 printk("R4030 translation table base: %08x\n",
332 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
333 printk("R4030 translation table limit: %08x\n",
334 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
335 printk("vdma_stats: INV_ADDR: %08x\n",
336 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
337 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
338 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
339 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
340 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
341 printk("vdma_stats: IRQ_SOURCE: %08x\n",
342 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
343 printk("vdma_stats: I386_ERROR: %08x\n",
344 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
345 printk("vdma_chnl_modes: ");
346 for (i = 0; i < 8; i++)
348 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
351 printk("vdma_chnl_enables: ");
352 for (i = 0; i < 8; i++)
354 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
360 * DMA transfer functions
364 * Enable a DMA channel. Also clear any error conditions.
366 void vdma_enable(int channel)
371 printk("vdma_enable: channel %d\n", channel);
374 * Check error conditions first
376 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
378 printk("VDMA: Channel %d: Address error!\n", channel);
380 printk("VDMA: Channel %d: Memory error!\n", channel);
383 * Clear all interrupt flags
385 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
386 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
387 (channel << 5)) | R4030_TC_INTR
388 | R4030_MEM_INTR | R4030_ADDR_INTR);
391 * Enable the desired channel
393 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
394 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
399 EXPORT_SYMBOL(vdma_enable);
402 * Disable a DMA channel
404 void vdma_disable(int channel)
408 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
411 printk("vdma_disable: channel %d\n", channel);
412 printk("VDMA: channel %d status: %04x (%s) mode: "
413 "%02x addr: %06x count: %06x\n",
415 ((status & 0x600) ? "ERROR" : "OK"),
416 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
418 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
420 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
424 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
425 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
430 * After disabling a DMA channel a remote bus register should be
431 * read to ensure that the current DMA acknowledge cycle is completed.
433 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
436 EXPORT_SYMBOL(vdma_disable);
439 * Set DMA mode. This function accepts the mode values used
440 * to set a PC-style DMA controller. For the SCSI and FDC
441 * channels, we also set the default modes each time we're
443 * NOTE: The FAST and BURST dma modes are supported by the
444 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
447 void vdma_set_mode(int channel, int mode)
450 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
454 case JAZZ_SCSI_DMA: /* scsi */
455 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
456 /* R4030_MODE_FAST | */
457 /* R4030_MODE_BURST | */
459 R4030_MODE_WIDTH_16 |
460 R4030_MODE_ATIME_80);
463 case JAZZ_FLOPPY_DMA: /* floppy */
464 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
465 /* R4030_MODE_FAST | */
466 /* R4030_MODE_BURST | */
469 R4030_MODE_ATIME_120);
472 case JAZZ_AUDIOL_DMA:
473 case JAZZ_AUDIOR_DMA:
474 printk("VDMA: Audio DMA not supported yet.\n");
479 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
485 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
486 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
492 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
493 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
500 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
505 EXPORT_SYMBOL(vdma_set_mode);
508 * Set Transfer Address
510 void vdma_set_addr(int channel, long addr)
513 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
516 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
519 EXPORT_SYMBOL(vdma_set_addr);
524 void vdma_set_count(int channel, int count)
527 printk("vdma_set_count: channel %d, count %08x\n", channel,
530 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
533 EXPORT_SYMBOL(vdma_set_count);
538 int vdma_get_residue(int channel)
542 residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
545 printk("vdma_get_residual: channel %d: residual=%d\n",
552 * Get DMA channel enable register
554 int vdma_get_enable(int channel)
558 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
561 printk("vdma_get_enable: channel %d: enable=%d\n", channel,