1 /* sun3lance.c: Ethernet driver for SUN3 Lance chip */
4 Sun3 Lance ethernet driver, by Sam Creasey (sammy@users.qual.net).
5 This driver is a part of the linux kernel, and is thus distributed
6 under the GNU General Public License.
8 The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically
9 true for the correct IRQ and address of the lance registers. They
10 have not been widely tested, however. What we probably need is a
11 "proper" way to search for a device in the sun3's prom, but, alas,
12 linux has no such thing.
14 This driver is largely based on atarilance.c, by Roman Hodek. Other
15 sources of inspiration were the NetBSD sun3 am7990 driver, and the
16 linux sparc lance driver (sunlance.c).
18 There are more assumptions made throughout this driver, it almost
19 certainly still needs work, but it does work at least for RARP/BOOTP and
20 mounting the root NFS filesystem.
24 static char *version = "sun3lance.c: v1.2 1/12/2001 Sam Creasey (sammy@sammy.net)\n";
26 #include <linux/module.h>
27 #include <linux/stddef.h>
28 #include <linux/kernel.h>
29 #include <linux/string.h>
30 #include <linux/errno.h>
31 #include <linux/slab.h>
32 #include <linux/interrupt.h>
33 #include <linux/init.h>
34 #include <linux/ioport.h>
35 #include <linux/delay.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/skbuff.h>
39 #include <linux/bitops.h>
41 #include <asm/cacheflush.h>
42 #include <asm/setup.h>
45 #include <asm/pgtable.h>
47 #include <asm/idprom.h>
48 #include <asm/machines.h>
51 #include <asm/sun3mmu.h>
53 #include <asm/sun3xprom.h>
56 /* sun3/60 addr/irq for the lance chip. If your sun is different,
58 #define LANCE_OBIO 0x120000
59 #define LANCE_IRQ IRQ_AUTO_3
62 * 0 = silent, print only serious errors
63 * 1 = normal, print error messages
64 * 2 = debug, print debug infos
65 * 3 = debug, print even more debug infos (packet data)
71 static int lance_debug = LANCE_DEBUG;
73 static int lance_debug = 1;
75 module_param(lance_debug, int, 0);
76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");
77 MODULE_LICENSE("GPL");
79 #define DPRINTK(n,a) \
81 if (lance_debug >= n) \
86 /* we're only using 32k of memory, so we use 4 TX
87 buffers and 16 RX buffers. These values are expressed as log2. */
89 #define TX_LOG_RING_SIZE 3
90 #define RX_LOG_RING_SIZE 5
92 /* These are the derived values */
94 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
95 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
98 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
99 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
102 /* Definitions for packet buffer access: */
103 #define PKT_BUF_SZ 1544
105 /* Get the address of a packet buffer corresponding to a given buffer head */
106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base)
109 /* The LANCE Rx and Tx ring descriptors. */
110 struct lance_rx_head {
111 unsigned short base; /* Low word of base addr */
112 volatile unsigned char flag;
113 unsigned char base_hi; /* High word of base addr (unused) */
114 short buf_length; /* This length is 2s complement! */
115 volatile short msg_length; /* This length is "normal". */
118 struct lance_tx_head {
119 unsigned short base; /* Low word of base addr */
120 volatile unsigned char flag;
121 unsigned char base_hi; /* High word of base addr (unused) */
122 short length; /* Length is 2s complement! */
126 /* The LANCE initialization block, described in databook. */
127 struct lance_init_block {
128 unsigned short mode; /* Pre-set mode */
129 unsigned char hwaddr[6]; /* Physical ethernet address */
130 unsigned int filter[2]; /* Multicast filter (unused). */
131 /* Receive and transmit ring base, along with length bits. */
136 unsigned short pad[4]; /* is thie needed? */
139 /* The whole layout of the Lance shared memory */
140 struct lance_memory {
141 struct lance_init_block init;
142 struct lance_tx_head tx_head[TX_RING_SIZE];
143 struct lance_rx_head rx_head[RX_RING_SIZE];
144 char rx_data[RX_RING_SIZE][PKT_BUF_SZ];
145 char tx_data[TX_RING_SIZE][PKT_BUF_SZ];
148 /* The driver's private device structure */
150 struct lance_private {
151 volatile unsigned short *iobase;
152 struct lance_memory *mem;
153 int new_rx, new_tx; /* The next free ring entry */
154 int old_tx, old_rx; /* ring entry to be processed */
155 struct net_device_stats stats;
156 /* These two must be longs for set_bit() */
161 /* I/O register access macros */
164 #define DREG lp->iobase[0]
165 #define AREG lp->iobase[1]
166 #define REGA(a) (*( AREG = (a), &DREG ))
168 /* Definitions for the Lance */
171 #define TMD1_ENP 0x01 /* end of packet */
172 #define TMD1_STP 0x02 /* start of packet */
173 #define TMD1_DEF 0x04 /* deferred */
174 #define TMD1_ONE 0x08 /* one retry needed */
175 #define TMD1_MORE 0x10 /* more than one retry needed */
176 #define TMD1_ERR 0x40 /* error summary */
177 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
179 #define TMD1_OWN_CHIP TMD1_OWN
180 #define TMD1_OWN_HOST 0
182 /* tx_head misc field */
183 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
184 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
185 #define TMD3_LCAR 0x0800 /* carrier lost */
186 #define TMD3_LCOL 0x1000 /* late collision */
187 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
188 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
191 #define RMD1_ENP 0x01 /* end of packet */
192 #define RMD1_STP 0x02 /* start of packet */
193 #define RMD1_BUFF 0x04 /* buffer error */
194 #define RMD1_CRC 0x08 /* CRC error */
195 #define RMD1_OFLO 0x10 /* overflow */
196 #define RMD1_FRAM 0x20 /* framing error */
197 #define RMD1_ERR 0x40 /* error summary */
198 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
200 #define RMD1_OWN_CHIP RMD1_OWN
201 #define RMD1_OWN_HOST 0
204 #define CSR0 0 /* mode/status */
205 #define CSR1 1 /* init block addr (low) */
206 #define CSR2 2 /* init block addr (high) */
207 #define CSR3 3 /* misc */
208 #define CSR8 8 /* address filter */
209 #define CSR15 15 /* promiscuous mode */
212 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
213 #define CSR0_INIT 0x0001 /* initialize (RS) */
214 #define CSR0_STRT 0x0002 /* start (RS) */
215 #define CSR0_STOP 0x0004 /* stop (RS) */
216 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
217 #define CSR0_TXON 0x0010 /* transmitter on (R) */
218 #define CSR0_RXON 0x0020 /* receiver on (R) */
219 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
220 #define CSR0_INTR 0x0080 /* interrupt active (R) */
221 #define CSR0_IDON 0x0100 /* initialization done (RC) */
222 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
223 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
224 #define CSR0_MERR 0x0800 /* memory error (RC) */
225 #define CSR0_MISS 0x1000 /* missed frame (RC) */
226 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
227 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
228 #define CSR0_ERR 0x8000 /* error (RC) */
231 #define CSR3_BCON 0x0001 /* byte control */
232 #define CSR3_ACON 0x0002 /* ALE control */
233 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
235 /***************************** Prototypes *****************************/
237 static int lance_probe( struct net_device *dev);
238 static int lance_open( struct net_device *dev );
239 static void lance_init_ring( struct net_device *dev );
240 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
241 static irqreturn_t lance_interrupt( int irq, void *dev_id);
242 static int lance_rx( struct net_device *dev );
243 static int lance_close( struct net_device *dev );
244 static struct net_device_stats *lance_get_stats( struct net_device *dev );
245 static void set_multicast_list( struct net_device *dev );
247 /************************* End of Prototypes **************************/
249 struct net_device * __init sun3lance_probe(int unit)
251 struct net_device *dev;
255 /* check that this machine has an onboard lance */
256 switch(idprom->id_machtype) {
257 case SM_SUN3|SM_3_50:
258 case SM_SUN3|SM_3_60:
259 case SM_SUN3X|SM_3_80:
260 /* these machines have lance */
264 return ERR_PTR(-ENODEV);
268 return ERR_PTR(-ENODEV);
270 dev = alloc_etherdev(sizeof(struct lance_private));
272 return ERR_PTR(-ENOMEM);
274 sprintf(dev->name, "eth%d", unit);
275 netdev_boot_setup_check(dev);
278 if (!lance_probe(dev))
281 err = register_netdev(dev);
289 iounmap((void __iomem *)dev->base_addr);
296 static int __init lance_probe( struct net_device *dev)
298 unsigned long ioaddr;
300 struct lance_private *lp;
302 static int did_version;
303 volatile unsigned short *ioaddr_probe;
304 unsigned short tmp1, tmp2;
307 ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE);
311 ioaddr = SUN3X_LANCE;
314 /* test to see if there's really a lance here */
315 /* (CSRO_INIT shouldn't be readable) */
317 ioaddr_probe = (volatile unsigned short *)ioaddr;
318 tmp1 = ioaddr_probe[0];
319 tmp2 = ioaddr_probe[1];
321 ioaddr_probe[1] = CSR0;
322 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
324 if(ioaddr_probe[0] != CSR0_STOP) {
325 ioaddr_probe[0] = tmp1;
326 ioaddr_probe[1] = tmp2;
329 iounmap((void __iomem *)ioaddr);
334 lp = netdev_priv(dev);
337 MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000);
340 iounmap((void __iomem *)ioaddr);
342 printk(KERN_WARNING "SUN3 Lance couldn't allocate DVMA memory\n");
346 lp->iobase = (volatile unsigned short *)ioaddr;
347 dev->base_addr = (unsigned long)ioaddr; /* informational only */
349 REGA(CSR0) = CSR0_STOP;
351 if (request_irq(LANCE_IRQ, lance_interrupt, IRQF_DISABLED, "SUN3 Lance", dev) < 0) {
353 iounmap((void __iomem *)ioaddr);
355 dvma_free((void *)MEM);
356 printk(KERN_WARNING "SUN3 Lance unable to allocate IRQ\n");
359 dev->irq = (unsigned short)LANCE_IRQ;
362 printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ",
364 (unsigned long)ioaddr,
368 /* copy in the ethernet address from the prom */
369 for(i = 0; i < 6 ; i++)
370 dev->dev_addr[i] = idprom->id_ethaddr[i];
372 /* tell the card it's ether address, bytes swapped */
373 MEM->init.hwaddr[0] = dev->dev_addr[1];
374 MEM->init.hwaddr[1] = dev->dev_addr[0];
375 MEM->init.hwaddr[2] = dev->dev_addr[3];
376 MEM->init.hwaddr[3] = dev->dev_addr[2];
377 MEM->init.hwaddr[4] = dev->dev_addr[5];
378 MEM->init.hwaddr[5] = dev->dev_addr[4];
380 for( i = 0; i < 6; ++i )
381 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
383 MEM->init.mode = 0x0000;
384 MEM->init.filter[0] = 0x00000000;
385 MEM->init.filter[1] = 0x00000000;
386 MEM->init.rdra = dvma_vtob(MEM->rx_head);
387 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
388 (dvma_vtob(MEM->rx_head) >> 16);
389 MEM->init.tdra = dvma_vtob(MEM->tx_head);
390 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
391 (dvma_vtob(MEM->tx_head) >> 16);
393 DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n",
394 dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head),
395 (dvma_vtob(MEM->tx_head))));
397 if (did_version++ == 0)
400 /* The LANCE-specific entries in the device structure. */
401 dev->open = &lance_open;
402 dev->hard_start_xmit = &lance_start_xmit;
403 dev->stop = &lance_close;
404 dev->get_stats = &lance_get_stats;
405 dev->set_multicast_list = &set_multicast_list;
406 dev->set_mac_address = NULL;
407 // KLUDGE -- REMOVE ME
408 set_bit(__LINK_STATE_PRESENT, &dev->state);
411 memset( &lp->stats, 0, sizeof(lp->stats) );
416 static int lance_open( struct net_device *dev )
418 struct lance_private *lp = netdev_priv(dev);
421 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
423 REGA(CSR0) = CSR0_STOP;
425 lance_init_ring(dev);
427 /* From now on, AREG is kept to point to CSR0 */
428 REGA(CSR0) = CSR0_INIT;
432 if (DREG & CSR0_IDON)
434 if (i < 0 || (DREG & CSR0_ERR)) {
435 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
436 dev->name, i, DREG ));
441 DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA;
443 netif_start_queue(dev);
445 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
451 /* Initialize the LANCE Rx and Tx rings. */
453 static void lance_init_ring( struct net_device *dev )
455 struct lance_private *lp = netdev_priv(dev);
460 lp->new_rx = lp->new_tx = 0;
461 lp->old_rx = lp->old_tx = 0;
463 for( i = 0; i < TX_RING_SIZE; i++ ) {
464 MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]);
465 MEM->tx_head[i].flag = 0;
466 MEM->tx_head[i].base_hi =
467 (dvma_vtob(MEM->tx_data[i])) >>16;
468 MEM->tx_head[i].length = 0;
469 MEM->tx_head[i].misc = 0;
472 for( i = 0; i < RX_RING_SIZE; i++ ) {
473 MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]);
474 MEM->rx_head[i].flag = RMD1_OWN_CHIP;
475 MEM->rx_head[i].base_hi =
476 (dvma_vtob(MEM->rx_data[i])) >> 16;
477 MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000;
478 MEM->rx_head[i].msg_length = 0;
481 /* tell the card it's ether address, bytes swapped */
482 MEM->init.hwaddr[0] = dev->dev_addr[1];
483 MEM->init.hwaddr[1] = dev->dev_addr[0];
484 MEM->init.hwaddr[2] = dev->dev_addr[3];
485 MEM->init.hwaddr[3] = dev->dev_addr[2];
486 MEM->init.hwaddr[4] = dev->dev_addr[5];
487 MEM->init.hwaddr[5] = dev->dev_addr[4];
489 MEM->init.mode = 0x0000;
490 MEM->init.filter[0] = 0x00000000;
491 MEM->init.filter[1] = 0x00000000;
492 MEM->init.rdra = dvma_vtob(MEM->rx_head);
493 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
494 (dvma_vtob(MEM->rx_head) >> 16);
495 MEM->init.tdra = dvma_vtob(MEM->tx_head);
496 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
497 (dvma_vtob(MEM->tx_head) >> 16);
500 /* tell the lance the address of its init block */
501 REGA(CSR1) = dvma_vtob(&(MEM->init));
502 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16;
505 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON;
507 REGA(CSR3) = CSR3_BSWP;
513 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
515 struct lance_private *lp = netdev_priv(dev);
517 struct lance_tx_head *head;
520 DPRINTK( 1, ( "%s: transmit start.\n",
523 /* Transmitter timeout, serious problems. */
524 if (netif_queue_stopped(dev)) {
525 int tickssofar = jiffies - dev->trans_start;
529 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
533 * Always set BSWP after a STOP as STOP puts it back into
534 * little endian mode.
536 REGA(CSR3) = CSR3_BSWP;
537 lp->stats.tx_errors++;
539 if(lance_debug >= 2) {
541 printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n",
542 lp->old_tx, lp->new_tx,
543 lp->tx_full ? " (full)" : "",
545 for( i = 0 ; i < RX_RING_SIZE; i++ )
546 printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
547 i, MEM->rx_head[i].base,
548 -MEM->rx_head[i].buf_length,
549 MEM->rx_head[i].msg_length);
550 for( i = 0 ; i < TX_RING_SIZE; i++ )
551 printk("tx #%d: base=%04x len=%04x misc=%04x\n",
552 i, MEM->tx_head[i].base,
553 -MEM->tx_head[i].length,
554 MEM->tx_head[i].misc );
557 lance_init_ring(dev);
558 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
560 netif_start_queue(dev);
561 dev->trans_start = jiffies;
567 /* Block a timer-based transmit from overlapping. This could better be
568 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
570 /* Block a timer-based transmit from overlapping with us by
571 stopping the queue for a bit... */
573 netif_stop_queue(dev);
575 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) {
576 printk( "%s: tx queue lock!.\n", dev->name);
577 /* don't clear dev->tbusy flag. */
582 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
586 /* this weirdness doesn't appear on sun3... */
587 if(!(DREG & CSR0_INIT)) {
588 DPRINTK( 1, ("INIT not set, reinitializing...\n"));
589 REGA( CSR0 ) = CSR0_STOP;
590 lance_init_ring(dev);
591 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT;
595 /* Fill in a Tx ring entry */
597 if (lance_debug >= 2) {
600 printk( "%s: TX pkt %d type 0x%04x from ", dev->name,
601 lp->new_tx, ((u_short *)skb->data)[6]);
602 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
603 printk("%02x%s", *p++, i != 5 ? ":" : "" );
605 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
606 printk("%02x%s", *p++, i != 5 ? ":" : "" );
607 printk(" data at 0x%08x len %d\n", (int)skb->data,
611 /* We're not prepared for the int until the last flags are set/reset.
612 * And the int may happen already after setting the OWN_CHIP... */
613 local_irq_save(flags);
615 /* Mask to ring buffer boundary. */
617 head = &(MEM->tx_head[entry]);
619 /* Caution: the write order is important here, set the "ownership" bits
623 /* the sun3's lance needs it's buffer padded to the minimum
625 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
627 // head->length = -len;
628 head->length = (-len) | 0xf000;
631 skb_copy_from_linear_data(skb, PKTBUF_ADDR(head), skb->len);
633 memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len);
635 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
636 lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK;
637 lp->stats.tx_bytes += skb->len;
639 /* Trigger an immediate send poll. */
640 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;
642 DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n",
644 dev->trans_start = jiffies;
645 dev_kfree_skb( skb );
648 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
650 netif_start_queue(dev);
652 local_irq_restore(flags);
657 /* The LANCE interrupt handler. */
659 static irqreturn_t lance_interrupt( int irq, void *dev_id)
661 struct net_device *dev = dev_id;
662 struct lance_private *lp = netdev_priv(dev);
664 static int in_interrupt;
667 DPRINTK( 1, ( "lance_interrupt(): invalid dev_id\n" ));
672 DPRINTK( 2, ( "%s: Re-entering the interrupt handler.\n", dev->name ));
682 DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON);
686 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS;
689 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
690 dev->name, csr0, DREG ));
692 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
693 int old_tx = lp->old_tx;
695 // if(lance_debug >= 3) {
698 // printk("%s: tx int\n", dev->name);
700 // for(i = 0; i < TX_RING_SIZE; i++)
701 // printk("ring %d flag=%04x\n", i,
702 // MEM->tx_head[i].flag);
705 while( old_tx != lp->new_tx) {
706 struct lance_tx_head *head = &(MEM->tx_head[old_tx]);
708 DPRINTK(3, ("on tx_ring %d\n", old_tx));
710 if (head->flag & TMD1_OWN_CHIP)
711 break; /* It still hasn't been Txed */
713 if (head->flag & TMD1_ERR) {
714 int status = head->misc;
715 lp->stats.tx_errors++;
716 if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
717 if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
718 if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
719 if (status & (TMD3_UFLO | TMD3_BUFF)) {
720 lp->stats.tx_fifo_errors++;
721 printk("%s: Tx FIFO error\n",
723 REGA(CSR0) = CSR0_STOP;
724 REGA(CSR3) = CSR3_BSWP;
725 lance_init_ring(dev);
726 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
729 } else if(head->flag & (TMD1_ENP | TMD1_STP)) {
731 head->flag &= ~(TMD1_ENP | TMD1_STP);
732 if(head->flag & (TMD1_ONE | TMD1_MORE))
733 lp->stats.collisions++;
735 lp->stats.tx_packets++;
736 DPRINTK(3, ("cleared tx ring %d\n", old_tx));
738 old_tx = (old_tx +1) & TX_RING_MOD_MASK;
745 if (netif_queue_stopped(dev)) {
746 /* The ring is no longer full, clear tbusy. */
747 netif_start_queue(dev);
748 netif_wake_queue(dev);
751 if (csr0 & CSR0_RINT) /* Rx interrupt */
754 /* Log misc errors. */
755 if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */
756 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
757 if (csr0 & CSR0_MERR) {
758 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
759 "status %04x.\n", dev->name, csr0 ));
760 /* Restart the chip. */
761 REGA(CSR0) = CSR0_STOP;
762 REGA(CSR3) = CSR3_BSWP;
763 lance_init_ring(dev);
764 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
768 /* Clear any other interrupt, and set interrupt enable. */
769 // DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
770 // CSR0_IDON | CSR0_INEA;
772 REGA(CSR0) = CSR0_INEA;
774 if(DREG & (CSR0_RINT | CSR0_TINT)) {
775 DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG));
779 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
785 /* get packet, toss into skbuff */
786 static int lance_rx( struct net_device *dev )
788 struct lance_private *lp = netdev_priv(dev);
789 int entry = lp->new_rx;
791 /* If we own the next entry, it's a new packet. Send it up. */
792 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
793 struct lance_rx_head *head = &(MEM->rx_head[entry]);
794 int status = head->flag;
796 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
797 /* There is a tricky error noted by John Murphy,
798 <murf@perftech.com> to Russ Nelson: Even with
799 full-sized buffers it's possible for a jabber packet to use two
800 buffers, with only the last correctly noting the error. */
801 if (status & RMD1_ENP) /* Only count a general error at the */
802 lp->stats.rx_errors++; /* end of a packet.*/
803 if (status & RMD1_FRAM) lp->stats.rx_frame_errors++;
804 if (status & RMD1_OFLO) lp->stats.rx_over_errors++;
805 if (status & RMD1_CRC) lp->stats.rx_crc_errors++;
806 if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++;
807 head->flag &= (RMD1_ENP|RMD1_STP);
809 /* Malloc up new buffer, compatible with net-3. */
810 // short pkt_len = head->msg_length;// & 0xfff;
811 short pkt_len = (head->msg_length & 0xfff) - 4;
815 printk( "%s: Runt packet!\n", dev->name );
816 lp->stats.rx_errors++;
819 skb = dev_alloc_skb( pkt_len+2 );
821 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
824 lp->stats.rx_dropped++;
825 head->msg_length = 0;
826 head->flag |= RMD1_OWN_CHIP;
827 lp->new_rx = (lp->new_rx+1) &
832 if (lance_debug >= 3) {
833 u_char *data = PKTBUF_ADDR(head), *p;
834 printk( "%s: RX pkt %d type 0x%04x from ", dev->name, entry, ((u_short *)data)[6]);
835 for( p = &data[6], i = 0; i < 6; i++ )
836 printk("%02x%s", *p++, i != 5 ? ":" : "" );
838 for( p = data, i = 0; i < 6; i++ )
839 printk("%02x%s", *p++, i != 5 ? ":" : "" );
840 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
842 data[15], data[16], data[17], data[18],
843 data[19], data[20], data[21], data[22],
847 if (lance_debug >= 3) {
848 u_char *data = PKTBUF_ADDR(head);
849 printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len);
853 skb_reserve( skb, 2 ); /* 16 byte align */
854 skb_put( skb, pkt_len ); /* Make room */
855 skb_copy_to_linear_data(skb,
859 skb->protocol = eth_type_trans( skb, dev );
861 dev->last_rx = jiffies;
862 lp->stats.rx_packets++;
863 lp->stats.rx_bytes += pkt_len;
867 // head->buf_length = -PKT_BUF_SZ | 0xf000;
868 head->msg_length = 0;
869 head->flag = RMD1_OWN_CHIP;
871 entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK;
874 /* From lance.c (Donald Becker): */
875 /* We should check that at least two ring entries are free.
876 If not, we should free one and mark stats->rx_dropped++. */
882 static int lance_close( struct net_device *dev )
884 struct lance_private *lp = netdev_priv(dev);
886 netif_stop_queue(dev);
890 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
893 /* We stop the LANCE here -- it occasionally polls
894 memory if we don't. */
900 static struct net_device_stats *lance_get_stats( struct net_device *dev )
902 struct lance_private *lp = netdev_priv(dev);
908 /* Set or clear the multicast filter for this adaptor.
909 num_addrs == -1 Promiscuous mode, receive all packets
910 num_addrs == 0 Normal mode, clear multicast list
911 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
912 best-effort filtering.
915 /* completely untested on a sun3 */
916 static void set_multicast_list( struct net_device *dev )
918 struct lance_private *lp = netdev_priv(dev);
920 if(netif_queue_stopped(dev))
921 /* Only possible if board is already started */
924 /* We take the simple way out and always enable promiscuous mode. */
925 DREG = CSR0_STOP; /* Temporarily stop the lance. */
927 if (dev->flags & IFF_PROMISC) {
928 /* Log any net taps. */
929 DPRINTK( 3, ( "%s: Promiscuous mode enabled.\n", dev->name ));
930 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
932 short multicast_table[4];
933 int num_addrs = dev->mc_count;
935 /* We don't use the multicast table, but rely on upper-layer
937 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
938 sizeof(multicast_table) );
939 for( i = 0; i < 4; i++ )
940 REGA( CSR8+i ) = multicast_table[i];
941 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
945 * Always set BSWP after a STOP as STOP puts it back into
946 * little endian mode.
948 REGA( CSR3 ) = CSR3_BSWP;
950 /* Resume normal operation and reset AREG to CSR0 */
951 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
957 static struct net_device *sun3lance_dev;
959 int __init init_module(void)
961 sun3lance_dev = sun3lance_probe(-1);
962 if (IS_ERR(sun3lance_dev))
963 return PTR_ERR(sun3lance_dev);
967 void __exit cleanup_module(void)
969 unregister_netdev(sun3lance_dev);
971 iounmap((void __iomem *)sun3lance_dev->base_addr);
973 free_netdev(sun3lance_dev);