2 * Frame buffer driver for Trident Blade and Image series
4 * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro>
7 * CREDITS:(in order of appearance)
8 * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
9 * Special thanks ;) to Mattia Crivellini <tia@mclink.it>
10 * much inspired by the XFree86 4.x Trident driver sources
11 * by Alan Hourihane the FreeVGA project
12 * Francesco Salvestrini <salvestrini@users.sf.net> XP support,
15 * timing value tweaking so it looks good on every monitor in every mode
19 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/pci.h>
24 #include <linux/delay.h>
25 #include <video/trident.h>
27 #define VERSION "0.7.9-NEWAPI"
29 struct tridentfb_par {
30 void __iomem *io_virt; /* iospace virtual memory address */
35 static unsigned char eng_oper; /* engine operation... */
36 static struct fb_ops tridentfb_ops;
38 static struct fb_fix_screeninfo tridentfb_fix = {
40 .type = FB_TYPE_PACKED_PIXELS,
42 .visual = FB_VISUAL_PSEUDOCOLOR,
43 .accel = FB_ACCEL_NONE,
46 static int displaytype;
48 /* defaults which are normally overriden by user values */
51 static char *mode_option __devinitdata = "640x480";
66 module_param(mode_option, charp, 0);
67 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
68 module_param_named(mode, mode_option, charp, 0);
69 MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
70 module_param(bpp, int, 0);
71 module_param(center, int, 0);
72 module_param(stretch, int, 0);
73 module_param(noaccel, int, 0);
74 module_param(memsize, int, 0);
75 module_param(memdiff, int, 0);
76 module_param(nativex, int, 0);
77 module_param(fp, int, 0);
78 module_param(crt, int, 0);
80 static int is3Dchip(int id)
82 return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
83 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
84 (id == CYBER9397) || (id == CYBER9397DVD) ||
85 (id == CYBER9520) || (id == CYBER9525DVD) ||
86 (id == IMAGE975) || (id == IMAGE985) ||
87 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
88 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
89 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
90 (id == CYBERBLADEXPAi1));
93 static int iscyber(int id)
109 case CYBERBLADEXPAi1:
117 case CYBERBLADEi7: /* VIA MPV4 integrated version */
120 /* case CYBERBLDAEXPm8: Strange */
121 /* case CYBERBLDAEXPm16: Strange */
126 #define CRT 0x3D0 /* CRTC registers offset for color display */
128 static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg)
130 fb_writeb(val, p->io_virt + reg);
133 static inline u8 t_inb(struct tridentfb_par *p, u16 reg)
135 return fb_readb(p->io_virt + reg);
138 static struct accel_switch {
139 void (*init_accel) (struct tridentfb_par *, int, int);
140 void (*wait_engine) (struct tridentfb_par *);
142 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
144 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
147 static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v)
149 fb_writel(v, par->io_virt + r);
152 static inline u32 readmmr(struct tridentfb_par *par, u16 r)
154 return fb_readl(par->io_virt + r);
158 * Blade specific acceleration.
161 #define point(x, y) ((y) << 16 | (x))
173 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp)
175 int v1 = (pitch >> 3) << 20;
192 v2 = v1 | (tmp << 29);
193 writemmr(par, 0x21C0, v2);
194 writemmr(par, 0x21C4, v2);
195 writemmr(par, 0x21B8, v2);
196 writemmr(par, 0x21BC, v2);
197 writemmr(par, 0x21D0, v1);
198 writemmr(par, 0x21D4, v1);
199 writemmr(par, 0x21C8, v1);
200 writemmr(par, 0x21CC, v1);
201 writemmr(par, 0x216C, 0);
204 static void blade_wait_engine(struct tridentfb_par *par)
206 while (readmmr(par, STA) & 0xFA800000) ;
209 static void blade_fill_rect(struct tridentfb_par *par,
210 u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
212 writemmr(par, CLR, c);
213 writemmr(par, ROP, rop ? 0x66 : ROP_S);
214 writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
216 writemmr(par, DR1, point(x, y));
217 writemmr(par, DR2, point(x + w - 1, y + h - 1));
220 static void blade_copy_rect(struct tridentfb_par *par,
221 u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
226 s2 = point(x1 + w - 1, y1 + h - 1);
228 d2 = point(x2 + w - 1, y2 + h - 1);
230 if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
233 writemmr(par, ROP, ROP_S);
234 writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
236 writemmr(par, SR1, direction ? s2 : s1);
237 writemmr(par, SR2, direction ? s1 : s2);
238 writemmr(par, DR1, direction ? d2 : d1);
239 writemmr(par, DR2, direction ? d1 : d2);
242 static struct accel_switch accel_blade = {
250 * BladeXP specific acceleration functions
254 #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff))
256 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp)
276 switch (pitch << (bpp >> 3)) {
292 t_outb(par, x, 0x2125);
312 writemmr(par, 0x2154, v1);
313 writemmr(par, 0x2150, v1);
314 t_outb(par, 3, 0x2126);
317 static void xp_wait_engine(struct tridentfb_par *par)
325 busy = t_inb(par, STA) & 0x80;
329 if (count == 10000000) {
335 t_outb(par, 0x00, 0x2120);
342 static void xp_fill_rect(struct tridentfb_par *par,
343 u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
345 writemmr(par, 0x2127, ROP_P);
346 writemmr(par, 0x2158, c);
347 writemmr(par, 0x2128, 0x4000);
348 writemmr(par, 0x2140, masked_point(h, w));
349 writemmr(par, 0x2138, masked_point(y, x));
350 t_outb(par, 0x01, 0x2124);
351 t_outb(par, eng_oper, 0x2125);
354 static void xp_copy_rect(struct tridentfb_par *par,
355 u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
358 u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
362 if ((x1 < x2) && (y1 == y2)) {
380 writemmr(par, 0x2128, direction);
381 t_outb(par, ROP_S, 0x2127);
382 writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp));
383 writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp));
384 writemmr(par, 0x2140, masked_point(h, w));
385 t_outb(par, 0x01, 0x2124);
388 static struct accel_switch accel_xp = {
396 * Image specific acceleration functions
398 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp)
416 writemmr(par, 0x2120, 0xF0000000);
417 writemmr(par, 0x2120, 0x40000000 | tmp);
418 writemmr(par, 0x2120, 0x80000000);
419 writemmr(par, 0x2144, 0x00000000);
420 writemmr(par, 0x2148, 0x00000000);
421 writemmr(par, 0x2150, 0x00000000);
422 writemmr(par, 0x2154, 0x00000000);
423 writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
424 writemmr(par, 0x216C, 0x00000000);
425 writemmr(par, 0x2170, 0x00000000);
426 writemmr(par, 0x217C, 0x00000000);
427 writemmr(par, 0x2120, 0x10000000);
428 writemmr(par, 0x2130, (2047 << 16) | 2047);
431 static void image_wait_engine(struct tridentfb_par *par)
433 while (readmmr(par, 0x2164) & 0xF0000000) ;
436 static void image_fill_rect(struct tridentfb_par *par,
437 u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
439 writemmr(par, 0x2120, 0x80000000);
440 writemmr(par, 0x2120, 0x90000000 | ROP_S);
442 writemmr(par, 0x2144, c);
444 writemmr(par, DR1, point(x, y));
445 writemmr(par, DR2, point(x + w - 1, y + h - 1));
447 writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
450 static void image_copy_rect(struct tridentfb_par *par,
451 u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
456 s2 = point(x1 + w - 1, y1 + h - 1);
458 d2 = point(x2 + w - 1, y2 + h - 1);
460 if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
463 writemmr(par, 0x2120, 0x80000000);
464 writemmr(par, 0x2120, 0x90000000 | ROP_S);
466 writemmr(par, SR1, direction ? s2 : s1);
467 writemmr(par, SR2, direction ? s1 : s2);
468 writemmr(par, DR1, direction ? d2 : d1);
469 writemmr(par, DR2, direction ? d1 : d2);
470 writemmr(par, 0x2124,
471 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
474 static struct accel_switch accel_image = {
482 * Accel functions called by the upper layers
484 #ifdef CONFIG_FB_TRIDENT_ACCEL
485 static void tridentfb_fillrect(struct fb_info *info,
486 const struct fb_fillrect *fr)
488 struct tridentfb_par *par = info->par;
489 int bpp = info->var.bits_per_pixel;
500 col = ((u32 *)(info->pseudo_palette))[fr->color];
503 col = ((u32 *)(info->pseudo_palette))[fr->color];
507 acc->fill_rect(par, fr->dx, fr->dy, fr->width,
508 fr->height, col, fr->rop);
509 acc->wait_engine(par);
511 static void tridentfb_copyarea(struct fb_info *info,
512 const struct fb_copyarea *ca)
514 struct tridentfb_par *par = info->par;
516 acc->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy,
517 ca->width, ca->height);
518 acc->wait_engine(par);
520 #else /* !CONFIG_FB_TRIDENT_ACCEL */
521 #define tridentfb_fillrect cfb_fillrect
522 #define tridentfb_copyarea cfb_copyarea
523 #endif /* CONFIG_FB_TRIDENT_ACCEL */
527 * Hardware access functions
530 static inline unsigned char read3X4(struct tridentfb_par *par, int reg)
532 writeb(reg, par->io_virt + CRT + 4);
533 return readb(par->io_virt + CRT + 5);
536 static inline void write3X4(struct tridentfb_par *par, int reg,
539 writeb(reg, par->io_virt + CRT + 4);
540 writeb(val, par->io_virt + CRT + 5);
543 static inline unsigned char read3C4(struct tridentfb_par *par, int reg)
545 t_outb(par, reg, 0x3C4);
546 return t_inb(par, 0x3C5);
549 static inline void write3C4(struct tridentfb_par *par, int reg,
552 t_outb(par, reg, 0x3C4);
553 t_outb(par, val, 0x3C5);
556 static inline unsigned char read3CE(struct tridentfb_par *par, int reg)
558 t_outb(par, reg, 0x3CE);
559 return t_inb(par, 0x3CF);
562 static inline void writeAttr(struct tridentfb_par *par, int reg,
565 fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */
566 t_outb(par, reg, 0x3C0);
567 t_outb(par, val, 0x3C0);
570 static inline void write3CE(struct tridentfb_par *par, int reg,
573 t_outb(par, reg, 0x3CE);
574 t_outb(par, val, 0x3CF);
577 static void enable_mmio(void)
583 /* Unprotect registers */
584 outb(NewMode1, 0x3C4);
589 outb(inb(0x3D5) | 0x01, 0x3D5);
592 static void disable_mmio(struct tridentfb_par *par)
595 t_outb(par, 0x0B, 0x3C4);
598 /* Unprotect registers */
599 t_outb(par, NewMode1, 0x3C4);
600 t_outb(par, 0x80, 0x3C5);
603 t_outb(par, PCIReg, 0x3D4);
604 t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5);
607 static void crtc_unlock(struct tridentfb_par *par)
609 write3X4(par, CRTVSyncEnd, read3X4(par, CRTVSyncEnd) & 0x7F);
612 /* Return flat panel's maximum x resolution */
613 static int __devinit get_nativex(struct tridentfb_par *par)
620 tmp = (read3CE(par, VertStretch) >> 4) & 3;
641 output("%dx%d flat panel found\n", x, y);
646 static void set_lwidth(struct tridentfb_par *par, int width)
648 write3X4(par, Offset, width & 0xFF);
649 write3X4(par, AddColReg,
650 (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4));
653 /* For resolutions smaller than FP resolution stretch */
654 static void screen_stretch(struct tridentfb_par *par)
656 if (par->chip_id != CYBERBLADEXPAi1)
657 write3CE(par, BiosReg, 0);
659 write3CE(par, BiosReg, 8);
660 write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1);
661 write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1);
664 /* For resolutions smaller than FP resolution center */
665 static void screen_center(struct tridentfb_par *par)
667 write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80);
668 write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80);
671 /* Address of first shown pixel in display memory */
672 static void set_screen_start(struct tridentfb_par *par, int base)
675 write3X4(par, StartAddrLow, base & 0xFF);
676 write3X4(par, StartAddrHigh, (base & 0xFF00) >> 8);
677 tmp = read3X4(par, CRTCModuleTest) & 0xDF;
678 write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
679 tmp = read3X4(par, CRTHiOrd) & 0xF8;
680 write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
683 /* Set dotclock frequency */
684 static void set_vclk(struct tridentfb_par *par, unsigned long freq)
687 unsigned long f, fi, d, di;
688 unsigned char lo = 0, hi = 0;
691 for (k = 2; k >= 0; k--)
692 for (m = 0; m < 63; m++)
693 for (n = 0; n < 128; n++) {
694 fi = ((14318l * (n + 8)) / (m + 2)) >> k;
695 if ((di = abs(fi - freq)) < d) {
704 if (is3Dchip(par->chip_id)) {
705 write3C4(par, ClockHigh, hi);
706 write3C4(par, ClockLow, lo);
711 debug("VCLK = %X %X\n", hi, lo);
714 /* Set number of lines for flat panels*/
715 static void set_number_of_lines(struct tridentfb_par *par, int lines)
717 int tmp = read3CE(par, CyberEnhance) & 0x8F;
720 else if (lines > 768)
722 else if (lines > 600)
724 else if (lines > 480)
726 write3CE(par, CyberEnhance, tmp);
730 * If we see that FP is active we assume we have one.
731 * Otherwise we have a CRT display.User can override.
733 static unsigned int __devinit get_displaytype(struct tridentfb_par *par)
737 if (crt || !iscyber(par->chip_id))
739 return (read3CE(par, FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT;
742 /* Try detecting the video memory size */
743 static unsigned int __devinit get_memsize(struct tridentfb_par *par)
745 unsigned char tmp, tmp2;
748 /* If memory size provided by user */
752 switch (par->chip_id) {
757 tmp = read3X4(par, SPR) & 0x0F;
773 k = 10 * Mb; /* XP */
779 k = 12 * Mb; /* XP */
782 k = 14 * Mb; /* XP */
785 k = 16 * Mb; /* XP */
789 tmp2 = read3C4(par, 0xC1);
819 output("framebuffer size = %d Kb\n", k / Kb);
823 /* See if we can handle the video mode described in var */
824 static int tridentfb_check_var(struct fb_var_screeninfo *var,
825 struct fb_info *info)
827 int bpp = var->bits_per_pixel;
830 /* check color depth */
832 bpp = var->bits_per_pixel = 32;
833 /* check whether resolution fits on panel and in memory */
834 if (flatpanel && nativex && var->xres > nativex)
836 if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len)
842 var->green.offset = 0;
843 var->blue.offset = 0;
845 var->green.length = 6;
846 var->blue.length = 6;
849 var->red.offset = 11;
850 var->green.offset = 5;
851 var->blue.offset = 0;
853 var->green.length = 6;
854 var->blue.length = 5;
857 var->red.offset = 16;
858 var->green.offset = 8;
859 var->blue.offset = 0;
861 var->green.length = 8;
862 var->blue.length = 8;
873 /* Pan the display */
874 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
875 struct fb_info *info)
877 struct tridentfb_par *par = info->par;
881 offset = (var->xoffset + (var->yoffset * var->xres))
882 * var->bits_per_pixel / 32;
883 info->var.xoffset = var->xoffset;
884 info->var.yoffset = var->yoffset;
885 set_screen_start(par, offset);
890 static void shadowmode_on(struct tridentfb_par *par)
892 write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81);
895 static void shadowmode_off(struct tridentfb_par *par)
897 write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E);
900 /* Set the hardware to the requested video mode */
901 static int tridentfb_set_par(struct fb_info *info)
903 struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
904 u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
905 u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
906 struct fb_var_screeninfo *var = &info->var;
907 int bpp = var->bits_per_pixel;
912 hdispend = var->xres / 8 - 1;
913 hsyncstart = (var->xres + var->right_margin) / 8;
914 hsyncend = var->hsync_len / 8;
916 (var->xres + var->left_margin + var->right_margin +
917 var->hsync_len) / 8 - 10;
918 hblankstart = hdispend + 1;
919 hblankend = htotal + 5;
921 vdispend = var->yres - 1;
922 vsyncstart = var->yres + var->lower_margin;
923 vsyncend = var->vsync_len;
924 vtotal = var->upper_margin + vsyncstart + vsyncend - 2;
925 vblankstart = var->yres;
926 vblankend = vtotal + 2;
929 write3CE(par, CyberControl, 8);
931 if (flatpanel && var->xres < nativex) {
933 * on flat panels with native size larger
934 * than requested resolution decide whether
935 * we stretch or center
937 t_outb(par, 0xEB, 0x3C2);
947 t_outb(par, 0x2B, 0x3C2);
948 write3CE(par, CyberControl, 8);
951 /* vertical timing values */
952 write3X4(par, CRTVTotal, vtotal & 0xFF);
953 write3X4(par, CRTVDispEnd, vdispend & 0xFF);
954 write3X4(par, CRTVSyncStart, vsyncstart & 0xFF);
955 write3X4(par, CRTVSyncEnd, (vsyncend & 0x0F));
956 write3X4(par, CRTVBlankStart, vblankstart & 0xFF);
957 write3X4(par, CRTVBlankEnd, 0 /* p->vblankend & 0xFF */);
959 /* horizontal timing values */
960 write3X4(par, CRTHTotal, htotal & 0xFF);
961 write3X4(par, CRTHDispEnd, hdispend & 0xFF);
962 write3X4(par, CRTHSyncStart, hsyncstart & 0xFF);
963 write3X4(par, CRTHSyncEnd,
964 (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
965 write3X4(par, CRTHBlankStart, hblankstart & 0xFF);
966 write3X4(par, CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */);
968 /* higher bits of vertical timing values */
970 if (vtotal & 0x100) tmp |= 0x01;
971 if (vdispend & 0x100) tmp |= 0x02;
972 if (vsyncstart & 0x100) tmp |= 0x04;
973 if (vblankstart & 0x100) tmp |= 0x08;
975 if (vtotal & 0x200) tmp |= 0x20;
976 if (vdispend & 0x200) tmp |= 0x40;
977 if (vsyncstart & 0x200) tmp |= 0x80;
978 write3X4(par, CRTOverflow, tmp);
980 tmp = read3X4(par, CRTHiOrd) | 0x08; /* line compare bit 10 */
981 if (vtotal & 0x400) tmp |= 0x80;
982 if (vblankstart & 0x400) tmp |= 0x40;
983 if (vsyncstart & 0x400) tmp |= 0x20;
984 if (vdispend & 0x400) tmp |= 0x10;
985 write3X4(par, CRTHiOrd, tmp);
988 if (htotal & 0x800) tmp |= 0x800 >> 11;
989 if (hblankstart & 0x800) tmp |= 0x800 >> 7;
990 write3X4(par, HorizOverflow, tmp);
993 if (vblankstart & 0x200) tmp |= 0x20;
994 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */
995 write3X4(par, CRTMaxScanLine, tmp);
997 write3X4(par, CRTLineCompare, 0xFF);
998 write3X4(par, CRTPRowScan, 0);
999 write3X4(par, CRTModeControl, 0xC3);
1001 write3X4(par, LinearAddReg, 0x20); /* enable linear addressing */
1003 tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
1004 /* enable access extended memory */
1005 write3X4(par, CRTCModuleTest, tmp);
1007 /* enable GE for text acceleration */
1008 write3X4(par, GraphEngReg, 0x80);
1010 #ifdef CONFIG_FB_TRIDENT_ACCEL
1011 acc->init_accel(par, info->var.xres, bpp);
1029 write3X4(par, PixelBusReg, tmp);
1032 if (iscyber(par->chip_id))
1034 write3X4(par, DRAMControl, tmp); /* both IO, linear enable */
1036 write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40);
1037 write3X4(par, Performance, 0x92);
1038 /* MMIO & PCI read and write burst enable */
1039 write3X4(par, PCIReg, 0x07);
1041 /* convert from picoseconds to kHz */
1042 vclk = PICOS2KHZ(info->var.pixclock);
1045 set_vclk(par, vclk);
1047 write3C4(par, 0, 3);
1048 write3C4(par, 1, 1); /* set char clock 8 dots wide */
1049 /* enable 4 maps because needed in chain4 mode */
1050 write3C4(par, 2, 0x0F);
1051 write3C4(par, 3, 0);
1052 write3C4(par, 4, 0x0E); /* memory mode enable bitmaps ?? */
1054 /* divide clock by 2 if 32bpp chain4 mode display and CPU path */
1055 write3CE(par, MiscExtFunc, (bpp == 32) ? 0x1A : 0x12);
1056 write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */
1057 write3CE(par, 0x6, 0x05); /* graphics mode */
1058 write3CE(par, 0x7, 0x0F); /* planes? */
1060 if (par->chip_id == CYBERBLADEXPAi1) {
1061 /* This fixes snow-effect in 32 bpp */
1062 write3X4(par, CRTHSyncStart, 0x84);
1065 /* graphics mode and support 256 color modes */
1066 writeAttr(par, 0x10, 0x41);
1067 writeAttr(par, 0x12, 0x0F); /* planes */
1068 writeAttr(par, 0x13, 0); /* horizontal pel panning */
1071 for (tmp = 0; tmp < 0x10; tmp++)
1072 writeAttr(par, tmp, tmp);
1073 fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */
1074 t_outb(par, 0x20, 0x3C0); /* enable attr */
1097 t_outb(par, tmp, 0x3C6);
1101 set_number_of_lines(par, info->var.yres);
1102 set_lwidth(par, info->var.xres * bpp / (4 * 16));
1103 info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1104 info->fix.line_length = info->var.xres * (bpp >> 3);
1105 info->cmap.len = (bpp == 8) ? 256 : 16;
1110 /* Set one color register */
1111 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1112 unsigned blue, unsigned transp,
1113 struct fb_info *info)
1115 int bpp = info->var.bits_per_pixel;
1116 struct tridentfb_par *par = info->par;
1118 if (regno >= info->cmap.len)
1122 t_outb(par, 0xFF, 0x3C6);
1123 t_outb(par, regno, 0x3C8);
1125 t_outb(par, red >> 10, 0x3C9);
1126 t_outb(par, green >> 10, 0x3C9);
1127 t_outb(par, blue >> 10, 0x3C9);
1129 } else if (regno < 16) {
1130 if (bpp == 16) { /* RGB 565 */
1133 col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
1134 ((blue & 0xF800) >> 11);
1136 ((u32 *)(info->pseudo_palette))[regno] = col;
1137 } else if (bpp == 32) /* ARGB 8888 */
1138 ((u32*)info->pseudo_palette)[regno] =
1139 ((transp & 0xFF00) << 16) |
1140 ((red & 0xFF00) << 8) |
1141 ((green & 0xFF00)) |
1142 ((blue & 0xFF00) >> 8);
1145 /* debug("exit\n"); */
1149 /* Try blanking the screen.For flat panels it does nothing */
1150 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1152 unsigned char PMCont, DPMSCont;
1153 struct tridentfb_par *par = info->par;
1158 t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */
1159 PMCont = t_inb(par, 0x83C6) & 0xFC;
1160 DPMSCont = read3CE(par, PowerStatus) & 0xFC;
1161 switch (blank_mode) {
1162 case FB_BLANK_UNBLANK:
1163 /* Screen: On, HSync: On, VSync: On */
1164 case FB_BLANK_NORMAL:
1165 /* Screen: Off, HSync: On, VSync: On */
1169 case FB_BLANK_HSYNC_SUSPEND:
1170 /* Screen: Off, HSync: Off, VSync: On */
1174 case FB_BLANK_VSYNC_SUSPEND:
1175 /* Screen: Off, HSync: On, VSync: Off */
1179 case FB_BLANK_POWERDOWN:
1180 /* Screen: Off, HSync: Off, VSync: Off */
1186 write3CE(par, PowerStatus, DPMSCont);
1187 t_outb(par, 4, 0x83C8);
1188 t_outb(par, PMCont, 0x83C6);
1192 /* let fbcon do a softblank for us */
1193 return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
1196 static struct fb_ops tridentfb_ops = {
1197 .owner = THIS_MODULE,
1198 .fb_setcolreg = tridentfb_setcolreg,
1199 .fb_pan_display = tridentfb_pan_display,
1200 .fb_blank = tridentfb_blank,
1201 .fb_check_var = tridentfb_check_var,
1202 .fb_set_par = tridentfb_set_par,
1203 .fb_fillrect = tridentfb_fillrect,
1204 .fb_copyarea = tridentfb_copyarea,
1205 .fb_imageblit = cfb_imageblit,
1208 static int __devinit trident_pci_probe(struct pci_dev *dev,
1209 const struct pci_device_id *id)
1212 unsigned char revision;
1213 struct fb_info *info;
1214 struct tridentfb_par *default_par;
1219 err = pci_enable_device(dev);
1223 info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev);
1226 default_par = info->par;
1228 chip_id = id->device;
1230 if (chip_id == CYBERBLADEi1)
1231 output("*** Please do use cyblafb, Cyberblade/i1 support "
1232 "will soon be removed from tridentfb!\n");
1235 /* If PCI id is 0x9660 then further detect chip type */
1237 if (chip_id == TGUI9660) {
1238 outb(RevisionID, 0x3C4);
1239 revision = inb(0x3C5);
1244 chip_id = CYBER9397;
1247 chip_id = CYBER9397DVD;
1256 chip_id = CYBER9385;
1259 chip_id = CYBER9382;
1262 chip_id = CYBER9388;
1269 chip3D = is3Dchip(chip_id);
1271 if (is_xp(chip_id)) {
1273 } else if (is_blade(chip_id)) {
1279 default_par->chip_id = chip_id;
1281 /* acceleration is on by default for 3D chips */
1282 defaultaccel = chip3D && !noaccel;
1284 /* setup MMIO region */
1285 tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
1286 tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
1288 if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1289 debug("request_region failed!\n");
1293 default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start,
1294 tridentfb_fix.mmio_len);
1296 if (!default_par->io_virt) {
1297 debug("ioremap failed\n");
1304 /* setup framebuffer memory */
1305 tridentfb_fix.smem_start = pci_resource_start(dev, 0);
1306 tridentfb_fix.smem_len = get_memsize(default_par);
1308 if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1309 debug("request_mem_region failed!\n");
1310 disable_mmio(info->par);
1315 info->screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1316 tridentfb_fix.smem_len);
1318 if (!info->screen_base) {
1319 debug("ioremap failed\n");
1324 output("%s board found\n", pci_name(dev));
1325 displaytype = get_displaytype(default_par);
1328 nativex = get_nativex(default_par);
1330 info->fix = tridentfb_fix;
1331 info->fbops = &tridentfb_ops;
1334 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1335 #ifdef CONFIG_FB_TRIDENT_ACCEL
1336 info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
1338 if (!fb_find_mode(&info->var, info,
1339 mode_option, NULL, 0, NULL, bpp)) {
1343 err = fb_alloc_cmap(&info->cmap, 256, 0);
1347 if (defaultaccel && acc)
1348 info->var.accel_flags |= FB_ACCELF_TEXT;
1350 info->var.accel_flags &= ~FB_ACCELF_TEXT;
1351 info->var.activate |= FB_ACTIVATE_NOW;
1352 info->device = &dev->dev;
1353 if (register_framebuffer(info) < 0) {
1354 printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
1355 fb_dealloc_cmap(&info->cmap);
1359 output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1360 info->node, info->fix.id, info->var.xres,
1361 info->var.yres, info->var.bits_per_pixel);
1363 pci_set_drvdata(dev, info);
1367 if (info->screen_base)
1368 iounmap(info->screen_base);
1369 release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1370 disable_mmio(info->par);
1372 if (default_par->io_virt)
1373 iounmap(default_par->io_virt);
1374 release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1375 framebuffer_release(info);
1379 static void __devexit trident_pci_remove(struct pci_dev *dev)
1381 struct fb_info *info = pci_get_drvdata(dev);
1382 struct tridentfb_par *par = info->par;
1384 unregister_framebuffer(info);
1385 iounmap(par->io_virt);
1386 iounmap(info->screen_base);
1387 release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1388 release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1389 pci_set_drvdata(dev, NULL);
1390 framebuffer_release(info);
1393 /* List of boards that we are trying to support */
1394 static struct pci_device_id trident_devices[] = {
1395 {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1396 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1397 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1398 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1399 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1400 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1401 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1402 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1403 {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1404 {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1405 {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1406 {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1407 {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1408 {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1409 {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1410 {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1411 {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1412 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1413 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1414 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1418 MODULE_DEVICE_TABLE(pci, trident_devices);
1420 static struct pci_driver tridentfb_pci_driver = {
1421 .name = "tridentfb",
1422 .id_table = trident_devices,
1423 .probe = trident_pci_probe,
1424 .remove = __devexit_p(trident_pci_remove)
1428 * Parse user specified options (`video=trident:')
1430 * video=trident:800x600,bpp=16,noaccel
1433 static int __init tridentfb_setup(char *options)
1436 if (!options || !*options)
1438 while ((opt = strsep(&options, ",")) != NULL) {
1441 if (!strncmp(opt, "noaccel", 7))
1443 else if (!strncmp(opt, "fp", 2))
1444 displaytype = DISPLAY_FP;
1445 else if (!strncmp(opt, "crt", 3))
1446 displaytype = DISPLAY_CRT;
1447 else if (!strncmp(opt, "bpp=", 4))
1448 bpp = simple_strtoul(opt + 4, NULL, 0);
1449 else if (!strncmp(opt, "center", 6))
1451 else if (!strncmp(opt, "stretch", 7))
1453 else if (!strncmp(opt, "memsize=", 8))
1454 memsize = simple_strtoul(opt + 8, NULL, 0);
1455 else if (!strncmp(opt, "memdiff=", 8))
1456 memdiff = simple_strtoul(opt + 8, NULL, 0);
1457 else if (!strncmp(opt, "nativex=", 8))
1458 nativex = simple_strtoul(opt + 8, NULL, 0);
1466 static int __init tridentfb_init(void)
1469 char *option = NULL;
1471 if (fb_get_options("tridentfb", &option))
1473 tridentfb_setup(option);
1475 output("Trident framebuffer %s initializing\n", VERSION);
1476 return pci_register_driver(&tridentfb_pci_driver);
1479 static void __exit tridentfb_exit(void)
1481 pci_unregister_driver(&tridentfb_pci_driver);
1484 module_init(tridentfb_init);
1485 module_exit(tridentfb_exit);
1487 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1488 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1489 MODULE_LICENSE("GPL");