git.oblomov.eu Git - linux-2.6/blob - drivers/ieee1394/video1394.c

   1 /*
   2  * video1394.c - video driver for OHCI 1394 boards
   3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software Foundation,
  18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  *
  20  * NOTES:
  21  *
  22  * ioctl return codes:
  23  * EFAULT is only for invalid address for the argp
  24  * EINVAL for out of range values
  25  * EBUSY when trying to use an already used resource
  26  * ESRCH when trying to free/stop a not used resource
  27  * EAGAIN for resource allocation failure that could perhaps succeed later
  28  * ENOTTY for unsupported ioctl request
  29  *
  30  */
  31 #include <linux/kernel.h>
  32 #include <linux/list.h>
  33 #include <linux/slab.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/wait.h>
  36 #include <linux/errno.h>
  37 #include <linux/module.h>
  38 #include <linux/init.h>
  39 #include <linux/pci.h>
  40 #include <linux/fs.h>
  41 #include <linux/poll.h>
  42 #include <linux/smp_lock.h>
  43 #include <linux/delay.h>
  44 #include <linux/bitops.h>
  45 #include <linux/types.h>
  46 #include <linux/vmalloc.h>
  47 #include <linux/timex.h>
  48 #include <linux/mm.h>
  49 #include <linux/compat.h>
  50 #include <linux/cdev.h>
  51
  52 #include "dma.h"
  53 #include "highlevel.h"
  54 #include "hosts.h"
  55 #include "ieee1394.h"
  56 #include "ieee1394_core.h"
  57 #include "ieee1394_hotplug.h"
  58 #include "ieee1394_types.h"
  59 #include "nodemgr.h"
  60 #include "ohci1394.h"
  61 #include "video1394.h"
  62
  63 #define ISO_CHANNELS 64
  64
  65 struct it_dma_prg {
  66         struct dma_cmd begin;
  67         quadlet_t data[4];
  68         struct dma_cmd end;
  69         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
  70 };
  71
  72 struct dma_iso_ctx {
  73         struct ti_ohci *ohci;
  74         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
  75         struct ohci1394_iso_tasklet iso_tasklet;
  76         int channel;
  77         int ctx;
  78         int last_buffer;
  79         int * next_buffer;  /* For ISO Transmit of video packets
  80                                to write the correct SYT field
  81                                into the next block */
  82         unsigned int num_desc;
  83         unsigned int buf_size;
  84         unsigned int frame_size;
  85         unsigned int packet_size;
  86         unsigned int left_size;
  87         unsigned int nb_cmd;
  88
  89         struct dma_region dma;
  90
  91         struct dma_prog_region *prg_reg;
  92
  93         struct dma_cmd **ir_prg;
  94         struct it_dma_prg **it_prg;
  95
  96         unsigned int *buffer_status;
  97         unsigned int *buffer_prg_assignment;
  98         struct timeval *buffer_time; /* time when the buffer was received */
  99         unsigned int *last_used_cmd; /* For ISO Transmit with
 100                                         variable sized packets only ! */
 101         int ctrlClear;
 102         int ctrlSet;
 103         int cmdPtr;
 104         int ctxMatch;
 105         wait_queue_head_t waitq;
 106         spinlock_t lock;
 107         unsigned int syt_offset;
 108         int flags;
 109
 110         struct list_head link;
 111 };
 112
 113
 114 struct file_ctx {
 115         struct ti_ohci *ohci;
 116         struct list_head context_list;
 117         struct dma_iso_ctx *current_ctx;
 118 };
 119
 120 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
 121 #define VIDEO1394_DEBUG
 122 #endif
 123
 124 #ifdef DBGMSG
 125 #undef DBGMSG
 126 #endif
 127
 128 #ifdef VIDEO1394_DEBUG
 129 #define DBGMSG(card, fmt, args...) \
 130 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
 131 #else
 132 #define DBGMSG(card, fmt, args...) do {} while (0)
 133 #endif
 134
 135 /* print general (card independent) information */
 136 #define PRINT_G(level, fmt, args...) \
 137 printk(level "video1394: " fmt "\n" , ## args)
 138
 139 /* print card specific information */
 140 #define PRINT(level, card, fmt, args...) \
 141 printk(level "video1394_%d: " fmt "\n" , card , ## args)
 142
 143 static void wakeup_dma_ir_ctx(unsigned long l);
 144 static void wakeup_dma_it_ctx(unsigned long l);
 145
 146 static struct hpsb_highlevel video1394_highlevel;
 147
 148 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
 149 {
 150         int i;
 151
 152         DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
 153
 154         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
 155         if (d->iso_tasklet.link.next != NULL)
 156                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
 157
 158         dma_region_free(&d->dma);
 159
 160         if (d->prg_reg) {
 161                 for (i = 0; i < d->num_desc; i++)
 162                         dma_prog_region_free(&d->prg_reg[i]);
 163                 kfree(d->prg_reg);
 164         }
 165
 166         kfree(d->ir_prg);
 167         kfree(d->it_prg);
 168         kfree(d->buffer_status);
 169         kfree(d->buffer_prg_assignment);
 170         kfree(d->buffer_time);
 171         kfree(d->last_used_cmd);
 172         kfree(d->next_buffer);
 173         list_del(&d->link);
 174         kfree(d);
 175
 176         return 0;
 177 }
 178
 179 static struct dma_iso_ctx *
 180 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
 181                   int buf_size, int channel, unsigned int packet_size)
 182 {
 183         struct dma_iso_ctx *d;
 184         int i;
 185
 186         d = kzalloc(sizeof(*d), GFP_KERNEL);
 187         if (!d) {
 188                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
 189                 return NULL;
 190         }
 191
 192         d->ohci = ohci;
 193         d->type = type;
 194         d->channel = channel;
 195         d->num_desc = num_desc;
 196         d->frame_size = buf_size;
 197         d->buf_size = PAGE_ALIGN(buf_size);
 198         d->last_buffer = -1;
 199         INIT_LIST_HEAD(&d->link);
 200         init_waitqueue_head(&d->waitq);
 201
 202         /* Init the regions for easy cleanup */
 203         dma_region_init(&d->dma);
 204
 205         if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
 206                              PCI_DMA_BIDIRECTIONAL)) {
 207                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
 208                 free_dma_iso_ctx(d);
 209                 return NULL;
 210         }
 211
 212         if (type == OHCI_ISO_RECEIVE)
 213                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 214                                           wakeup_dma_ir_ctx,
 215                                           (unsigned long) d);
 216         else
 217                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 218                                           wakeup_dma_it_ctx,
 219                                           (unsigned long) d);
 220
 221         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
 222                 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
 223                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
 224                 free_dma_iso_ctx(d);
 225                 return NULL;
 226         }
 227         d->ctx = d->iso_tasklet.context;
 228
 229         d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
 230         if (!d->prg_reg) {
 231                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
 232                 free_dma_iso_ctx(d);
 233                 return NULL;
 234         }
 235         /* Makes for easier cleanup */
 236         for (i = 0; i < d->num_desc; i++)
 237                 dma_prog_region_init(&d->prg_reg[i]);
 238
 239         if (type == OHCI_ISO_RECEIVE) {
 240                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
 241                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
 242                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
 243                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
 244
 245                 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
 246                                     GFP_KERNEL);
 247
 248                 if (!d->ir_prg) {
 249                         PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 250                         free_dma_iso_ctx(d);
 251                         return NULL;
 252                 }
 253
 254                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
 255                 d->left_size = (d->frame_size % PAGE_SIZE) ?
 256                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
 257
 258                 for (i = 0;i < d->num_desc; i++) {
 259                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 260                                                   sizeof(struct dma_cmd), ohci->dev)) {
 261                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 262                                 free_dma_iso_ctx(d);
 263                                 return NULL;
 264                         }
 265                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
 266                 }
 267
 268         } else {  /* OHCI_ISO_TRANSMIT */
 269                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
 270                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
 271                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
 272
 273                 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
 274                                     GFP_KERNEL);
 275
 276                 if (!d->it_prg) {
 277                         PRINT(KERN_ERR, ohci->host->id,
 278                               "Failed to allocate dma it prg");
 279                         free_dma_iso_ctx(d);
 280                         return NULL;
 281                 }
 282
 283                 d->packet_size = packet_size;
 284
 285                 if (PAGE_SIZE % packet_size || packet_size>4096) {
 286                         PRINT(KERN_ERR, ohci->host->id,
 287                               "Packet size %d (page_size: %ld) "
 288                               "not yet supported\n",
 289                               packet_size, PAGE_SIZE);
 290                         free_dma_iso_ctx(d);
 291                         return NULL;
 292                 }
 293
 294                 d->nb_cmd = d->frame_size / d->packet_size;
 295                 if (d->frame_size % d->packet_size) {
 296                         d->nb_cmd++;
 297                         d->left_size = d->frame_size % d->packet_size;
 298                 } else
 299                         d->left_size = d->packet_size;
 300
 301                 for (i = 0; i < d->num_desc; i++) {
 302                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 303                                                 sizeof(struct it_dma_prg), ohci->dev)) {
 304                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
 305                                 free_dma_iso_ctx(d);
 306                                 return NULL;
 307                         }
 308                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
 309                 }
 310         }
 311
 312         d->buffer_status =
 313             kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
 314         d->buffer_prg_assignment =
 315             kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
 316         d->buffer_time =
 317             kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
 318         d->last_used_cmd =
 319             kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
 320         d->next_buffer =
 321             kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
 322
 323         if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
 324             !d->last_used_cmd || !d->next_buffer) {
 325                 PRINT(KERN_ERR, ohci->host->id,
 326                       "Failed to allocate dma_iso_ctx member");
 327                 free_dma_iso_ctx(d);
 328                 return NULL;
 329         }
 330
 331         spin_lock_init(&d->lock);
 332
 333         DBGMSG(ohci->host->id, "Iso %s DMA: %d buffers "
 334               "of size %d allocated for a frame size %d, each with %d prgs",
 335               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
 336               d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
 337
 338         return d;
 339 }
 340
 341 static void reset_ir_status(struct dma_iso_ctx *d, int n)
 342 {
 343         int i;
 344         d->ir_prg[n][0].status = cpu_to_le32(4);
 345         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
 346         for (i = 2; i < d->nb_cmd - 1; i++)
 347                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
 348         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
 349 }
 350
 351 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
 352 {
 353         struct dma_cmd *ir_prg = d->ir_prg[n];
 354         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 355         int i;
 356
 357         d->buffer_prg_assignment[n] = buffer;
 358
 359         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 360                                 (unsigned long)d->dma.kvirt));
 361         ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 362                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 363
 364         for (i=2;i<d->nb_cmd-1;i++) {
 365                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 366                                                 (buf+(i-1)*PAGE_SIZE) -
 367                                                 (unsigned long)d->dma.kvirt));
 368         }
 369
 370         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 371                                   DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 372         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 373                                   (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
 374 }
 375
 376 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
 377 {
 378         struct dma_cmd *ir_prg = d->ir_prg[n];
 379         struct dma_prog_region *ir_reg = &d->prg_reg[n];
 380         unsigned long buf = (unsigned long)d->dma.kvirt;
 381         int i;
 382
 383         /* the first descriptor will read only 4 bytes */
 384         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 385                 DMA_CTL_BRANCH | 4);
 386
 387         /* set the sync flag */
 388         if (flags & VIDEO1394_SYNC_FRAMES)
 389                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
 390
 391         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 392                                 (unsigned long)d->dma.kvirt));
 393         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 394                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 395
 396         /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
 397         if (d->nb_cmd > 2) {
 398                 /* The second descriptor will read PAGE_SIZE-4 bytes */
 399                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 400                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
 401                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
 402                                                 (unsigned long)d->dma.kvirt));
 403                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 404                                                       2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 405
 406                 for (i = 2; i < d->nb_cmd - 1; i++) {
 407                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 408                                                         DMA_CTL_BRANCH | PAGE_SIZE);
 409                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 410                                                         (buf+(i-1)*PAGE_SIZE) -
 411                                                         (unsigned long)d->dma.kvirt));
 412
 413                         ir_prg[i].branchAddress =
 414                                 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 415                                             (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 416                 }
 417
 418                 /* The last descriptor will generate an interrupt */
 419                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 420                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 421                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 422                                                 (buf+(i-1)*PAGE_SIZE) -
 423                                                 (unsigned long)d->dma.kvirt));
 424         } else {
 425                 /* Only one DMA page is used. Read d->left_size immediately and */
 426                 /* generate an interrupt as this is also the last page. */
 427                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 428                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
 429                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 430                                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 431         }
 432 }
 433
 434 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
 435 {
 436         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 437         int i;
 438
 439         d->flags = flags;
 440
 441         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 442
 443         for (i=0;i<d->num_desc;i++) {
 444                 initialize_dma_ir_prg(d, i, flags);
 445                 reset_ir_status(d, i);
 446         }
 447
 448         /* reset the ctrl register */
 449         reg_write(ohci, d->ctrlClear, 0xf0000000);
 450
 451         /* Set bufferFill */
 452         reg_write(ohci, d->ctrlSet, 0x80000000);
 453
 454         /* Set isoch header */
 455         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
 456                 reg_write(ohci, d->ctrlSet, 0x40000000);
 457
 458         /* Set the context match register to match on all tags,
 459            sync for sync tag, and listen to d->channel */
 460         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
 461
 462         /* Set up isoRecvIntMask to generate interrupts */
 463         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
 464 }
 465
 466 /* find which context is listening to this channel */
 467 static struct dma_iso_ctx *
 468 find_ctx(struct list_head *list, int type, int channel)
 469 {
 470         struct dma_iso_ctx *ctx;
 471
 472         list_for_each_entry(ctx, list, link) {
 473                 if (ctx->type == type && ctx->channel == channel)
 474                         return ctx;
 475         }
 476
 477         return NULL;
 478 }
 479
 480 static void wakeup_dma_ir_ctx(unsigned long l)
 481 {
 482         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 483         int i;
 484
 485         spin_lock(&d->lock);
 486
 487         for (i = 0; i < d->num_desc; i++) {
 488                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
 489                         reset_ir_status(d, i);
 490                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 491                         do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]);
 492                 }
 493         }
 494
 495         spin_unlock(&d->lock);
 496
 497         if (waitqueue_active(&d->waitq))
 498                 wake_up_interruptible(&d->waitq);
 499 }
 500
 501 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
 502                                  int n)
 503 {
 504         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
 505         u32 cycleTimer;
 506         u32 timeStamp;
 507
 508         if (n == -1) {
 509           return;
 510         }
 511
 512         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 513
 514         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
 515         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
 516                 + (cycleTimer & 0xf000)) & 0xffff;
 517
 518         buf[6] = timeStamp >> 8;
 519         buf[7] = timeStamp & 0xff;
 520
 521     /* if first packet is empty packet, then put timestamp into the next full one too */
 522     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 523             buf += d->packet_size;
 524         buf[6] = timeStamp >> 8;
 525             buf[7] = timeStamp & 0xff;
 526         }
 527
 528     /* do the next buffer frame too in case of irq latency */
 529         n = d->next_buffer[n];
 530         if (n == -1) {
 531           return;
 532         }
 533         buf = d->dma.kvirt + n * d->buf_size;
 534
 535         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
 536
 537         buf[6] = timeStamp >> 8;
 538         buf[7] = timeStamp & 0xff;
 539
 540     /* if first packet is empty packet, then put timestamp into the next full one too */
 541     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 542             buf += d->packet_size;
 543         buf[6] = timeStamp >> 8;
 544             buf[7] = timeStamp & 0xff;
 545         }
 546
 547 #if 0
 548         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
 549                curr, n, cycleTimer, timeStamp);
 550 #endif
 551 }
 552
 553 static void wakeup_dma_it_ctx(unsigned long l)
 554 {
 555         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 556         struct ti_ohci *ohci = d->ohci;
 557         int i;
 558
 559         spin_lock(&d->lock);
 560
 561         for (i = 0; i < d->num_desc; i++) {
 562                 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
 563                     cpu_to_le32(0xFFFF0000)) {
 564                         int next = d->next_buffer[i];
 565                         put_timestamp(ohci, d, next);
 566                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
 567                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 568                 }
 569         }
 570
 571         spin_unlock(&d->lock);
 572
 573         if (waitqueue_active(&d->waitq))
 574                 wake_up_interruptible(&d->waitq);
 575 }
 576
 577 static void reprogram_dma_it_prg(struct dma_iso_ctx  *d, int n, int buffer)
 578 {
 579         struct it_dma_prg *it_prg = d->it_prg[n];
 580         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 581         int i;
 582
 583         d->buffer_prg_assignment[n] = buffer;
 584         for (i=0;i<d->nb_cmd;i++) {
 585           it_prg[i].end.address =
 586                 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 587                         (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
 588         }
 589 }
 590
 591 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
 592 {
 593         struct it_dma_prg *it_prg = d->it_prg[n];
 594         struct dma_prog_region *it_reg = &d->prg_reg[n];
 595         unsigned long buf = (unsigned long)d->dma.kvirt;
 596         int i;
 597         d->last_used_cmd[n] = d->nb_cmd - 1;
 598         for (i=0;i<d->nb_cmd;i++) {
 599
 600                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
 601                         DMA_CTL_IMMEDIATE | 8) ;
 602                 it_prg[i].begin.address = 0;
 603
 604                 it_prg[i].begin.status = 0;
 605
 606                 it_prg[i].data[0] = cpu_to_le32(
 607                         (IEEE1394_SPEED_100 << 16)
 608                         | (/* tag */ 1 << 14)
 609                         | (d->channel << 8)
 610                         | (TCODE_ISO_DATA << 4));
 611                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
 612                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
 613                 it_prg[i].data[2] = 0;
 614                 it_prg[i].data[3] = 0;
 615
 616                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
 617                                              DMA_CTL_BRANCH);
 618                 it_prg[i].end.address =
 619                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
 620                                                 (unsigned long)d->dma.kvirt));
 621
 622                 if (i<d->nb_cmd-1) {
 623                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
 624                         it_prg[i].begin.branchAddress =
 625                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 626                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 627                         it_prg[i].end.branchAddress =
 628                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 629                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 630                 } else {
 631                         /* the last prg generates an interrupt */
 632                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 633                                 DMA_CTL_IRQ | d->left_size);
 634                         /* the last prg doesn't branch */
 635                         it_prg[i].begin.branchAddress = 0;
 636                         it_prg[i].end.branchAddress = 0;
 637                 }
 638                 it_prg[i].end.status = 0;
 639         }
 640 }
 641
 642 static void initialize_dma_it_prg_var_packet_queue(
 643         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
 644         struct ti_ohci *ohci)
 645 {
 646         struct it_dma_prg *it_prg = d->it_prg[n];
 647         struct dma_prog_region *it_reg = &d->prg_reg[n];
 648         int i;
 649
 650 #if 0
 651         if (n != -1) {
 652                 put_timestamp(ohci, d, n);
 653         }
 654 #endif
 655         d->last_used_cmd[n] = d->nb_cmd - 1;
 656
 657         for (i = 0; i < d->nb_cmd; i++) {
 658                 unsigned int size;
 659                 if (packet_sizes[i] > d->packet_size) {
 660                         size = d->packet_size;
 661                 } else {
 662                         size = packet_sizes[i];
 663                 }
 664                 it_prg[i].data[1] = cpu_to_le32(size << 16);
 665                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
 666
 667                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
 668                         it_prg[i].end.control |= cpu_to_le32(size);
 669                         it_prg[i].begin.branchAddress =
 670                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 671                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 672                         it_prg[i].end.branchAddress =
 673                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 674                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 675                 } else {
 676                         /* the last prg generates an interrupt */
 677                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 678                                 DMA_CTL_IRQ | size);
 679                         /* the last prg doesn't branch */
 680                         it_prg[i].begin.branchAddress = 0;
 681                         it_prg[i].end.branchAddress = 0;
 682                         d->last_used_cmd[n] = i;
 683                         break;
 684                 }
 685         }
 686 }
 687
 688 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
 689                                   unsigned int syt_offset, int flags)
 690 {
 691         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 692         int i;
 693
 694         d->flags = flags;
 695         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
 696
 697         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 698
 699         for (i=0;i<d->num_desc;i++)
 700                 initialize_dma_it_prg(d, i, sync_tag);
 701
 702         /* Set up isoRecvIntMask to generate interrupts */
 703         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
 704 }
 705
 706 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
 707                                               unsigned int buffer)
 708 {
 709         unsigned long flags;
 710         unsigned int ret;
 711         spin_lock_irqsave(&d->lock, flags);
 712         ret = d->buffer_status[buffer];
 713         spin_unlock_irqrestore(&d->lock, flags);
 714         return ret;
 715 }
 716
 717 static int __video1394_ioctl(struct file *file,
 718                              unsigned int cmd, unsigned long arg)
 719 {
 720         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
 721         struct ti_ohci *ohci = ctx->ohci;
 722         unsigned long flags;
 723         void __user *argp = (void __user *)arg;
 724
 725         switch(cmd)
 726         {
 727         case VIDEO1394_IOC_LISTEN_CHANNEL:
 728         case VIDEO1394_IOC_TALK_CHANNEL:
 729         {
 730                 struct video1394_mmap v;
 731                 u64 mask;
 732                 struct dma_iso_ctx *d;
 733                 int i;
 734
 735                 if (copy_from_user(&v, argp, sizeof(v)))
 736                         return -EFAULT;
 737
 738                 /* if channel < 0, find lowest available one */
 739                 if (v.channel < 0) {
 740                     mask = (u64)0x1;
 741                     for (i=0; ; i++) {
 742                         if (i == ISO_CHANNELS) {
 743                             PRINT(KERN_ERR, ohci->host->id,
 744                                   "No free channel found");
 745                             return -EAGAIN;
 746                         }
 747                         if (!(ohci->ISO_channel_usage & mask)) {
 748                             v.channel = i;
 749                             PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
 750                             break;
 751                         }
 752                         mask = mask << 1;
 753                     }
 754                 } else if (v.channel >= ISO_CHANNELS) {
 755                         PRINT(KERN_ERR, ohci->host->id,
 756                               "Iso channel %d out of bounds", v.channel);
 757                         return -EINVAL;
 758                 } else {
 759                         mask = (u64)0x1<<v.channel;
 760                 }
 761                 DBGMSG(ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
 762                         (u32)(mask>>32),(u32)(mask&0xffffffff),
 763                         (u32)(ohci->ISO_channel_usage>>32),
 764                         (u32)(ohci->ISO_channel_usage&0xffffffff));
 765                 if (ohci->ISO_channel_usage & mask) {
 766                         PRINT(KERN_ERR, ohci->host->id,
 767                               "Channel %d is already taken", v.channel);
 768                         return -EBUSY;
 769                 }
 770
 771                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
 772                         PRINT(KERN_ERR, ohci->host->id,
 773                               "Invalid %d length buffer requested",v.buf_size);
 774                         return -EINVAL;
 775                 }
 776
 777                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
 778                         PRINT(KERN_ERR, ohci->host->id,
 779                               "Invalid %d buffers requested",v.nb_buffers);
 780                         return -EINVAL;
 781                 }
 782
 783                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
 784                         PRINT(KERN_ERR, ohci->host->id,
 785                               "%d buffers of size %d bytes is too big",
 786                               v.nb_buffers, v.buf_size);
 787                         return -EINVAL;
 788                 }
 789
 790                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
 791                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
 792                                               v.nb_buffers + 1, v.buf_size,
 793                                               v.channel, 0);
 794
 795                         if (d == NULL) {
 796                                 PRINT(KERN_ERR, ohci->host->id,
 797                                       "Couldn't allocate ir context");
 798                                 return -EAGAIN;
 799                         }
 800                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
 801
 802                         ctx->current_ctx = d;
 803
 804                         v.buf_size = d->buf_size;
 805                         list_add_tail(&d->link, &ctx->context_list);
 806
 807                         DBGMSG(ohci->host->id,
 808                               "iso context %d listen on channel %d",
 809                               d->ctx, v.channel);
 810                 }
 811                 else {
 812                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
 813                                               v.nb_buffers + 1, v.buf_size,
 814                                               v.channel, v.packet_size);
 815
 816                         if (d == NULL) {
 817                                 PRINT(KERN_ERR, ohci->host->id,
 818                                       "Couldn't allocate it context");
 819                                 return -EAGAIN;
 820                         }
 821                         initialize_dma_it_ctx(d, v.sync_tag,
 822                                               v.syt_offset, v.flags);
 823
 824                         ctx->current_ctx = d;
 825
 826                         v.buf_size = d->buf_size;
 827
 828                         list_add_tail(&d->link, &ctx->context_list);
 829
 830                         DBGMSG(ohci->host->id,
 831                               "Iso context %d talk on channel %d", d->ctx,
 832                               v.channel);
 833                 }
 834
 835                 if (copy_to_user(argp, &v, sizeof(v))) {
 836                         /* FIXME : free allocated dma resources */
 837                         return -EFAULT;
 838                 }
 839
 840                 ohci->ISO_channel_usage |= mask;
 841
 842                 return 0;
 843         }
 844         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
 845         case VIDEO1394_IOC_UNTALK_CHANNEL:
 846         {
 847                 int channel;
 848                 u64 mask;
 849                 struct dma_iso_ctx *d;
 850
 851                 if (copy_from_user(&channel, argp, sizeof(int)))
 852                         return -EFAULT;
 853
 854                 if (channel < 0 || channel >= ISO_CHANNELS) {
 855                         PRINT(KERN_ERR, ohci->host->id,
 856                               "Iso channel %d out of bound", channel);
 857                         return -EINVAL;
 858                 }
 859                 mask = (u64)0x1<<channel;
 860                 if (!(ohci->ISO_channel_usage & mask)) {
 861                         PRINT(KERN_ERR, ohci->host->id,
 862                               "Channel %d is not being used", channel);
 863                         return -ESRCH;
 864                 }
 865
 866                 /* Mark this channel as unused */
 867                 ohci->ISO_channel_usage &= ~mask;
 868
 869                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
 870                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
 871                 else
 872                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
 873
 874                 if (d == NULL) return -ESRCH;
 875                 DBGMSG(ohci->host->id, "Iso context %d "
 876                       "stop talking on channel %d", d->ctx, channel);
 877                 free_dma_iso_ctx(d);
 878
 879                 return 0;
 880         }
 881         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
 882         {
 883                 struct video1394_wait v;
 884                 struct dma_iso_ctx *d;
 885                 int next_prg;
 886
 887                 if (copy_from_user(&v, argp, sizeof(v)))
 888                         return -EFAULT;
 889
 890                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 891                 if (d == NULL) return -EFAULT;
 892
 893                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
 894                         PRINT(KERN_ERR, ohci->host->id,
 895                               "Buffer %d out of range",v.buffer);
 896                         return -EINVAL;
 897                 }
 898
 899                 spin_lock_irqsave(&d->lock,flags);
 900
 901                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
 902                         PRINT(KERN_ERR, ohci->host->id,
 903                               "Buffer %d is already used",v.buffer);
 904                         spin_unlock_irqrestore(&d->lock,flags);
 905                         return -EBUSY;
 906                 }
 907
 908                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
 909
 910                 next_prg = (d->last_buffer + 1) % d->num_desc;
 911                 if (d->last_buffer>=0)
 912                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
 913                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
 914                                         & 0xfffffff0) | 0x1);
 915
 916                 d->last_buffer = next_prg;
 917                 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
 918
 919                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
 920
 921                 spin_unlock_irqrestore(&d->lock,flags);
 922
 923                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
 924                 {
 925                         DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
 926
 927                         /* Tell the controller where the first program is */
 928                         reg_write(ohci, d->cmdPtr,
 929                                   dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
 930
 931                         /* Run IR context */
 932                         reg_write(ohci, d->ctrlSet, 0x8000);
 933                 }
 934                 else {
 935                         /* Wake up dma context if necessary */
 936                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
 937                                 DBGMSG(ohci->host->id,
 938                                       "Waking up iso dma ctx=%d", d->ctx);
 939                                 reg_write(ohci, d->ctrlSet, 0x1000);
 940                         }
 941                 }
 942                 return 0;
 943
 944         }
 945         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
 946         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
 947         {
 948                 struct video1394_wait v;
 949                 struct dma_iso_ctx *d;
 950                 int i = 0;
 951
 952                 if (copy_from_user(&v, argp, sizeof(v)))
 953                         return -EFAULT;
 954
 955                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 956                 if (d == NULL) return -EFAULT;
 957
 958                 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
 959                         PRINT(KERN_ERR, ohci->host->id,
 960                               "Buffer %d out of range",v.buffer);
 961                         return -EINVAL;
 962                 }
 963
 964                 /*
 965                  * I change the way it works so that it returns
 966                  * the last received frame.
 967                  */
 968                 spin_lock_irqsave(&d->lock, flags);
 969                 switch(d->buffer_status[v.buffer]) {
 970                 case VIDEO1394_BUFFER_READY:
 971                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 972                         break;
 973                 case VIDEO1394_BUFFER_QUEUED:
 974                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
 975                             /* for polling, return error code EINTR */
 976                             spin_unlock_irqrestore(&d->lock, flags);
 977                             return -EINTR;
 978                         }
 979
 980                         spin_unlock_irqrestore(&d->lock, flags);
 981                         wait_event_interruptible(d->waitq,
 982                                         video1394_buffer_state(d, v.buffer) ==
 983                                          VIDEO1394_BUFFER_READY);
 984                         if (signal_pending(current))
 985                                 return -EINTR;
 986                         spin_lock_irqsave(&d->lock, flags);
 987                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 988                         break;
 989                 default:
 990                         PRINT(KERN_ERR, ohci->host->id,
 991                               "Buffer %d is not queued",v.buffer);
 992                         spin_unlock_irqrestore(&d->lock, flags);
 993                         return -ESRCH;
 994                 }
 995
 996                 /* set time of buffer */
 997                 v.filltime = d->buffer_time[v.buffer];
 998
 999                 /*
1000                  * Look ahead to see how many more buffers have been received
1001                  */
1002                 i=0;
1003                 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1004                        VIDEO1394_BUFFER_READY) {
1005                         v.buffer=(v.buffer+1)%(d->num_desc - 1);
1006                         i++;
1007                 }
1008                 spin_unlock_irqrestore(&d->lock, flags);
1009
1010                 v.buffer=i;
1011                 if (copy_to_user(argp, &v, sizeof(v)))
1012                         return -EFAULT;
1013
1014                 return 0;
1015         }
1016         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1017         {
1018                 struct video1394_wait v;
1019                 unsigned int *psizes = NULL;
1020                 struct dma_iso_ctx *d;
1021                 int next_prg;
1022
1023                 if (copy_from_user(&v, argp, sizeof(v)))
1024                         return -EFAULT;
1025
1026                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1027                 if (d == NULL) return -EFAULT;
1028
1029                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1030                         PRINT(KERN_ERR, ohci->host->id,
1031                               "Buffer %d out of range",v.buffer);
1032                         return -EINVAL;
1033                 }
1034
1035                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1036                         int buf_size = d->nb_cmd * sizeof(*psizes);
1037                         struct video1394_queue_variable __user *p = argp;
1038                         unsigned int __user *qv;
1039
1040                         if (get_user(qv, &p->packet_sizes))
1041                                 return -EFAULT;
1042
1043                         psizes = kmalloc(buf_size, GFP_KERNEL);
1044                         if (!psizes)
1045                                 return -ENOMEM;
1046
1047                         if (copy_from_user(psizes, qv, buf_size)) {
1048                                 kfree(psizes);
1049                                 return -EFAULT;
1050                         }
1051                 }
1052
1053                 spin_lock_irqsave(&d->lock,flags);
1054
1055                 /* last_buffer is last_prg */
1056                 next_prg = (d->last_buffer + 1) % d->num_desc;
1057                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1058                         PRINT(KERN_ERR, ohci->host->id,
1059                               "Buffer %d is already used",v.buffer);
1060                         spin_unlock_irqrestore(&d->lock,flags);
1061                         kfree(psizes);
1062                         return -EBUSY;
1063                 }
1064
1065                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1066                         initialize_dma_it_prg_var_packet_queue(
1067                                 d, next_prg, psizes, ohci);
1068                 }
1069
1070                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1071
1072                 if (d->last_buffer >= 0) {
1073                         d->it_prg[d->last_buffer]
1074                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1075                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1076                                                 0) & 0xfffffff0) | 0x3);
1077
1078                         d->it_prg[d->last_buffer]
1079                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1080                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1081                                                 0) & 0xfffffff0) | 0x3);
1082                         d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1083                 }
1084                 d->last_buffer = next_prg;
1085                 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1086                 d->next_buffer[d->last_buffer] = -1;
1087
1088                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1089
1090                 spin_unlock_irqrestore(&d->lock,flags);
1091
1092                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1093                 {
1094                         DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1095                                d->ctx);
1096                         put_timestamp(ohci, d, d->last_buffer);
1097
1098                         /* Tell the controller where the first program is */
1099                         reg_write(ohci, d->cmdPtr,
1100                                 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1101
1102                         /* Run IT context */
1103                         reg_write(ohci, d->ctrlSet, 0x8000);
1104                 }
1105                 else {
1106                         /* Wake up dma context if necessary */
1107                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1108                                 DBGMSG(ohci->host->id,
1109                                       "Waking up iso transmit dma ctx=%d",
1110                                       d->ctx);
1111                                 put_timestamp(ohci, d, d->last_buffer);
1112                                 reg_write(ohci, d->ctrlSet, 0x1000);
1113                         }
1114                 }
1115
1116                 kfree(psizes);
1117                 return 0;
1118
1119         }
1120         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1121         {
1122                 struct video1394_wait v;
1123                 struct dma_iso_ctx *d;
1124
1125                 if (copy_from_user(&v, argp, sizeof(v)))
1126                         return -EFAULT;
1127
1128                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1129                 if (d == NULL) return -EFAULT;
1130
1131                 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1132                         PRINT(KERN_ERR, ohci->host->id,
1133                               "Buffer %d out of range",v.buffer);
1134                         return -EINVAL;
1135                 }
1136
1137                 switch(d->buffer_status[v.buffer]) {
1138                 case VIDEO1394_BUFFER_READY:
1139                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1140                         return 0;
1141                 case VIDEO1394_BUFFER_QUEUED:
1142                         wait_event_interruptible(d->waitq,
1143                                         (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1144                         if (signal_pending(current))
1145                                 return -EINTR;
1146                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1147                         return 0;
1148                 default:
1149                         PRINT(KERN_ERR, ohci->host->id,
1150                               "Buffer %d is not queued",v.buffer);
1151                         return -ESRCH;
1152                 }
1153         }
1154         default:
1155                 return -ENOTTY;
1156         }
1157 }
1158
1159 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1160 {
1161         int err;
1162         lock_kernel();
1163         err = __video1394_ioctl(file, cmd, arg);
1164         unlock_kernel();
1165         return err;
1166 }
1167
1168 /*
1169  *      This maps the vmalloced and reserved buffer to user space.
1170  *
1171  *  FIXME:
1172  *  - PAGE_READONLY should suffice!?
1173  *  - remap_pfn_range is kind of inefficient for page by page remapping.
1174  *    But e.g. pte_alloc() does not work in modules ... :-(
1175  */
1176
1177 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1178 {
1179         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1180         int res = -EINVAL;
1181
1182         lock_kernel();
1183         if (ctx->current_ctx == NULL) {
1184                 PRINT(KERN_ERR, ctx->ohci->host->id,
1185                                 "Current iso context not set");
1186         } else
1187                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1188         unlock_kernel();
1189
1190         return res;
1191 }
1192
1193 static unsigned int video1394_poll(struct file *file, poll_table *pt)
1194 {
1195         struct file_ctx *ctx;
1196         unsigned int mask = 0;
1197         unsigned long flags;
1198         struct dma_iso_ctx *d;
1199         int i;
1200
1201         lock_kernel();
1202         ctx = file->private_data;
1203         d = ctx->current_ctx;
1204         if (d == NULL) {
1205                 PRINT(KERN_ERR, ctx->ohci->host->id,
1206                                 "Current iso context not set");
1207                 mask = POLLERR;
1208                 goto done;
1209         }
1210
1211         poll_wait(file, &d->waitq, pt);
1212
1213         spin_lock_irqsave(&d->lock, flags);
1214         for (i = 0; i < d->num_desc; i++) {
1215                 if (d->buffer_status[i] == VIDEO1394_BUFFER_READY) {
1216                         mask |= POLLIN | POLLRDNORM;
1217                         break;
1218                 }
1219         }
1220         spin_unlock_irqrestore(&d->lock, flags);
1221 done:
1222         unlock_kernel();
1223
1224         return mask;
1225 }
1226
1227 static int video1394_open(struct inode *inode, struct file *file)
1228 {
1229         int i = ieee1394_file_to_instance(file);
1230         struct ti_ohci *ohci;
1231         struct file_ctx *ctx;
1232
1233         ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1234         if (ohci == NULL)
1235                 return -EIO;
1236
1237         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1238         if (!ctx)  {
1239                 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1240                 return -ENOMEM;
1241         }
1242
1243         ctx->ohci = ohci;
1244         INIT_LIST_HEAD(&ctx->context_list);
1245         ctx->current_ctx = NULL;
1246         file->private_data = ctx;
1247
1248         return 0;
1249 }
1250
1251 static int video1394_release(struct inode *inode, struct file *file)
1252 {
1253         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1254         struct ti_ohci *ohci = ctx->ohci;
1255         struct list_head *lh, *next;
1256         u64 mask;
1257
1258         lock_kernel();
1259         list_for_each_safe(lh, next, &ctx->context_list) {
1260                 struct dma_iso_ctx *d;
1261                 d = list_entry(lh, struct dma_iso_ctx, link);
1262                 mask = (u64) 1 << d->channel;
1263
1264                 if (!(ohci->ISO_channel_usage & mask))
1265                         PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1266                               "is not being used", d->channel);
1267                 else
1268                         ohci->ISO_channel_usage &= ~mask;
1269                 DBGMSG(ohci->host->id, "On release: Iso %s context "
1270                       "%d stop listening on channel %d",
1271                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1272                       d->ctx, d->channel);
1273                 free_dma_iso_ctx(d);
1274         }
1275
1276         kfree(ctx);
1277         file->private_data = NULL;
1278
1279         unlock_kernel();
1280         return 0;
1281 }
1282
1283 #ifdef CONFIG_COMPAT
1284 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1285 #endif
1286
1287 static struct cdev video1394_cdev;
1288 static struct file_operations video1394_fops=
1289 {
1290         .owner =        THIS_MODULE,
1291         .unlocked_ioctl = video1394_ioctl,
1292 #ifdef CONFIG_COMPAT
1293         .compat_ioctl = video1394_compat_ioctl,
1294 #endif
1295         .poll =         video1394_poll,
1296         .mmap =         video1394_mmap,
1297         .open =         video1394_open,
1298         .release =      video1394_release
1299 };
1300
1301 /*** HOTPLUG STUFF **********************************************************/
1302 /*
1303  * Export information about protocols/devices supported by this driver.
1304  */
1305 static struct ieee1394_device_id video1394_id_table[] = {
1306         {
1307                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1308                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1309                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1310         },
1311         {
1312                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1313                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1314                 .version        = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1315         },
1316         {
1317                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1318                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1319                 .version        = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1320         },
1321         { }
1322 };
1323
1324 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1325
1326 static struct hpsb_protocol_driver video1394_driver = {
1327         .name           = "1394 Digital Camera Driver",
1328         .id_table       = video1394_id_table,
1329         .driver         = {
1330                 .name   = VIDEO1394_DRIVER_NAME,
1331                 .bus    = &ieee1394_bus_type,
1332         },
1333 };
1334
1335
1336 static void video1394_add_host (struct hpsb_host *host)
1337 {
1338         struct ti_ohci *ohci;
1339         int minor;
1340
1341         /* We only work with the OHCI-1394 driver */
1342         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1343                 return;
1344
1345         ohci = (struct ti_ohci *)host->hostdata;
1346
1347         if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1348                 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1349                 return;
1350         }
1351
1352         hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1353         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1354
1355         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1356         class_device_create(hpsb_protocol_class, NULL, MKDEV(
1357                 IEEE1394_MAJOR, minor),
1358                 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1359 }
1360
1361
1362 static void video1394_remove_host (struct hpsb_host *host)
1363 {
1364         struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1365
1366         if (ohci)
1367                 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1368                         IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1369         return;
1370 }
1371
1372
1373 static struct hpsb_highlevel video1394_highlevel = {
1374         .name =         VIDEO1394_DRIVER_NAME,
1375         .add_host =     video1394_add_host,
1376         .remove_host =  video1394_remove_host,
1377 };
1378
1379 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1380 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1381 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1382 MODULE_LICENSE("GPL");
1383
1384 #ifdef CONFIG_COMPAT
1385
1386 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER     \
1387         _IOW ('#', 0x12, struct video1394_wait32)
1388 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER      \
1389         _IOWR('#', 0x13, struct video1394_wait32)
1390 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER        \
1391         _IOW ('#', 0x17, struct video1394_wait32)
1392 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER      \
1393         _IOWR('#', 0x18, struct video1394_wait32)
1394
1395 struct video1394_wait32 {
1396         u32 channel;
1397         u32 buffer;
1398         struct compat_timeval filltime;
1399 };
1400
1401 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1402 {
1403         struct video1394_wait32 __user *argp = (void __user *)arg;
1404         struct video1394_wait32 wait32;
1405         struct video1394_wait wait;
1406         mm_segment_t old_fs;
1407         int ret;
1408
1409         if (copy_from_user(&wait32, argp, sizeof(wait32)))
1410                 return -EFAULT;
1411
1412         wait.channel = wait32.channel;
1413         wait.buffer = wait32.buffer;
1414         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1415         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1416
1417         old_fs = get_fs();
1418         set_fs(KERNEL_DS);
1419         if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1420                 ret = video1394_ioctl(file,
1421                                       VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1422                                       (unsigned long) &wait);
1423         else
1424                 ret = video1394_ioctl(file,
1425                                       VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1426                                       (unsigned long) &wait);
1427         set_fs(old_fs);
1428
1429         if (!ret) {
1430                 wait32.channel = wait.channel;
1431                 wait32.buffer = wait.buffer;
1432                 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1433                 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1434
1435                 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1436                         ret = -EFAULT;
1437         }
1438
1439         return ret;
1440 }
1441
1442 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1443 {
1444         struct video1394_wait32 wait32;
1445         struct video1394_wait wait;
1446         mm_segment_t old_fs;
1447         int ret;
1448
1449         if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1450                 return -EFAULT;
1451
1452         wait.channel = wait32.channel;
1453         wait.buffer = wait32.buffer;
1454         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1455         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1456
1457         old_fs = get_fs();
1458         set_fs(KERNEL_DS);
1459         if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1460                 ret = video1394_ioctl(file,
1461                                       VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1462                                       (unsigned long) &wait);
1463         else
1464                 ret = video1394_ioctl(file,
1465                                       VIDEO1394_IOC_TALK_WAIT_BUFFER,
1466                                       (unsigned long) &wait);
1467         set_fs(old_fs);
1468
1469         return ret;
1470 }
1471
1472 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1473 {
1474         return -EFAULT;   /* ??? was there before. */
1475
1476         return video1394_ioctl(file,
1477                                 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1478 }
1479
1480 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1481 {
1482         switch (cmd) {
1483         case VIDEO1394_IOC_LISTEN_CHANNEL:
1484         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1485         case VIDEO1394_IOC_TALK_CHANNEL:
1486         case VIDEO1394_IOC_UNTALK_CHANNEL:
1487                 return video1394_ioctl(f, cmd, arg);
1488
1489         case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1490                 return video1394_w_wait32(f, cmd, arg);
1491         case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1492                 return video1394_wr_wait32(f, cmd, arg);
1493         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1494                 return video1394_queue_buf32(f, cmd, arg);
1495         case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1496                 return video1394_w_wait32(f, cmd, arg);
1497         case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1498                 return video1394_wr_wait32(f, cmd, arg);
1499         default:
1500                 return -ENOIOCTLCMD;
1501         }
1502 }
1503
1504 #endif /* CONFIG_COMPAT */
1505
1506 static void __exit video1394_exit_module (void)
1507 {
1508         hpsb_unregister_protocol(&video1394_driver);
1509         hpsb_unregister_highlevel(&video1394_highlevel);
1510         cdev_del(&video1394_cdev);
1511         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1512 }
1513
1514 static int __init video1394_init_module (void)
1515 {
1516         int ret;
1517
1518         cdev_init(&video1394_cdev, &video1394_fops);
1519         video1394_cdev.owner = THIS_MODULE;
1520         kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1521         ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1522         if (ret) {
1523                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1524                 return ret;
1525         }
1526
1527         hpsb_register_highlevel(&video1394_highlevel);
1528
1529         ret = hpsb_register_protocol(&video1394_driver);
1530         if (ret) {
1531                 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1532                 hpsb_unregister_highlevel(&video1394_highlevel);
1533                 cdev_del(&video1394_cdev);
1534                 return ret;
1535         }
1536
1537         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1538         return 0;
1539 }
1540
1541
1542 module_init(video1394_init_module);
1543 module_exit(video1394_exit_module);