1 /* linux/arch/arm/mach-s3c2410/s3c2410.c
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * http://www.simtec.co.uk/products/EB2410ITX/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * 16-May-2003 BJD Created initial version
14 * 16-Aug-2003 BJD Fixed header files and copyright, added URL
15 * 05-Sep-2003 BJD Moved to kernel v2.6
16 * 18-Jan-2004 BJD Added serial port configuration
17 * 21-Aug-2004 BJD Added new struct s3c2410_board handler
18 * 28-Sep-2004 BJD Updates for new serial port bits
19 * 04-Nov-2004 BJD Updated UART configuration process
20 * 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate
21 * 13-Aug-2005 DA Removed UART from initial I/O mappings
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/platform_device.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/irq.h>
36 #include <asm/hardware.h>
40 #include <asm/arch/regs-clock.h>
41 #include <asm/arch/regs-serial.h>
47 /* Initial IO mappings */
49 static struct map_desc s3c2410_iodesc[] __initdata = {
58 static struct resource s3c_uart0_resource[] = {
60 .start = S3C2410_PA_UART0,
61 .end = S3C2410_PA_UART0 + 0x3fff,
62 .flags = IORESOURCE_MEM,
65 .start = IRQ_S3CUART_RX0,
66 .end = IRQ_S3CUART_ERR0,
67 .flags = IORESOURCE_IRQ,
72 static struct resource s3c_uart1_resource[] = {
74 .start = S3C2410_PA_UART1,
75 .end = S3C2410_PA_UART1 + 0x3fff,
76 .flags = IORESOURCE_MEM,
79 .start = IRQ_S3CUART_RX1,
80 .end = IRQ_S3CUART_ERR1,
81 .flags = IORESOURCE_IRQ,
85 static struct resource s3c_uart2_resource[] = {
87 .start = S3C2410_PA_UART2,
88 .end = S3C2410_PA_UART2 + 0x3fff,
89 .flags = IORESOURCE_MEM,
92 .start = IRQ_S3CUART_RX2,
93 .end = IRQ_S3CUART_ERR2,
94 .flags = IORESOURCE_IRQ,
98 /* our uart devices */
100 static struct platform_device s3c_uart0 = {
101 .name = "s3c2410-uart",
103 .num_resources = ARRAY_SIZE(s3c_uart0_resource),
104 .resource = s3c_uart0_resource,
108 static struct platform_device s3c_uart1 = {
109 .name = "s3c2410-uart",
111 .num_resources = ARRAY_SIZE(s3c_uart1_resource),
112 .resource = s3c_uart1_resource,
115 static struct platform_device s3c_uart2 = {
116 .name = "s3c2410-uart",
118 .num_resources = ARRAY_SIZE(s3c_uart2_resource),
119 .resource = s3c_uart2_resource,
122 static struct platform_device *uart_devices[] __initdata = {
128 static int s3c2410_uart_count = 0;
130 /* uart registration process */
132 void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
134 struct platform_device *platdev;
137 for (uart = 0; uart < no; uart++, cfg++) {
138 platdev = uart_devices[cfg->hwport];
140 s3c24xx_uart_devs[uart] = platdev;
141 platdev->dev.platform_data = cfg;
144 s3c2410_uart_count = uart;
149 * register the standard cpu IO areas, and any passed in from the
150 * machine specific initialisation.
153 void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size)
155 /* register our io-tables */
157 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
158 iotable_init(mach_desc, mach_size);
161 void __init s3c2410_init_clocks(int xtal)
168 /* now we've got our machine bits initialised, work out what
169 * clocks we've got */
171 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
173 tmp = __raw_readl(S3C2410_CLKDIVN);
175 /* work out clock scalings */
177 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
178 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
180 /* print brieft summary of clocks, etc */
182 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
183 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
185 /* initialise the clocks here, to allow other things like the
186 * console to use them
189 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
192 int __init s3c2410_init(void)
194 printk("S3C2410: Initialising architecture\n");
196 return platform_add_devices(s3c24xx_uart_devs, s3c2410_uart_count);