2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2006 Silicon Graphics, Inc. All Rights Reserved.
9 #include <linux/types.h>
10 #include <linux/irq.h>
11 #include <linux/pci.h>
12 #include <linux/cpumask.h>
13 #include <linux/msi.h>
15 #include <asm/sn/addrs.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibus_provider_defs.h>
18 #include <asm/sn/pcidev.h>
19 #include <asm/sn/nodepda.h>
23 struct sn_irq_info *sn_irq_info;
26 static struct sn_msi_info sn_msi_info[NR_IRQS];
28 static struct irq_chip sn_msi_chip;
30 void sn_teardown_msi_irq(unsigned int irq)
35 struct pcidev_info *sn_pdev;
36 struct sn_irq_info *sn_irq_info;
37 struct pcibus_bussoft *bussoft;
38 struct sn_pcibus_provider *provider;
40 sn_irq_info = sn_msi_info[irq].sn_irq_info;
41 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
44 sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
45 pdev = sn_pdev->pdi_linux_pcidev;
46 provider = SN_PCIDEV_BUSPROVIDER(pdev);
48 (*provider->dma_unmap)(pdev,
49 sn_msi_info[irq].pci_addr,
51 sn_msi_info[irq].pci_addr = 0;
53 bussoft = SN_PCIDEV_BUSSOFT(pdev);
54 nasid = NASID_GET(bussoft->bs_base);
55 widget = (nasid & 1) ?
56 TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
57 SWIN_WIDGETNUM(bussoft->bs_base);
59 sn_intr_free(nasid, widget, sn_irq_info);
60 sn_msi_info[irq].sn_irq_info = NULL;
65 int sn_setup_msi_irq(unsigned int irq, struct pci_dev *pdev)
68 struct msi_desc *entry;
73 struct sn_irq_info *sn_irq_info;
74 struct pcibus_bussoft *bussoft = SN_PCIDEV_BUSSOFT(pdev);
75 struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
77 entry = get_irq_data(irq);
78 if (!entry->msi_attrib.is_64)
84 if (provider == NULL || provider->dma_map_consistent == NULL)
88 * Set up the vector plumbing. Let the prom (via sn_intr_alloc)
89 * decide which cpu to direct this msi at by default.
92 nasid = NASID_GET(bussoft->bs_base);
93 widget = (nasid & 1) ?
94 TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
95 SWIN_WIDGETNUM(bussoft->bs_base);
97 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
101 status = sn_intr_alloc(nasid, widget, sn_irq_info, irq, -1, -1);
107 sn_irq_info->irq_int_bit = -1; /* mark this as an MSI irq */
108 sn_irq_fixup(pdev, sn_irq_info);
110 /* Prom probably should fill these in, but doesn't ... */
111 sn_irq_info->irq_bridge_type = bussoft->bs_asic_type;
112 sn_irq_info->irq_bridge = (void *)bussoft->bs_base;
115 * Map the xio address into bus space
117 bus_addr = (*provider->dma_map_consistent)(pdev,
118 sn_irq_info->irq_xtalkaddr,
119 sizeof(sn_irq_info->irq_xtalkaddr),
120 SN_DMA_MSI|SN_DMA_ADDR_XIO);
122 sn_intr_free(nasid, widget, sn_irq_info);
127 sn_msi_info[irq].sn_irq_info = sn_irq_info;
128 sn_msi_info[irq].pci_addr = bus_addr;
130 msg.address_hi = (u32)(bus_addr >> 32);
131 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
134 * In the SN platform, bit 16 is a "send vector" bit which
135 * must be present in order to move the vector through the system.
137 msg.data = 0x100 + irq;
140 set_irq_affinity_info(irq, sn_irq_info->irq_cpuid, 0);
143 write_msi_msg(irq, &msg);
144 set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq);
150 static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
156 struct pci_dev *pdev;
157 struct pcidev_info *sn_pdev;
158 struct sn_irq_info *sn_irq_info;
159 struct sn_irq_info *new_irq_info;
160 struct sn_pcibus_provider *provider;
163 cpu = first_cpu(cpu_mask);
164 sn_irq_info = sn_msi_info[irq].sn_irq_info;
165 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
169 * Release XIO resources for the old MSI PCI address
172 read_msi_msg(irq, &msg);
173 sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
174 pdev = sn_pdev->pdi_linux_pcidev;
175 provider = SN_PCIDEV_BUSPROVIDER(pdev);
177 bus_addr = (u64)(msg.address_hi) << 32 | (u64)(msg.address_lo);
178 (*provider->dma_unmap)(pdev, bus_addr, PCI_DMA_FROMDEVICE);
179 sn_msi_info[irq].pci_addr = 0;
181 nasid = cpuid_to_nasid(cpu);
182 slice = cpuid_to_slice(cpu);
184 new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
185 sn_msi_info[irq].sn_irq_info = new_irq_info;
186 if (new_irq_info == NULL)
190 * Map the xio address into bus space
193 bus_addr = (*provider->dma_map_consistent)(pdev,
194 new_irq_info->irq_xtalkaddr,
195 sizeof(new_irq_info->irq_xtalkaddr),
196 SN_DMA_MSI|SN_DMA_ADDR_XIO);
198 sn_msi_info[irq].pci_addr = bus_addr;
199 msg.address_hi = (u32)(bus_addr >> 32);
200 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
202 write_msi_msg(irq, &msg);
203 set_native_irq_info(irq, cpu_mask);
205 #endif /* CONFIG_SMP */
207 static void sn_ack_msi_irq(unsigned int irq)
209 move_native_irq(irq);
213 static int sn_msi_retrigger_irq(unsigned int irq)
215 unsigned int vector = irq;
216 ia64_resend_irq(vector);
221 static struct irq_chip sn_msi_chip = {
223 .mask = mask_msi_irq,
224 .unmask = unmask_msi_irq,
225 .ack = sn_ack_msi_irq,
227 .set_affinity = sn_set_msi_irq_affinity,
229 .retrigger = sn_msi_retrigger_irq,