2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
41 #include "../firmware.h"
43 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
44 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
45 0x00000010, 0x00000020, 0x00000040, 0x00000080,
46 0x00000100, 0x00000200, 0x00000400, 0x00000800,
47 0x00001000, 0x00002000, 0x00004000, 0x00008000,
48 0x00010000, 0x00020000, 0x00040000, 0x00080000,
49 0x00100000, 0x00200000, 0x00400000, 0x00800000,
50 0x01000000, 0x02000000, 0x04000000, 0x08000000,
51 0x10000000, 0x20000000, 0x40000000, 0x80000000};
53 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
55 const unsigned short ccitt_16Table[] = {
56 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
57 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
58 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
59 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
60 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
61 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
62 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
63 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
64 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
65 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
66 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
67 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
68 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
69 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
70 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
71 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
72 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
73 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
74 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
75 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
76 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
77 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
78 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
79 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
80 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
81 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
82 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
83 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
84 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
85 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
86 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
87 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
89 #define ByteCRC16(v, crc) \
90 (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
92 unsigned char BitReverse(unsigned char x)
98 if(x & 0x80) Temp |= 0x80;
107 // BBP register initialization set
109 REG_PAIR BBPRegTable[] = {
110 {BBP_R65, 0x2C}, // fix rssi issue
111 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
113 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
118 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
119 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
120 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
121 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
122 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
123 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
125 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
128 // RF register initialization set
131 REG_PAIR RT30xx_RFRegTable[] = {
152 #define NUM_RF_REG_PARMS (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
156 // ASIC register initialization sets
159 RTMP_REG_PAIR MACRegTable[] = {
160 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
161 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
162 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
163 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
164 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
165 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
167 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
168 #endif // HW_BEACON_OFFSET //
170 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
171 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
172 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
173 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
174 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
175 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
176 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
177 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
178 {TX_TIMEOUT_CFG, 0x000a2090},
179 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
180 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
181 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
182 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
183 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
184 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
185 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
186 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
188 {PBF_CFG, 0xf40006}, // Only enable Queue 2
189 {MM40_PROT_CFG, 0x3F44084}, // Initial Auto_Responder, because QA will turn off Auto-Responder
190 {WPDMA_GLO_CFG, 0x00000030},
192 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
193 {GF40_PROT_CFG, 0x03F44084},
194 {MM20_PROT_CFG, 0x01744004},
195 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
196 {TX_RTS_CFG, 0x00092b20},
197 {EXP_ACK_TIME, 0x002400ca}, // default value
198 {TXOP_HLDR_ET, 0x00000002},
200 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
201 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
202 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
203 will always lost. So we change the SIFS of CCK from 10us to 16us. */
204 {XIFS_TIME_CFG, 0x33a41010},
205 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
208 RTMP_REG_PAIR STAMACRegTable[] = {
209 {WMM_AIFSN_CFG, 0x00002273},
210 {WMM_CWMIN_CFG, 0x00002344},
211 {WMM_CWMAX_CFG, 0x000034aa},
214 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
215 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
219 // RT2870 Firmware Spec only used 1 oct for version expression
221 #define FIRMWARE_MINOR_VERSION 7
225 // New 8k byte firmware size for RT3071/RT3072
226 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
227 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
228 #define FIRMWARE_MAJOR_VERSION 0
230 #define FIRMWAREIMAGEV1_LENGTH 0x1000
231 #define FIRMWAREIMAGEV2_LENGTH 0x1000
236 ========================================================================
239 Allocate RTMP_ADAPTER data block and do some initialization
242 Adapter Pointer to our adapter
252 ========================================================================
254 NDIS_STATUS RTMPAllocAdapterBlock(
256 OUT PRTMP_ADAPTER *ppAdapter)
261 UCHAR *pBeaconBuf = NULL;
263 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
269 // Allocate RTMP_ADAPTER memory block
270 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
271 if (pBeaconBuf == NULL)
273 Status = NDIS_STATUS_FAILURE;
274 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
278 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
279 if (Status != NDIS_STATUS_SUCCESS)
281 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
284 pAd->BeaconBuf = pBeaconBuf;
285 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
289 NdisAllocateSpinLock(&pAd->MgmtRingLock);
291 for (index =0 ; index < NUM_OF_TX_RING; index++)
293 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
294 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
295 pAd->DeQueueRunning[index] = FALSE;
298 NdisAllocateSpinLock(&pAd->irq_lock);
302 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
307 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
312 ========================================================================
315 Read initial Tx power per MCS and BW from EEPROM
318 Adapter Pointer to our adapter
327 ========================================================================
329 VOID RTMPReadTxPwrPerRate(
330 IN PRTMP_ADAPTER pAd)
332 ULONG data, Adata, Gdata;
333 USHORT i, value, value2;
334 INT Apwrdelta, Gpwrdelta;
336 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
339 // Get power delta for 20MHz and 40MHz.
341 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
342 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
346 if ((value2 & 0xff) != 0xff)
349 Gpwrdelta = (value2&0xf);
352 bGpwrdeltaMinus = FALSE;
354 bGpwrdeltaMinus = TRUE;
356 if ((value2 & 0xff00) != 0xff00)
358 if ((value2 & 0x8000))
359 Apwrdelta = ((value2&0xf00)>>8);
361 if ((value2 & 0x4000))
362 bApwrdeltaMinus = FALSE;
364 bApwrdeltaMinus = TRUE;
366 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
369 // Get Txpower per MCS for 20MHz in 2.4G.
373 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
375 if (bApwrdeltaMinus == FALSE)
377 t1 = (value&0xf)+(Apwrdelta);
380 t2 = ((value&0xf0)>>4)+(Apwrdelta);
383 t3 = ((value&0xf00)>>8)+(Apwrdelta);
386 t4 = ((value&0xf000)>>12)+(Apwrdelta);
392 if ((value&0xf) > Apwrdelta)
393 t1 = (value&0xf)-(Apwrdelta);
396 if (((value&0xf0)>>4) > Apwrdelta)
397 t2 = ((value&0xf0)>>4)-(Apwrdelta);
400 if (((value&0xf00)>>8) > Apwrdelta)
401 t3 = ((value&0xf00)>>8)-(Apwrdelta);
404 if (((value&0xf000)>>12) > Apwrdelta)
405 t4 = ((value&0xf000)>>12)-(Apwrdelta);
409 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
410 if (bGpwrdeltaMinus == FALSE)
412 t1 = (value&0xf)+(Gpwrdelta);
415 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
418 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
421 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
427 if ((value&0xf) > Gpwrdelta)
428 t1 = (value&0xf)-(Gpwrdelta);
431 if (((value&0xf0)>>4) > Gpwrdelta)
432 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
435 if (((value&0xf00)>>8) > Gpwrdelta)
436 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
439 if (((value&0xf000)>>12) > Gpwrdelta)
440 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
444 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
446 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
447 if (bApwrdeltaMinus == FALSE)
449 t1 = (value&0xf)+(Apwrdelta);
452 t2 = ((value&0xf0)>>4)+(Apwrdelta);
455 t3 = ((value&0xf00)>>8)+(Apwrdelta);
458 t4 = ((value&0xf000)>>12)+(Apwrdelta);
464 if ((value&0xf) > Apwrdelta)
465 t1 = (value&0xf)-(Apwrdelta);
468 if (((value&0xf0)>>4) > Apwrdelta)
469 t2 = ((value&0xf0)>>4)-(Apwrdelta);
472 if (((value&0xf00)>>8) > Apwrdelta)
473 t3 = ((value&0xf00)>>8)-(Apwrdelta);
476 if (((value&0xf000)>>12) > Apwrdelta)
477 t4 = ((value&0xf000)>>12)-(Apwrdelta);
481 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
482 if (bGpwrdeltaMinus == FALSE)
484 t1 = (value&0xf)+(Gpwrdelta);
487 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
490 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
493 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
499 if ((value&0xf) > Gpwrdelta)
500 t1 = (value&0xf)-(Gpwrdelta);
503 if (((value&0xf0)>>4) > Gpwrdelta)
504 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
507 if (((value&0xf00)>>8) > Gpwrdelta)
508 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
511 if (((value&0xf000)>>12) > Gpwrdelta)
512 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
516 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
519 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
520 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
522 if (data != 0xffffffff)
523 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
524 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
528 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
533 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
534 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
542 // Get Txpower per MCS for 40MHz in 2.4G.
548 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
549 if (bGpwrdeltaMinus == FALSE)
551 t1 = (value&0xf)+(Gpwrdelta);
554 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
557 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
560 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
566 if ((value&0xf) > Gpwrdelta)
567 t1 = (value&0xf)-(Gpwrdelta);
570 if (((value&0xf0)>>4) > Gpwrdelta)
571 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
574 if (((value&0xf00)>>8) > Gpwrdelta)
575 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
578 if (((value&0xf000)>>12) > Gpwrdelta)
579 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
583 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
585 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
586 if (bGpwrdeltaMinus == FALSE)
588 t1 = (value&0xf)+(Gpwrdelta);
591 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
594 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
597 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
603 if ((value&0xf) > Gpwrdelta)
604 t1 = (value&0xf)-(Gpwrdelta);
607 if (((value&0xf0)>>4) > Gpwrdelta)
608 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
611 if (((value&0xf00)>>8) > Gpwrdelta)
612 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
615 if (((value&0xf000)>>12) > Gpwrdelta)
616 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
620 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
623 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
625 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
627 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
632 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
637 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
638 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
646 // Get Txpower per MCS for 20MHz in 5G.
652 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
653 if (bApwrdeltaMinus == FALSE)
655 t1 = (value&0xf)+(Apwrdelta);
658 t2 = ((value&0xf0)>>4)+(Apwrdelta);
661 t3 = ((value&0xf00)>>8)+(Apwrdelta);
664 t4 = ((value&0xf000)>>12)+(Apwrdelta);
670 if ((value&0xf) > Apwrdelta)
671 t1 = (value&0xf)-(Apwrdelta);
674 if (((value&0xf0)>>4) > Apwrdelta)
675 t2 = ((value&0xf0)>>4)-(Apwrdelta);
678 if (((value&0xf00)>>8) > Apwrdelta)
679 t3 = ((value&0xf00)>>8)-(Apwrdelta);
682 if (((value&0xf000)>>12) > Apwrdelta)
683 t4 = ((value&0xf000)>>12)-(Apwrdelta);
687 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
689 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
690 if (bApwrdeltaMinus == FALSE)
692 t1 = (value&0xf)+(Apwrdelta);
695 t2 = ((value&0xf0)>>4)+(Apwrdelta);
698 t3 = ((value&0xf00)>>8)+(Apwrdelta);
701 t4 = ((value&0xf000)>>12)+(Apwrdelta);
707 if ((value&0xf) > Apwrdelta)
708 t1 = (value&0xf)-(Apwrdelta);
711 if (((value&0xf0)>>4) > Apwrdelta)
712 t2 = ((value&0xf0)>>4)-(Apwrdelta);
715 if (((value&0xf00)>>8) > Apwrdelta)
716 t3 = ((value&0xf00)>>8)-(Apwrdelta);
719 if (((value&0xf000)>>12) > Apwrdelta)
720 t4 = ((value&0xf000)>>12)-(Apwrdelta);
724 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
727 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
729 pAd->Tx20MPwrCfgABand[i] = Adata;
731 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
736 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
741 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
742 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
750 // Get Txpower per MCS for 40MHz in 5G.
756 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
757 if (bApwrdeltaMinus == FALSE)
759 t1 = (value&0xf)+(Apwrdelta);
762 t2 = ((value&0xf0)>>4)+(Apwrdelta);
765 t3 = ((value&0xf00)>>8)+(Apwrdelta);
768 t4 = ((value&0xf000)>>12)+(Apwrdelta);
774 if ((value&0xf) > Apwrdelta)
775 t1 = (value&0xf)-(Apwrdelta);
778 if (((value&0xf0)>>4) > Apwrdelta)
779 t2 = ((value&0xf0)>>4)-(Apwrdelta);
782 if (((value&0xf00)>>8) > Apwrdelta)
783 t3 = ((value&0xf00)>>8)-(Apwrdelta);
786 if (((value&0xf000)>>12) > Apwrdelta)
787 t4 = ((value&0xf000)>>12)-(Apwrdelta);
791 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
793 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
794 if (bApwrdeltaMinus == FALSE)
796 t1 = (value&0xf)+(Apwrdelta);
799 t2 = ((value&0xf0)>>4)+(Apwrdelta);
802 t3 = ((value&0xf00)>>8)+(Apwrdelta);
805 t4 = ((value&0xf000)>>12)+(Apwrdelta);
811 if ((value&0xf) > Apwrdelta)
812 t1 = (value&0xf)-(Apwrdelta);
815 if (((value&0xf0)>>4) > Apwrdelta)
816 t2 = ((value&0xf0)>>4)-(Apwrdelta);
819 if (((value&0xf00)>>8) > Apwrdelta)
820 t3 = ((value&0xf00)>>8)-(Apwrdelta);
823 if (((value&0xf000)>>12) > Apwrdelta)
824 t4 = ((value&0xf000)>>12)-(Apwrdelta);
828 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
831 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
833 pAd->Tx40MPwrCfgABand[i+1] = Adata;
835 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
842 ========================================================================
845 Read initial channel power parameters from EEPROM
848 Adapter Pointer to our adapter
857 ========================================================================
859 VOID RTMPReadChannelPwr(
860 IN PRTMP_ADAPTER pAd)
863 EEPROM_TX_PWR_STRUC Power;
864 EEPROM_TX_PWR_STRUC Power2;
866 // Read Tx power value for all channels
867 // Value from 1 - 0x7f. Default value is 24.
868 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
869 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
871 // 0. 11b/g, ch1 - ch 14
872 for (i = 0; i < 7; i++)
874 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
875 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
876 pAd->TxPower[i * 2].Channel = i * 2 + 1;
877 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
879 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
880 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
882 pAd->TxPower[i * 2].Power = Power.field.Byte0;
884 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
885 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
887 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
889 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
890 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
892 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
894 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
895 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
897 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
900 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
901 // 1.1 Fill up channel
903 for (i = 0; i < 4; i++)
905 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
906 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
907 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
909 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
910 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
911 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
913 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
914 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
915 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
919 for (i = 0; i < 6; i++)
921 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
922 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
924 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
925 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
927 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
928 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
930 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
931 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
933 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
934 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
937 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
938 // 2.1 Fill up channel
940 for (i = 0; i < 5; i++)
942 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
943 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
944 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
946 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
947 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
948 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
950 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
951 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
952 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
954 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
955 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
956 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
959 for (i = 0; i < 8; i++)
961 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
962 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
964 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
965 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
967 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
968 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
970 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
971 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
973 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
974 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
977 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
978 // 3.1 Fill up channel
979 choffset = 14 + 12 + 16;
980 for (i = 0; i < 2; i++)
982 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
983 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
984 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
986 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
987 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
988 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
990 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
991 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
992 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
994 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
995 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
996 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
999 for (i = 0; i < 4; i++)
1001 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1002 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1004 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1005 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1007 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1008 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1010 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1011 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1013 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1014 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1017 // 4. Print and Debug
1018 choffset = 14 + 12 + 16 + 7;
1023 ========================================================================
1025 Routine Description:
1026 Read the following from the registry
1027 1. All the parameters
1031 Adapter Pointer to our adapter
1032 WrapperConfigurationContext For use by NdisOpenConfiguration
1037 NDIS_STATUS_RESOURCES
1039 IRQL = PASSIVE_LEVEL
1043 ========================================================================
1045 NDIS_STATUS NICReadRegParameters(
1046 IN PRTMP_ADAPTER pAd,
1047 IN NDIS_HANDLE WrapperConfigurationContext
1050 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1051 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1058 ========================================================================
1060 Routine Description:
1061 For RF filter calibration purpose
1064 pAd Pointer to our adapter
1069 IRQL = PASSIVE_LEVEL
1071 ========================================================================
1073 VOID RTMPFilterCalibration(
1074 IN PRTMP_ADAPTER pAd)
1076 UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1077 UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1078 UCHAR RF_R24_Value = 0;
1080 // Give bbp filter initial value
1081 pAd->Mlme.CaliBW20RfR24 = 0x1F;
1082 pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1086 if (loop == 1) //BandWidth = 40 MHz
1088 // Write 0x27 to RF_R24 to program filter
1089 RF_R24_Value = 0x27;
1090 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1092 FilterTarget = 0x15;
1094 FilterTarget = 0x19;
1096 // when calibrate BW40, BBP mask must set to BW40.
1097 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1100 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1103 RT30xxReadRFRegister(pAd, RF_R31, &value);
1105 RT30xxWriteRFRegister(pAd, RF_R31, value);
1107 else //BandWidth = 20 MHz
1109 // Write 0x07 to RF_R24 to program filter
1110 RF_R24_Value = 0x07;
1111 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1113 FilterTarget = 0x13;
1115 FilterTarget = 0x16;
1118 RT30xxReadRFRegister(pAd, RF_R31, &value);
1120 RT30xxWriteRFRegister(pAd, RF_R31, value);
1123 // Write 0x01 to RF_R22 to enable baseband loopback mode
1124 RT30xxReadRFRegister(pAd, RF_R22, &value);
1126 RT30xxWriteRFRegister(pAd, RF_R22, value);
1128 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1129 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1133 // Write 0x90 to BBP_R25 to transmit test tone
1134 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1136 RTMPusecDelay(1000);
1137 // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1138 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1139 R55x = value & 0xFF;
1141 } while ((ReTry++ < 100) && (R55x == 0));
1143 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1144 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1148 // Write 0x90 to BBP_R25 to transmit test tone
1149 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1151 //We need to wait for calibration
1152 RTMPusecDelay(1000);
1153 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1155 if ((R55x - value) < FilterTarget)
1159 else if ((R55x - value) == FilterTarget)
1169 // prevent infinite loop cause driver hang.
1170 if (loopcnt++ > 100)
1172 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1176 // Write RF_R24 to program filter
1177 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1182 RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1185 // Store for future usage
1190 //BandWidth = 20 MHz
1191 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1195 //BandWidth = 40 MHz
1196 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1203 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1210 // Set back to initial state
1212 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1214 RT30xxReadRFRegister(pAd, RF_R22, &value);
1216 RT30xxWriteRFRegister(pAd, RF_R22, value);
1218 // set BBP back to BW20
1219 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1221 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1223 DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1229 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1232 // Driver must read EEPROM to get RfIcType before initial RF registers
1233 // Initialize RF register to default value
1234 if (IS_RT3070(pAd) || IS_RT3071(pAd))
1236 // Init RF calibration
1237 // Driver should toggle RF R30 bit7 before init RF registers
1241 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1243 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1244 RTMPusecDelay(1000);
1246 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1248 // Initialize RF register to default value
1249 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1251 RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1257 // Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1258 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1259 data = ((data & 0xF0FFFFFF) | 0x0D000000);
1260 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1262 else if (IS_RT3071(pAd))
1264 // Driver should set RF R6 bit6 on before init RF registers
1265 RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1267 RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1270 RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1272 // RT3071 version E has fixed this issue
1273 if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1275 // patch tx EVM issue temporarily
1276 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1277 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1278 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1282 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1283 data = ((data & 0xE0FFFFFF) | 0x01000000);
1284 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1287 // patch LNA_PE_G1 failed issue
1288 RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1290 RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1293 //For RF filter Calibration
1294 RTMPFilterCalibration(pAd);
1296 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1297 if ((pAd->MACVersion & 0xffff) < 0x0211)
1298 RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1300 // set led open drain enable
1301 RTUSBReadMACRegister(pAd, OPT_14, &data);
1303 RTUSBWriteMACRegister(pAd, OPT_14, data);
1307 // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1308 RT30xxLoadRFNormalModeSetup(pAd);
1317 ========================================================================
1319 Routine Description:
1320 Read initial parameters from EEPROM
1323 Adapter Pointer to our adapter
1328 IRQL = PASSIVE_LEVEL
1332 ========================================================================
1334 VOID NICReadEEPROMParameters(
1335 IN PRTMP_ADAPTER pAd,
1339 USHORT i, value, value2;
1341 EEPROM_TX_PWR_STRUC Power;
1342 EEPROM_VERSION_STRUC Version;
1343 EEPROM_ANTENNA_STRUC Antenna;
1344 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1346 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1348 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1349 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1350 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1352 if((data & 0x30) == 0)
1353 pAd->EEPROMAddressNum = 6; // 93C46
1354 else if((data & 0x30) == 0x10)
1355 pAd->EEPROMAddressNum = 8; // 93C66
1357 pAd->EEPROMAddressNum = 8; // 93C86
1358 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1360 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1361 // MAC address registers according to E2PROM setting
1362 if (mac_addr == NULL ||
1363 strlen(mac_addr) != 17 ||
1364 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1365 mac_addr[11] != ':' || mac_addr[14] != ':')
1367 USHORT Addr01,Addr23,Addr45 ;
1369 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1370 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1371 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1373 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1374 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1375 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1376 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1377 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1378 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1380 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1389 for (j=0; j<MAC_ADDR_LEN; j++)
1391 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1395 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1400 //more conveninet to test mbssid, so ap's bssid &0xf1
1401 if (pAd->PermanentAddress[0] == 0xff)
1402 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1404 //if (pAd->PermanentAddress[5] == 0xff)
1405 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1407 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1408 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1409 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1410 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1411 if (pAd->bLocalAdminMAC == FALSE)
1415 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1416 csr2.field.Byte0 = pAd->CurrentAddress[0];
1417 csr2.field.Byte1 = pAd->CurrentAddress[1];
1418 csr2.field.Byte2 = pAd->CurrentAddress[2];
1419 csr2.field.Byte3 = pAd->CurrentAddress[3];
1420 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1422 csr3.field.Byte4 = pAd->CurrentAddress[4];
1423 csr3.field.Byte5 = pAd->CurrentAddress[5];
1424 csr3.field.U2MeMask = 0xff;
1425 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1426 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1427 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1428 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1429 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1433 // if not return early. cause fail at emulation.
1434 // Init the channel number for TX channel power
1435 RTMPReadChannelPwr(pAd);
1437 // if E2PROM version mismatch with driver's expectation, then skip
1438 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1439 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1440 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1441 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1443 if (Version.field.Version > VALID_EEPROM_VERSION)
1445 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1446 /*pAd->SystemErrorBitmap |= 0x00000001;
1448 // hard-code default value when no proper E2PROM installed
1449 pAd->bAutoTxAgcA = FALSE;
1450 pAd->bAutoTxAgcG = FALSE;
1452 // Default the channel power
1453 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1454 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1456 // Default the channel power
1457 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1458 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1460 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1461 pAd->EEPROMDefaultValue[i] = 0xffff;
1465 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1466 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1467 pAd->EEPROMDefaultValue[0] = value;
1469 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1470 pAd->EEPROMDefaultValue[1] = value;
1472 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1473 pAd->EEPROMDefaultValue[2] = value;
1475 for(i = 0; i < 8; i++)
1477 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1478 pAd->EEPROMDefaultValue[i+3] = value;
1481 // We have to parse NIC configuration 0 at here.
1482 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1483 // Therefore, we have to read TxAutoAgc control beforehand.
1484 // Read Tx AGC control bit
1485 Antenna.word = pAd->EEPROMDefaultValue[0];
1486 if (Antenna.word == 0xFFFF)
1492 Antenna.field.RfIcType = RFIC_3020;
1493 Antenna.field.TxPath = 1;
1494 Antenna.field.RxPath = 1;
1500 Antenna.field.RfIcType = RFIC_2820;
1501 Antenna.field.TxPath = 1;
1502 Antenna.field.RxPath = 2;
1503 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1509 // Choose the desired Tx&Rx stream.
1510 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1511 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1513 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1515 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1517 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1518 (pAd->CommonCfg.RxStream > 2))
1520 // only 2 Rx streams for RT2860 series
1521 pAd->CommonCfg.RxStream = 2;
1526 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1532 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1535 if ((NicConfig2.word & 0x00ff) == 0xff)
1537 NicConfig2.word &= 0xff00;
1540 if ((NicConfig2.word >> 8) == 0xff)
1542 NicConfig2.word &= 0x00ff;
1546 if (NicConfig2.field.DynamicTxAgcControl == 1)
1547 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1549 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1551 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1553 // Save the antenna for future use
1554 pAd->Antenna.word = Antenna.word;
1557 // Reset PhyMode if we don't support 802.11a
1558 // Only RFIC_2850 & RFIC_2750 support 802.11a
1560 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1562 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1563 (pAd->CommonCfg.PhyMode == PHY_11A))
1564 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1565 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1566 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1567 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1568 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1569 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1572 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1575 /* these are tempature reference value (0x00 ~ 0xFE)
1576 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1577 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1578 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1579 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1580 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1581 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1582 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1583 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1584 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1585 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1586 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1587 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1588 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1589 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1590 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1591 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1592 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1593 pAd->TxAgcStepG = Power.field.Byte1;
1594 pAd->TxAgcCompensateG = 0;
1595 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1596 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1598 // Disable TxAgc if the based value is not right
1599 if (pAd->TssiRefG == 0xff)
1600 pAd->bAutoTxAgcG = FALSE;
1602 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1603 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1605 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1606 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1610 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1611 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1612 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1613 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1614 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1615 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1616 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1617 pAd->TssiRefA = Power.field.Byte0;
1618 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1619 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1620 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1621 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1622 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1623 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1624 pAd->TxAgcStepA = Power.field.Byte1;
1625 pAd->TxAgcCompensateA = 0;
1626 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1627 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1629 // Disable TxAgc if the based value is not right
1630 if (pAd->TssiRefA == 0xff)
1631 pAd->bAutoTxAgcA = FALSE;
1633 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1634 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1636 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1637 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1639 pAd->BbpRssiToDbmDelta = 0x0;
1641 // Read frequency offset setting for RF
1642 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1643 if ((value & 0x00FF) != 0x00FF)
1644 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1646 pAd->RfFreqOffset = 0;
1647 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1649 //CountryRegion byte offset (38h)
1650 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1651 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1653 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1655 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1656 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1657 TmpPhy = pAd->CommonCfg.PhyMode;
1658 pAd->CommonCfg.PhyMode = 0xff;
1659 RTMPSetPhyMode(pAd, TmpPhy);
1664 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1665 // The valid value are (-10 ~ 10)
1667 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1668 pAd->BGRssiOffset0 = value & 0x00ff;
1669 pAd->BGRssiOffset1 = (value >> 8);
1670 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1671 pAd->BGRssiOffset2 = value & 0x00ff;
1672 pAd->ALNAGain1 = (value >> 8);
1673 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1674 pAd->BLNAGain = value & 0x00ff;
1675 pAd->ALNAGain0 = (value >> 8);
1677 // Validate 11b/g RSSI_0 offset.
1678 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1679 pAd->BGRssiOffset0 = 0;
1681 // Validate 11b/g RSSI_1 offset.
1682 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1683 pAd->BGRssiOffset1 = 0;
1685 // Validate 11b/g RSSI_2 offset.
1686 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1687 pAd->BGRssiOffset2 = 0;
1689 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1690 pAd->ARssiOffset0 = value & 0x00ff;
1691 pAd->ARssiOffset1 = (value >> 8);
1692 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1693 pAd->ARssiOffset2 = value & 0x00ff;
1694 pAd->ALNAGain2 = (value >> 8);
1696 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1697 pAd->ALNAGain1 = pAd->ALNAGain0;
1698 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1699 pAd->ALNAGain2 = pAd->ALNAGain0;
1701 // Validate 11a RSSI_0 offset.
1702 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1703 pAd->ARssiOffset0 = 0;
1705 // Validate 11a RSSI_1 offset.
1706 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1707 pAd->ARssiOffset1 = 0;
1709 //Validate 11a RSSI_2 offset.
1710 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1711 pAd->ARssiOffset2 = 0;
1716 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1717 pAd->LedCntl.word = (value&0xff00) >> 8;
1718 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1720 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1722 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1725 RTMPReadTxPwrPerRate(pAd);
1730 eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
1731 pAd->EFuseTag = (value & 0xff);
1735 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1739 ========================================================================
1741 Routine Description:
1742 Set default value from EEPROM
1745 Adapter Pointer to our adapter
1750 IRQL = PASSIVE_LEVEL
1754 ========================================================================
1756 VOID NICInitAsicFromEEPROM(
1757 IN PRTMP_ADAPTER pAd)
1762 EEPROM_ANTENNA_STRUC Antenna;
1763 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1766 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1767 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1769 UCHAR BbpRegIdx, BbpValue;
1771 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1773 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1774 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1775 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1779 Antenna.word = pAd->EEPROMDefaultValue[0];
1780 if (Antenna.word == 0xFFFF)
1782 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1783 BUG_ON(Antenna.word == 0xFFFF);
1785 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1786 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1788 DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1790 // Save the antenna for future use
1791 pAd->Antenna.word = Antenna.word;
1793 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1796 if ((NicConfig2.word & 0x00ff) == 0xff)
1798 NicConfig2.word &= 0xff00;
1801 if ((NicConfig2.word >> 8) == 0xff)
1803 NicConfig2.word &= 0x00ff;
1807 // Save the antenna for future use
1808 pAd->NicConfig2.word = NicConfig2.word;
1810 // set default antenna as main
1811 if (pAd->RfIcType == RFIC_3020)
1812 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1815 // Send LED Setting to MCU.
1817 if (pAd->LedCntl.word == 0xFF)
1819 pAd->LedCntl.word = 0x01;
1828 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1829 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1830 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1831 pAd->LedIndicatorStregth = 0xFF;
1832 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1835 // Read Hardware controlled Radio state enable bit
1836 if (NicConfig2.field.HardwareRadioControl == 1)
1838 pAd->StaCfg.bHardwareRadio = TRUE;
1840 // Read GPIO pin2 as Hardware controlled radio state
1841 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1842 if ((data & 0x04) == 0)
1844 pAd->StaCfg.bHwRadio = FALSE;
1845 pAd->StaCfg.bRadio = FALSE;
1846 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1850 pAd->StaCfg.bHardwareRadio = FALSE;
1852 if (pAd->StaCfg.bRadio == FALSE)
1854 RTMPSetLED(pAd, LED_RADIO_OFF);
1858 RTMPSetLED(pAd, LED_RADIO_ON);
1862 // Turn off patching for cardbus controller
1863 if (NicConfig2.field.CardbusAcceleration == 1)
1867 if (NicConfig2.field.DynamicTxAgcControl == 1)
1868 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1870 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1872 // Since BBP has been progamed, to make sure BBP setting will be
1873 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1875 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1877 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1879 if(pAd->Antenna.field.RxPath == 3)
1883 else if(pAd->Antenna.field.RxPath == 2)
1887 else if(pAd->Antenna.field.RxPath == 1)
1891 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1894 // Handle the difference when 1T
1895 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1896 if(pAd->Antenna.field.TxPath == 1)
1900 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1902 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1905 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1906 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1910 ========================================================================
1912 Routine Description:
1913 Initialize NIC hardware
1916 Adapter Pointer to our adapter
1921 IRQL = PASSIVE_LEVEL
1925 ========================================================================
1927 NDIS_STATUS NICInitializeAdapter(
1928 IN PRTMP_ADAPTER pAd,
1929 IN BOOLEAN bHardReset)
1931 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1932 WPDMA_GLO_CFG_STRUC GloCfg;
1934 AC_TXOP_CSR0_STRUC csr0;
1936 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1938 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1943 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1944 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1947 RTMPusecDelay(1000);
1950 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1951 GloCfg.word &= 0xff0;
1952 GloCfg.field.EnTXWriteBackDDONE =1;
1953 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1955 // Record HW Beacon offset
1956 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1957 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1958 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1959 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1960 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1961 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1962 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1963 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1966 // write all shared Ring's base address into ASIC
1969 // asic simulation sequence put this ahead before loading firmware.
1970 // pbf hardware reset
1972 // Initialze ASIC for TX & Rx operation
1973 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1977 NICLoadFirmware(pAd);
1980 return NDIS_STATUS_FAILURE;
1988 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1989 if (pAd->CommonCfg.PhyMode == PHY_11B)
1991 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
1992 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
1996 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
1997 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
1999 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2006 // Status = NICLoadFirmware(pAd);
2008 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2013 ========================================================================
2015 Routine Description:
2019 Adapter Pointer to our adapter
2024 IRQL = PASSIVE_LEVEL
2028 ========================================================================
2030 NDIS_STATUS NICInitializeAsic(
2031 IN PRTMP_ADAPTER pAd,
2032 IN BOOLEAN bHardReset)
2036 UINT32 MacCsr12 = 0, Counter = 0;
2048 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2053 // Make sure MAC gets ready after NICLoadFirmware().
2057 //To avoid hang-on issue when interface up in kernel 2.4,
2058 //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2061 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2063 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2067 } while (Index++ < 100);
2069 pAd->MACVersion = MacCsr0;
2070 DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2071 // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2072 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2073 MacCsr12 &= (~0x2000);
2074 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2076 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2077 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2078 Status = RTUSBVenderReset(pAd);
2080 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2082 // Initialize MAC register to default value
2083 for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2086 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2088 MACRegTable[Index].Value = 0x00000400;
2091 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2096 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2098 RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2104 // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2107 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2109 // RT3071 version E has fixed this issue
2110 if ((pAd->MACVersion & 0xffff) < 0x0211)
2112 if (pAd->NicConfig2.field.DACTestBit == 1)
2114 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2118 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2123 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2126 else if (IS_RT3070(pAd))
2128 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2129 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2134 // Before program BBP, we need to wait BBP/RF get wake up.
2139 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2141 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
2144 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
2145 RTMPusecDelay(1000);
2146 } while (Index++ < 100);
2148 // The commands to firmware should be after these commands, these commands will init firmware
2149 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2150 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2151 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2152 RTMPusecDelay(1000);
2154 // Read BBP register, make sure BBP is up and running before write new data
2158 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2159 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2160 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2161 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2163 if ((R0 == 0xff) || (R0 == 0x00))
2164 return NDIS_STATUS_FAILURE;
2166 // Initialize BBP register to default value
2167 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2169 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2172 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2173 // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2174 if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2175 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2177 // add by johnli, RF power sequence setup
2180 { //update for RT3070/71/72/90/91/92.
2181 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2182 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2183 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2191 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2193 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2196 // improve power consumption
2197 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2198 if (pAd->Antenna.field.TxPath == 1)
2200 // turn off tx DAC_1
2201 bbpreg = (bbpreg | 0x20);
2204 if (pAd->Antenna.field.RxPath == 1)
2206 // turn off tx ADC_1
2209 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2211 // improve power consumption in RT3071 Ver.E
2212 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2214 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2216 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2222 if (pAd->MACVersion == 0x28600100)
2224 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2225 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2228 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2230 // enlarge MAX_LEN_CFG
2232 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2235 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2240 UCHAR MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2242 //Initialize WCID table
2244 for(Index =0 ;Index < 254;Index++)
2246 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2251 // Add radio off control
2253 if (pAd->StaCfg.bRadio == FALSE)
2255 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2256 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2257 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2261 // Clear raw counters
2262 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2263 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2264 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2265 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2266 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2267 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2269 // ASIC will keep garbage value after boot
2270 // Clear all seared key table when initial
2271 // This routine can be ignored in radio-ON/OFF operation.
2274 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2276 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2279 // Clear all pairwise key table when initial
2280 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2282 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2287 // It isn't necessary to clear this space when not hard reset.
2288 if (bHardReset == TRUE)
2290 // clear all on-chip BEACON frame space
2291 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2293 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2294 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2298 AsicDisableSync(pAd);
2299 // Clear raw counters
2300 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2301 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2302 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2303 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2304 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2305 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2306 // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2307 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2308 Counter&=0xffffff00;
2310 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2313 pAd->bUseEfuse=FALSE;
2314 RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2315 pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2318 DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2322 DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2328 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2329 if ((pAd->MACVersion&0xffff) != 0x0101)
2330 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2333 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2334 return NDIS_STATUS_SUCCESS;
2338 ========================================================================
2340 Routine Description:
2344 Adapter Pointer to our adapter
2349 IRQL = PASSIVE_LEVEL
2352 Reset NIC to initial state AS IS system boot up time.
2354 ========================================================================
2357 IN PRTMP_ADAPTER pAd)
2360 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2362 // Disable Rx, register value supposed will remain after reset
2363 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2364 Value &= (0xfffffff3);
2365 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2367 // Issue reset and clear from reset state
2368 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2369 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2371 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2375 ========================================================================
2377 Routine Description:
2378 Check ASIC registers and find any reason the system might hang
2381 Adapter Pointer to our adapter
2386 IRQL = DISPATCH_LEVEL
2388 ========================================================================
2390 BOOLEAN NICCheckForHang(
2391 IN PRTMP_ADAPTER pAd)
2396 VOID NICUpdateFifoStaCounters(
2397 IN PRTMP_ADAPTER pAd)
2399 TX_STA_FIFO_STRUC StaFifo;
2400 MAC_TABLE_ENTRY *pEntry;
2402 UCHAR pid = 0, wcid = 0;
2408 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2410 if (StaFifo.field.bValid == 0)
2413 wcid = (UCHAR)StaFifo.field.wcid;
2416 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2417 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2423 /* PID store Tx MCS Rate */
2424 pid = (UCHAR)StaFifo.field.PidType;
2426 pEntry = &pAd->MacTab.Content[wcid];
2428 pEntry->DebugFIFOCount++;
2430 if (StaFifo.field.TxBF) // 3*3
2431 pEntry->TxBFCount++;
2433 #ifdef UAPSD_AP_SUPPORT
2434 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2435 #endif // UAPSD_AP_SUPPORT //
2437 if (!StaFifo.field.TxSuccess)
2439 pEntry->FIFOCount++;
2440 pEntry->OneSecTxFailCount++;
2442 if (pEntry->FIFOCount >= 1)
2444 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2445 pEntry->NoBADataCountDown = 64;
2447 if(pEntry->PsMode == PWR_ACTIVE)
2450 for (tid=0; tid<NUM_OF_TID; tid++)
2452 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2455 // Update the continuous transmission counter except PS mode
2456 pEntry->ContinueTxFailCnt++;
2460 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2461 // this tx error happened due to sta just go to sleep.
2462 pEntry->FIFOCount = 0;
2463 pEntry->ContinueTxFailCnt = 0;
2465 //pEntry->FIFOCount = 0;
2467 //pEntry->bSendBAR = TRUE;
2471 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2473 pEntry->NoBADataCountDown--;
2474 if (pEntry->NoBADataCountDown==0)
2476 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2480 pEntry->FIFOCount = 0;
2481 pEntry->OneSecTxNoRetryOkCount++;
2482 // update NoDataIdleCount when sucessful send packet to STA.
2483 pEntry->NoDataIdleCount = 0;
2484 pEntry->ContinueTxFailCnt = 0;
2487 succMCS = StaFifo.field.SuccessRate & 0x7F;
2489 reTry = pid - succMCS;
2491 if (StaFifo.field.TxSuccess)
2493 pEntry->TXMCSExpected[pid]++;
2496 pEntry->TXMCSSuccessful[pid]++;
2500 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2505 pEntry->TXMCSFailed[pid]++;
2510 if ((pid >= 12) && succMCS <=7)
2514 pEntry->OneSecTxRetryOkCount += reTry;
2518 // ASIC store 16 stack
2519 } while ( i < (2*TX_RING_SIZE) );
2524 ========================================================================
2526 Routine Description:
2527 Read statistical counters from hardware registers and record them
2528 in software variables for later on query
2531 pAd Pointer to our adapter
2536 IRQL = DISPATCH_LEVEL
2538 ========================================================================
2540 VOID NICUpdateRawCounters(
2541 IN PRTMP_ADAPTER pAd)
2544 RX_STA_CNT0_STRUC RxStaCnt0;
2545 RX_STA_CNT1_STRUC RxStaCnt1;
2546 RX_STA_CNT2_STRUC RxStaCnt2;
2547 TX_STA_CNT0_STRUC TxStaCnt0;
2548 TX_STA_CNT1_STRUC StaTx1;
2549 TX_STA_CNT2_STRUC StaTx2;
2550 TX_AGG_CNT_STRUC TxAggCnt;
2551 TX_AGG_CNT0_STRUC TxAggCnt0;
2552 TX_AGG_CNT1_STRUC TxAggCnt1;
2553 TX_AGG_CNT2_STRUC TxAggCnt2;
2554 TX_AGG_CNT3_STRUC TxAggCnt3;
2555 TX_AGG_CNT4_STRUC TxAggCnt4;
2556 TX_AGG_CNT5_STRUC TxAggCnt5;
2557 TX_AGG_CNT6_STRUC TxAggCnt6;
2558 TX_AGG_CNT7_STRUC TxAggCnt7;
2560 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2561 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2564 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2565 // Update RX PLCP error counter
2566 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2567 // Update False CCA counter
2568 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2571 // Update FCS counters
2572 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2573 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2574 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2575 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2577 // Add FCS error count to private counters
2578 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2579 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2580 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2581 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2582 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2584 // Update Duplicate Rcv check
2585 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2586 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2587 // Update RX Overflow counter
2588 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2591 if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2593 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2594 pAd->watchDogRxOverFlowCnt = 0;
2598 if (RxStaCnt2.field.RxFifoOverflowCount)
2599 pAd->watchDogRxOverFlowCnt++;
2601 pAd->watchDogRxOverFlowCnt = 0;
2606 if (!pAd->bUpdateBcnCntDone)
2608 // Update BEACON sent count
2609 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2610 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2611 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2612 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2613 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2614 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2615 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2616 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2617 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2618 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2622 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2623 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2624 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2625 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2626 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2627 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2628 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2629 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2630 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2631 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2632 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2633 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2634 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2636 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2637 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2638 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2639 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2641 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2642 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2643 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2644 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2646 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2647 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2648 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2649 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2651 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2652 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2654 // Calculate the transmitted A-MPDU count
2655 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2656 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2658 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2659 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2661 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2662 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2664 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2665 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2667 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2668 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2670 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2671 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2673 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2674 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2676 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2677 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2682 RtmpDiagStruct *pDiag;
2683 COUNTER_RALINK *pRalinkCounters;
2684 UCHAR ArrayCurIdx, i;
2686 pDiag = &pAd->DiagStruct;
2687 pRalinkCounters = &pAd->RalinkCounters;
2688 ArrayCurIdx = pDiag->ArrayCurIdx;
2690 if (pDiag->inited == 0)
2692 NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2693 pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2699 pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2700 pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2701 pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2702 pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2703 pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2704 pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2705 pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2706 pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2707 pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2708 pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2709 pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2710 pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2711 pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2712 pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2713 pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2714 pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2715 pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2716 pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2717 pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2719 pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2721 INC_RING_INDEX(pDiag->ArrayCurIdx, DIAGNOSE_TIME);
2722 ArrayCurIdx = pDiag->ArrayCurIdx;
2723 for (i =0; i < 9; i++)
2725 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2726 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2727 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2728 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2730 pDiag->TxDataCnt[ArrayCurIdx] = 0;
2731 pDiag->TxFailCnt[ArrayCurIdx] = 0;
2732 pDiag->RxDataCnt[ArrayCurIdx] = 0;
2733 pDiag->RxCrcErrCnt[ArrayCurIdx] = 0;
2734 for (i = 9; i < 24; i++) // 3*3
2736 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2737 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2738 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2741 if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2742 INC_RING_INDEX(pDiag->ArrayStartIdx, DIAGNOSE_TIME);
2746 #endif // DBG_DIAGNOSE //
2753 ========================================================================
2755 Routine Description:
2756 Reset NIC from error
2759 Adapter Pointer to our adapter
2764 IRQL = PASSIVE_LEVEL
2767 Reset NIC from error state
2769 ========================================================================
2771 VOID NICResetFromError(
2772 IN PRTMP_ADAPTER pAd)
2774 // Reset BBP (according to alex, reset ASIC will force reset BBP
2775 // Therefore, skip the reset BBP
2776 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2778 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2779 // Remove ASIC from reset state
2780 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2782 NICInitializeAdapter(pAd, FALSE);
2783 NICInitAsicFromEEPROM(pAd);
2785 // Switch to current channel, since during reset process, the connection should remains on.
2786 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2787 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2791 ========================================================================
2793 Routine Description:
2794 erase 8051 firmware image in MAC ASIC
2797 Adapter Pointer to our adapter
2799 IRQL = PASSIVE_LEVEL
2801 ========================================================================
2803 VOID NICEraseFirmware(
2804 IN PRTMP_ADAPTER pAd)
2808 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2809 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2811 }/* End of NICEraseFirmware */
2814 ========================================================================
2816 Routine Description:
2817 Load 8051 firmware RT2561.BIN file into MAC ASIC
2820 Adapter Pointer to our adapter
2823 NDIS_STATUS_SUCCESS firmware image load ok
2824 NDIS_STATUS_FAILURE image not found
2826 IRQL = PASSIVE_LEVEL
2828 ========================================================================
2830 NDIS_STATUS NICLoadFirmware(
2831 IN PRTMP_ADAPTER pAd)
2833 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2834 PUCHAR pFirmwareImage;
2835 ULONG FileLength, Index;
2838 UINT32 Version = (pAd->MACVersion >> 16);
2840 pFirmwareImage = FirmwareImage;
2841 FileLength = sizeof(FirmwareImage);
2843 // New 8k byte firmware size for RT3071/RT3072
2844 //printk("Usb Chip\n");
2845 if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
2846 //The firmware image consists of two parts. One is the origianl and the other is the new.
2850 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
2851 { // Use Firmware V2.
2852 //printk("KH:Use New Version,part2\n");
2853 pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
2854 FileLength = FIRMWAREIMAGEV2_LENGTH;
2858 //printk("KH:Use New Version,part1\n");
2859 pFirmwareImage = FirmwareImage;
2860 FileLength = FIRMWAREIMAGEV1_LENGTH;
2866 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
2867 Status = NDIS_STATUS_FAILURE;
2870 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2872 /* check if MCU is ready */
2876 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2881 RTMPusecDelay(1000);
2882 } while (Index++ < 1000);
2886 Status = NDIS_STATUS_FAILURE;
2887 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2890 DBGPRINT(RT_DEBUG_TRACE,
2891 ("<=== %s (status=%d)\n", __func__, Status));
2893 } /* End of NICLoadFirmware */
2897 ========================================================================
2899 Routine Description:
2900 Load Tx rate switching parameters
2903 Adapter Pointer to our adapter
2906 NDIS_STATUS_SUCCESS firmware image load ok
2907 NDIS_STATUS_FAILURE image not found
2909 IRQL = PASSIVE_LEVEL
2912 1. (B0: Valid Item number) (B1:Initial item from zero)
2913 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2915 ========================================================================
2917 NDIS_STATUS NICLoadRateSwitchingParams(
2918 IN PRTMP_ADAPTER pAd)
2920 return NDIS_STATUS_SUCCESS;
2924 ========================================================================
2926 Routine Description:
2927 if pSrc1 all zero with length Length, return 0.
2928 If not all zero, return 1
2937 IRQL = DISPATCH_LEVEL
2941 ========================================================================
2943 ULONG RTMPNotAllZero(
2950 pMem1 = (PUCHAR) pSrc1;
2952 for (Index = 0; Index < Length; Index++)
2954 if (pMem1[Index] != 0x0)
2960 if (Index == Length)
2971 ========================================================================
2973 Routine Description:
2974 Compare two memory block
2977 pSrc1 Pointer to first memory address
2978 pSrc2 Pointer to second memory address
2982 1: pSrc1 memory is larger
2983 2: pSrc2 memory is larger
2985 IRQL = DISPATCH_LEVEL
2989 ========================================================================
2991 ULONG RTMPCompareMemory(
3000 pMem1 = (PUCHAR) pSrc1;
3001 pMem2 = (PUCHAR) pSrc2;
3003 for (Index = 0; Index < Length; Index++)
3005 if (pMem1[Index] > pMem2[Index])
3007 else if (pMem1[Index] < pMem2[Index])
3016 ========================================================================
3018 Routine Description:
3019 Zero out memory block
3022 pSrc1 Pointer to memory address
3028 IRQL = PASSIVE_LEVEL
3029 IRQL = DISPATCH_LEVEL
3033 ========================================================================
3035 VOID RTMPZeroMemory(
3042 pMem = (PUCHAR) pSrc;
3044 for (Index = 0; Index < Length; Index++)
3050 VOID RTMPFillMemory(
3058 pMem = (PUCHAR) pSrc;
3060 for (Index = 0; Index < Length; Index++)
3067 ========================================================================
3069 Routine Description:
3070 Copy data from memory block 1 to memory block 2
3073 pDest Pointer to destination memory address
3074 pSrc Pointer to source memory address
3080 IRQL = PASSIVE_LEVEL
3081 IRQL = DISPATCH_LEVEL
3085 ========================================================================
3087 VOID RTMPMoveMemory(
3096 ASSERT((Length==0) || (pDest && pSrc));
3098 pMem1 = (PUCHAR) pDest;
3099 pMem2 = (PUCHAR) pSrc;
3101 for (Index = 0; Index < Length; Index++)
3103 pMem1[Index] = pMem2[Index];
3108 ========================================================================
3110 Routine Description:
3111 Initialize port configuration structure
3114 Adapter Pointer to our adapter
3119 IRQL = PASSIVE_LEVEL
3123 ========================================================================
3126 IN PRTMP_ADAPTER pAd)
3128 UINT key_index, bss_index;
3130 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3133 // part I. intialize common configuration
3136 pAd->BulkOutReq = 0;
3138 pAd->BulkOutComplete = 0;
3139 pAd->BulkOutCompleteOther = 0;
3140 pAd->BulkOutCompleteCancel = 0;
3142 pAd->BulkInComplete = 0;
3143 pAd->BulkInCompleteFail = 0;
3145 //pAd->QuickTimerP = 100;
3146 //pAd->TurnAggrBulkInCount = 0;
3147 pAd->bUsbTxBulkAggre = 0;
3149 // init as unsed value to ensure driver will set to MCU once.
3150 pAd->LedIndicatorStregth = 0xFF;
3152 pAd->CommonCfg.MaxPktOneTxBulk = 2;
3153 pAd->CommonCfg.TxBulkFactor = 1;
3154 pAd->CommonCfg.RxBulkFactor =1;
3156 pAd->CommonCfg.TxPower = 100; //mW
3158 NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3161 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3163 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3165 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3166 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3170 pAd->EepromAccess = FALSE;
3172 pAd->Antenna.word = 0;
3173 pAd->CommonCfg.BBPCurrentBW = BW_20;
3175 pAd->LedCntl.word = 0;
3177 pAd->bAutoTxAgcA = FALSE; // Default is OFF
3178 pAd->bAutoTxAgcG = FALSE; // Default is OFF
3179 pAd->RfIcType = RFIC_2820;
3181 // Init timer for reset complete event
3182 pAd->CommonCfg.CentralChannel = 1;
3183 pAd->bForcePrintTX = FALSE;
3184 pAd->bForcePrintRX = FALSE;
3185 pAd->bStaFifoTest = FALSE;
3186 pAd->bProtectionTest = FALSE;
3187 pAd->bHCCATest = FALSE;
3188 pAd->bGenOneHCCA = FALSE;
3189 pAd->CommonCfg.Dsifs = 10; // in units of usec
3190 pAd->CommonCfg.TxPower = 100; //mW
3191 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3192 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3193 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3194 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3195 pAd->CommonCfg.RtsThreshold = 2347;
3196 pAd->CommonCfg.FragmentThreshold = 2346;
3197 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
3198 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3199 pAd->CommonCfg.PhyMode = 0xff; // unknown
3200 pAd->CommonCfg.BandState = UNKNOWN_BAND;
3201 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3202 pAd->CommonCfg.RadarDetect.CSCount = 0;
3203 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3204 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3205 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3206 pAd->CommonCfg.bAPSDCapable = FALSE;
3207 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3208 pAd->CommonCfg.TriggerTimerCount = 0;
3209 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3210 pAd->CommonCfg.bCountryFlag = FALSE;
3211 pAd->CommonCfg.TxStream = 0;
3212 pAd->CommonCfg.RxStream = 0;
3214 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3216 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3217 pAd->HTCEnable = FALSE;
3218 pAd->bBroadComHT = FALSE;
3219 pAd->CommonCfg.bRdg = FALSE;
3221 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3222 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3223 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3224 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3225 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3226 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3227 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3229 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3230 BATableInit(pAd, &pAd->BATable);
3232 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3233 pAd->CommonCfg.bHTProtect = 1;
3234 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3235 pAd->CommonCfg.bBADecline = FALSE;
3236 pAd->CommonCfg.bDisableReordering = FALSE;
3238 pAd->CommonCfg.TxBASize = 7;
3240 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3242 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3243 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3244 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3245 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3246 pAd->CommonCfg.TxRate = RATE_6;
3248 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3249 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3250 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3252 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3255 // part II. intialize STA specific configuration
3258 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3259 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3260 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3261 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3263 pAd->StaCfg.Psm = PWR_ACTIVE;
3265 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3266 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3267 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3268 pAd->StaCfg.bMixCipher = FALSE;
3269 pAd->StaCfg.DefaultKeyId = 0;
3271 // 802.1x port control
3272 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3273 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3274 pAd->StaCfg.LastMicErrorTime = 0;
3275 pAd->StaCfg.MicErrCnt = 0;
3276 pAd->StaCfg.bBlockAssoc = FALSE;
3277 pAd->StaCfg.WpaState = SS_NOTUSE;
3279 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3281 pAd->StaCfg.RssiTrigger = 0;
3282 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3283 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3284 pAd->StaCfg.AtimWin = 0;
3285 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3286 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3287 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3288 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3289 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3291 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3292 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3295 // global variables mXXXX used in MAC protocol state machines
3296 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3297 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3298 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3300 // PHY specification
3301 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3302 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3305 // user desired power mode
3306 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3307 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3308 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3310 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3311 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3314 pAd->StaCfg.ScanCnt = 0;
3316 // CCX 2.0 control flag init
3317 pAd->StaCfg.CCXEnable = FALSE;
3318 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3319 pAd->StaCfg.CCXQosECWMin = 4;
3320 pAd->StaCfg.CCXQosECWMax = 10;
3322 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3323 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3324 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3325 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3326 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3328 // Nitro mode control
3329 pAd->StaCfg.bAutoReconnect = TRUE;
3331 // Save the init time as last scan time, the system should do scan after 2 seconds.
3332 // This patch is for driver wake up from standby mode, system will do scan right away.
3333 pAd->StaCfg.LastScanTime = 0;
3334 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3335 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3336 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3337 pAd->StaCfg.IEEE8021X = FALSE;
3338 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3339 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3340 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3343 // Default for extra information is not valid
3344 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3346 // Default Config change flag
3347 pAd->bConfigChanged = FALSE;
3350 // part III. AP configurations
3357 // dynamic BBP R66:sensibity tuning to overcome background noise
3358 pAd->BbpTuning.bEnable = TRUE;
3359 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3360 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3361 pAd->BbpTuning.R66Delta = 4;
3362 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3365 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3366 // if not initial this value, the default value will be 0.
3368 pAd->BbpTuning.R66CurrentValue = 0x38;
3370 pAd->Bbp94 = BBPR94_DEFAULT;
3371 pAd->BbpForCCK = FALSE;
3373 // initialize MAC table and allocate spin lock
3374 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3375 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3376 NdisAllocateSpinLock(&pAd->MacTabLock);
3378 pAd->CommonCfg.bWiFiTest = FALSE;
3381 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3384 // IRQL = PASSIVE_LEVEL
3387 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3388 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3389 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3394 // FUNCTION: AtoH(char *, UCHAR *, int)
3396 // PURPOSE: Converts ascii string to network order hex
3399 // src - pointer to input ascii string
3400 // dest - pointer to output hex
3401 // destlen - size of dest
3405 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3406 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3408 // IRQL = PASSIVE_LEVEL
3410 void AtoH(char * src, UCHAR * dest, int destlen)
3416 destTemp = (PUCHAR) dest;
3420 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3421 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3426 VOID RTMPPatchMacBbpBug(
3427 IN PRTMP_ADAPTER pAd)
3431 // Initialize BBP register to default value
3432 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3434 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3437 // Initialize RF register to default value
3438 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3439 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3441 // Re-init BBP register from EEPROM value
3442 NICInitAsicFromEEPROM(pAd);
3446 ========================================================================
3448 Routine Description:
3452 pAd Pointer to our adapter
3453 pTimer Timer structure
3454 pTimerFunc Function to execute when timer expired
3455 Repeat Ture for period timer
3462 ========================================================================
3465 IN PRTMP_ADAPTER pAd,
3466 IN PRALINK_TIMER_STRUCT pTimer,
3467 IN PVOID pTimerFunc,
3472 // Set Valid to TRUE for later used.
3473 // It will crash if we cancel a timer or set a timer
3474 // that we haven't initialize before.
3476 pTimer->Valid = TRUE;
3478 pTimer->PeriodicType = Repeat;
3479 pTimer->State = FALSE;
3480 pTimer->cookie = (ULONG) pData;
3486 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3490 ========================================================================
3492 Routine Description:
3496 pTimer Timer structure
3497 Value Timer value in milliseconds
3503 To use this routine, must call RTMPInitTimer before.
3505 ========================================================================
3508 IN PRALINK_TIMER_STRUCT pTimer,
3513 pTimer->TimerValue = Value;
3514 pTimer->State = FALSE;
3515 if (pTimer->PeriodicType == TRUE)
3517 pTimer->Repeat = TRUE;
3518 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3522 pTimer->Repeat = FALSE;
3523 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3528 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3534 ========================================================================
3536 Routine Description:
3540 pTimer Timer structure
3541 Value Timer value in milliseconds
3547 To use this routine, must call RTMPInitTimer before.
3549 ========================================================================
3552 IN PRALINK_TIMER_STRUCT pTimer,
3559 pTimer->TimerValue = Value;
3560 pTimer->State = FALSE;
3561 if (pTimer->PeriodicType == TRUE)
3563 RTMPCancelTimer(pTimer, &Cancel);
3564 RTMPSetTimer(pTimer, Value);
3568 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3573 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3578 ========================================================================
3580 Routine Description:
3581 Cancel timer objects
3584 Adapter Pointer to our adapter
3589 IRQL = PASSIVE_LEVEL
3590 IRQL = DISPATCH_LEVEL
3593 1.) To use this routine, must call RTMPInitTimer before.
3594 2.) Reset NIC to initial state AS IS system boot up time.
3596 ========================================================================
3598 VOID RTMPCancelTimer(
3599 IN PRALINK_TIMER_STRUCT pTimer,
3600 OUT BOOLEAN *pCancelled)
3604 if (pTimer->State == FALSE)
3605 pTimer->Repeat = FALSE;
3606 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3608 if (*pCancelled == TRUE)
3609 pTimer->State = TRUE;
3612 // We need to go-through the TimerQ to findout this timer handler and remove it if
3613 // it's still waiting for execution.
3615 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3621 // NdisMCancelTimer just canced the timer and not mean release the timer.
3622 // And don't set the "Valid" to False. So that we can use this timer again.
3624 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3629 ========================================================================
3631 Routine Description:
3635 pAd Pointer to our adapter
3641 IRQL = PASSIVE_LEVEL
3642 IRQL = DISPATCH_LEVEL
3646 ========================================================================
3649 IN PRTMP_ADAPTER pAd,
3656 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3661 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3662 pAd->LedIndicatorStregth = 0;
3665 if (pAd->CommonCfg.Channel > 14)
3669 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3673 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3676 LowByte = 0; // Driver sets MAC register and MAC controls LED
3679 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3683 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3685 case LED_ON_SITE_SURVEY:
3687 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3691 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3694 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3699 // Keep LED status for LED SiteSurvey mode.
3700 // After SiteSurvey, we will set the LED mode to previous status.
3702 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3703 pAd->LedStatus = Status;
3705 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3709 ========================================================================
3711 Routine Description:
3712 Set LED Signal Stregth
3715 pAd Pointer to our adapter
3721 IRQL = PASSIVE_LEVEL
3724 Can be run on any IRQL level.
3726 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3733 ========================================================================
3735 VOID RTMPSetSignalLED(
3736 IN PRTMP_ADAPTER pAd,
3737 IN NDIS_802_11_RSSI Dbm)
3742 // if not Signal Stregth, then do nothing.
3744 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3751 else if (Dbm <= -81)
3753 else if (Dbm <= -71)
3755 else if (Dbm <= -67)
3757 else if (Dbm <= -57)
3763 // Update Signal Stregth to firmware if changed.
3765 if (pAd->LedIndicatorStregth != nLed)
3767 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3768 pAd->LedIndicatorStregth = nLed;
3773 ========================================================================
3775 Routine Description:
3779 pAd Pointer to our adapter
3784 IRQL <= DISPATCH_LEVEL
3787 Before Enable RX, make sure you have enabled Interrupt.
3788 ========================================================================
3790 VOID RTMPEnableRxTx(
3791 IN PRTMP_ADAPTER pAd)
3793 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3796 RT28XXDMAEnable(pAd);
3798 // enable RX of MAC block
3799 if (pAd->OpMode == OPMODE_AP)
3801 UINT32 rx_filter_flag = APNORMAL;
3804 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
3808 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
3811 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3812 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));