git.oblomov.eu Git - linux-2.6/blob - drivers/net/pcnet32.c

   1 /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
   2 /*
   3  *      Copyright 1996-1999 Thomas Bogendoerfer
   4  *
   5  *      Derived from the lance driver written 1993,1994,1995 by Donald Becker.
   6  *
   7  *      Copyright 1993 United States Government as represented by the
   8  *      Director, National Security Agency.
   9  *
  10  *      This software may be used and distributed according to the terms
  11  *      of the GNU General Public License, incorporated herein by reference.
  12  *
  13  *      This driver is for PCnet32 and PCnetPCI based ethercards
  14  */
  15 /**************************************************************************
  16  *  23 Oct, 2000.
  17  *  Fixed a few bugs, related to running the controller in 32bit mode.
  18  *
  19  *  Carsten Langgaard, carstenl@mips.com
  20  *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  21  *
  22  *************************************************************************/
  23
  24 #define DRV_NAME        "pcnet32"
  25 #define DRV_VERSION     "1.32"
  26 #define DRV_RELDATE     "18.Mar.2006"
  27 #define PFX             DRV_NAME ": "
  28
  29 static const char *const version =
  30     DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n";
  31
  32 #include <linux/module.h>
  33 #include <linux/kernel.h>
  34 #include <linux/string.h>
  35 #include <linux/errno.h>
  36 #include <linux/ioport.h>
  37 #include <linux/slab.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/pci.h>
  40 #include <linux/delay.h>
  41 #include <linux/init.h>
  42 #include <linux/ethtool.h>
  43 #include <linux/mii.h>
  44 #include <linux/crc32.h>
  45 #include <linux/netdevice.h>
  46 #include <linux/etherdevice.h>
  47 #include <linux/skbuff.h>
  48 #include <linux/spinlock.h>
  49 #include <linux/moduleparam.h>
  50 #include <linux/bitops.h>
  51
  52 #include <asm/dma.h>
  53 #include <asm/io.h>
  54 #include <asm/uaccess.h>
  55 #include <asm/irq.h>
  56
  57 /*
  58  * PCI device identifiers for "new style" Linux PCI Device Drivers
  59  */
  60 static struct pci_device_id pcnet32_pci_tbl[] = {
  61         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE_HOME), },
  62         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE), },
  63
  64         /*
  65          * Adapters that were sold with IBM's RS/6000 or pSeries hardware have
  66          * the incorrect vendor id.
  67          */
  68         { PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_AMD_LANCE),
  69           .class = (PCI_CLASS_NETWORK_ETHERNET << 8), .class_mask = 0xffff00, },
  70
  71         { }     /* terminate list */
  72 };
  73
  74 MODULE_DEVICE_TABLE(pci, pcnet32_pci_tbl);
  75
  76 static int cards_found;
  77
  78 /*
  79  * VLB I/O addresses
  80  */
  81 static unsigned int pcnet32_portlist[] __initdata =
  82     { 0x300, 0x320, 0x340, 0x360, 0 };
  83
  84 static int pcnet32_debug = 0;
  85 static int tx_start = 1;        /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
  86 static int pcnet32vlb;          /* check for VLB cards ? */
  87
  88 static struct net_device *pcnet32_dev;
  89
  90 static int max_interrupt_work = 2;
  91 static int rx_copybreak = 200;
  92
  93 #define PCNET32_PORT_AUI      0x00
  94 #define PCNET32_PORT_10BT     0x01
  95 #define PCNET32_PORT_GPSI     0x02
  96 #define PCNET32_PORT_MII      0x03
  97
  98 #define PCNET32_PORT_PORTSEL  0x03
  99 #define PCNET32_PORT_ASEL     0x04
 100 #define PCNET32_PORT_100      0x40
 101 #define PCNET32_PORT_FD       0x80
 102
 103 #define PCNET32_DMA_MASK 0xffffffff
 104
 105 #define PCNET32_WATCHDOG_TIMEOUT (jiffies + (2 * HZ))
 106 #define PCNET32_BLINK_TIMEOUT   (jiffies + (HZ/4))
 107
 108 /*
 109  * table to translate option values from tulip
 110  * to internal options
 111  */
 112 static const unsigned char options_mapping[] = {
 113         PCNET32_PORT_ASEL,                      /*  0 Auto-select      */
 114         PCNET32_PORT_AUI,                       /*  1 BNC/AUI          */
 115         PCNET32_PORT_AUI,                       /*  2 AUI/BNC          */
 116         PCNET32_PORT_ASEL,                      /*  3 not supported    */
 117         PCNET32_PORT_10BT | PCNET32_PORT_FD,    /*  4 10baseT-FD       */
 118         PCNET32_PORT_ASEL,                      /*  5 not supported    */
 119         PCNET32_PORT_ASEL,                      /*  6 not supported    */
 120         PCNET32_PORT_ASEL,                      /*  7 not supported    */
 121         PCNET32_PORT_ASEL,                      /*  8 not supported    */
 122         PCNET32_PORT_MII,                       /*  9 MII 10baseT      */
 123         PCNET32_PORT_MII | PCNET32_PORT_FD,     /* 10 MII 10baseT-FD   */
 124         PCNET32_PORT_MII,                       /* 11 MII (autosel)    */
 125         PCNET32_PORT_10BT,                      /* 12 10BaseT          */
 126         PCNET32_PORT_MII | PCNET32_PORT_100,    /* 13 MII 100BaseTx    */
 127                                                 /* 14 MII 100BaseTx-FD */
 128         PCNET32_PORT_MII | PCNET32_PORT_100 | PCNET32_PORT_FD,
 129         PCNET32_PORT_ASEL                       /* 15 not supported    */
 130 };
 131
 132 static const char pcnet32_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Loopback test  (offline)"
 134 };
 135
 136 #define PCNET32_TEST_LEN (sizeof(pcnet32_gstrings_test) / ETH_GSTRING_LEN)
 137
 138 #define PCNET32_NUM_REGS 136
 139
 140 #define MAX_UNITS 8             /* More are supported, limit only on options */
 141 static int options[MAX_UNITS];
 142 static int full_duplex[MAX_UNITS];
 143 static int homepna[MAX_UNITS];
 144
 145 /*
 146  *                              Theory of Operation
 147  *
 148  * This driver uses the same software structure as the normal lance
 149  * driver. So look for a verbose description in lance.c. The differences
 150  * to the normal lance driver is the use of the 32bit mode of PCnet32
 151  * and PCnetPCI chips. Because these chips are 32bit chips, there is no
 152  * 16MB limitation and we don't need bounce buffers.
 153  */
 154
 155 /*
 156  * Set the number of Tx and Rx buffers, using Log_2(# buffers).
 157  * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
 158  * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
 159  */
 160 #ifndef PCNET32_LOG_TX_BUFFERS
 161 #define PCNET32_LOG_TX_BUFFERS          4
 162 #define PCNET32_LOG_RX_BUFFERS          5
 163 #define PCNET32_LOG_MAX_TX_BUFFERS      9       /* 2^9 == 512 */
 164 #define PCNET32_LOG_MAX_RX_BUFFERS      9
 165 #endif
 166
 167 #define TX_RING_SIZE            (1 << (PCNET32_LOG_TX_BUFFERS))
 168 #define TX_MAX_RING_SIZE        (1 << (PCNET32_LOG_MAX_TX_BUFFERS))
 169
 170 #define RX_RING_SIZE            (1 << (PCNET32_LOG_RX_BUFFERS))
 171 #define RX_MAX_RING_SIZE        (1 << (PCNET32_LOG_MAX_RX_BUFFERS))
 172
 173 #define PKT_BUF_SZ              1544
 174
 175 /* Offsets from base I/O address. */
 176 #define PCNET32_WIO_RDP         0x10
 177 #define PCNET32_WIO_RAP         0x12
 178 #define PCNET32_WIO_RESET       0x14
 179 #define PCNET32_WIO_BDP         0x16
 180
 181 #define PCNET32_DWIO_RDP        0x10
 182 #define PCNET32_DWIO_RAP        0x14
 183 #define PCNET32_DWIO_RESET      0x18
 184 #define PCNET32_DWIO_BDP        0x1C
 185
 186 #define PCNET32_TOTAL_SIZE      0x20
 187
 188 /* The PCNET32 Rx and Tx ring descriptors. */
 189 struct pcnet32_rx_head {
 190         u32     base;
 191         s16     buf_length;
 192         s16     status;
 193         u32     msg_length;
 194         u32     reserved;
 195 };
 196
 197 struct pcnet32_tx_head {
 198         u32     base;
 199         s16     length;
 200         s16     status;
 201         u32     misc;
 202         u32     reserved;
 203 };
 204
 205 /* The PCNET32 32-Bit initialization block, described in databook. */
 206 struct pcnet32_init_block {
 207         u16     mode;
 208         u16     tlen_rlen;
 209         u8      phys_addr[6];
 210         u16     reserved;
 211         u32     filter[2];
 212         /* Receive and transmit ring base, along with extra bits. */
 213         u32     rx_ring;
 214         u32     tx_ring;
 215 };
 216
 217 /* PCnet32 access functions */
 218 struct pcnet32_access {
 219         u16     (*read_csr) (unsigned long, int);
 220         void    (*write_csr) (unsigned long, int, u16);
 221         u16     (*read_bcr) (unsigned long, int);
 222         void    (*write_bcr) (unsigned long, int, u16);
 223         u16     (*read_rap) (unsigned long);
 224         void    (*write_rap) (unsigned long, u16);
 225         void    (*reset) (unsigned long);
 226 };
 227
 228 /*
 229  * The first field of pcnet32_private is read by the ethernet device
 230  * so the structure should be allocated using pci_alloc_consistent().
 231  */
 232 struct pcnet32_private {
 233         struct pcnet32_init_block init_block;
 234         /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
 235         struct pcnet32_rx_head  *rx_ring;
 236         struct pcnet32_tx_head  *tx_ring;
 237         dma_addr_t              dma_addr;/* DMA address of beginning of this
 238                                    object, returned by pci_alloc_consistent */
 239         struct pci_dev          *pci_dev;
 240         const char              *name;
 241         /* The saved address of a sent-in-place packet/buffer, for skfree(). */
 242         struct sk_buff          **tx_skbuff;
 243         struct sk_buff          **rx_skbuff;
 244         dma_addr_t              *tx_dma_addr;
 245         dma_addr_t              *rx_dma_addr;
 246         struct pcnet32_access   a;
 247         spinlock_t              lock;           /* Guard lock */
 248         unsigned int            cur_rx, cur_tx; /* The next free ring entry */
 249         unsigned int            rx_ring_size;   /* current rx ring size */
 250         unsigned int            tx_ring_size;   /* current tx ring size */
 251         unsigned int            rx_mod_mask;    /* rx ring modular mask */
 252         unsigned int            tx_mod_mask;    /* tx ring modular mask */
 253         unsigned short          rx_len_bits;
 254         unsigned short          tx_len_bits;
 255         dma_addr_t              rx_ring_dma_addr;
 256         dma_addr_t              tx_ring_dma_addr;
 257         unsigned int            dirty_rx,       /* ring entries to be freed. */
 258                                 dirty_tx;
 259
 260         struct net_device_stats stats;
 261         char                    tx_full;
 262         char                    phycount;       /* number of phys found */
 263         int                     options;
 264         unsigned int            shared_irq:1,   /* shared irq possible */
 265                                 dxsuflo:1,   /* disable transmit stop on uflo */
 266                                 mii:1;          /* mii port available */
 267         struct net_device       *next;
 268         struct mii_if_info      mii_if;
 269         struct timer_list       watchdog_timer;
 270         struct timer_list       blink_timer;
 271         u32                     msg_enable;     /* debug message level */
 272
 273         /* each bit indicates an available PHY */
 274         u32                     phymask;
 275 };
 276
 277 static int pcnet32_probe_pci(struct pci_dev *, const struct pci_device_id *);
 278 static int pcnet32_probe1(unsigned long, int, struct pci_dev *);
 279 static int pcnet32_open(struct net_device *);
 280 static int pcnet32_init_ring(struct net_device *);
 281 static int pcnet32_start_xmit(struct sk_buff *, struct net_device *);
 282 static int pcnet32_rx(struct net_device *);
 283 static void pcnet32_tx_timeout(struct net_device *dev);
 284 static irqreturn_t pcnet32_interrupt(int, void *, struct pt_regs *);
 285 static int pcnet32_close(struct net_device *);
 286 static struct net_device_stats *pcnet32_get_stats(struct net_device *);
 287 static void pcnet32_load_multicast(struct net_device *dev);
 288 static void pcnet32_set_multicast_list(struct net_device *);
 289 static int pcnet32_ioctl(struct net_device *, struct ifreq *, int);
 290 static void pcnet32_watchdog(struct net_device *);
 291 static int mdio_read(struct net_device *dev, int phy_id, int reg_num);
 292 static void mdio_write(struct net_device *dev, int phy_id, int reg_num,
 293                        int val);
 294 static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits);
 295 static void pcnet32_ethtool_test(struct net_device *dev,
 296                                  struct ethtool_test *eth_test, u64 * data);
 297 static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1);
 298 static int pcnet32_phys_id(struct net_device *dev, u32 data);
 299 static void pcnet32_led_blink_callback(struct net_device *dev);
 300 static int pcnet32_get_regs_len(struct net_device *dev);
 301 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
 302                              void *ptr);
 303 static void pcnet32_purge_tx_ring(struct net_device *dev);
 304 static int pcnet32_alloc_ring(struct net_device *dev, char *name);
 305 static void pcnet32_free_ring(struct net_device *dev);
 306 static void pcnet32_check_media(struct net_device *dev, int verbose);
 307
 308 static u16 pcnet32_wio_read_csr(unsigned long addr, int index)
 309 {
 310         outw(index, addr + PCNET32_WIO_RAP);
 311         return inw(addr + PCNET32_WIO_RDP);
 312 }
 313
 314 static void pcnet32_wio_write_csr(unsigned long addr, int index, u16 val)
 315 {
 316         outw(index, addr + PCNET32_WIO_RAP);
 317         outw(val, addr + PCNET32_WIO_RDP);
 318 }
 319
 320 static u16 pcnet32_wio_read_bcr(unsigned long addr, int index)
 321 {
 322         outw(index, addr + PCNET32_WIO_RAP);
 323         return inw(addr + PCNET32_WIO_BDP);
 324 }
 325
 326 static void pcnet32_wio_write_bcr(unsigned long addr, int index, u16 val)
 327 {
 328         outw(index, addr + PCNET32_WIO_RAP);
 329         outw(val, addr + PCNET32_WIO_BDP);
 330 }
 331
 332 static u16 pcnet32_wio_read_rap(unsigned long addr)
 333 {
 334         return inw(addr + PCNET32_WIO_RAP);
 335 }
 336
 337 static void pcnet32_wio_write_rap(unsigned long addr, u16 val)
 338 {
 339         outw(val, addr + PCNET32_WIO_RAP);
 340 }
 341
 342 static void pcnet32_wio_reset(unsigned long addr)
 343 {
 344         inw(addr + PCNET32_WIO_RESET);
 345 }
 346
 347 static int pcnet32_wio_check(unsigned long addr)
 348 {
 349         outw(88, addr + PCNET32_WIO_RAP);
 350         return (inw(addr + PCNET32_WIO_RAP) == 88);
 351 }
 352
 353 static struct pcnet32_access pcnet32_wio = {
 354         .read_csr = pcnet32_wio_read_csr,
 355         .write_csr = pcnet32_wio_write_csr,
 356         .read_bcr = pcnet32_wio_read_bcr,
 357         .write_bcr = pcnet32_wio_write_bcr,
 358         .read_rap = pcnet32_wio_read_rap,
 359         .write_rap = pcnet32_wio_write_rap,
 360         .reset = pcnet32_wio_reset
 361 };
 362
 363 static u16 pcnet32_dwio_read_csr(unsigned long addr, int index)
 364 {
 365         outl(index, addr + PCNET32_DWIO_RAP);
 366         return (inl(addr + PCNET32_DWIO_RDP) & 0xffff);
 367 }
 368
 369 static void pcnet32_dwio_write_csr(unsigned long addr, int index, u16 val)
 370 {
 371         outl(index, addr + PCNET32_DWIO_RAP);
 372         outl(val, addr + PCNET32_DWIO_RDP);
 373 }
 374
 375 static u16 pcnet32_dwio_read_bcr(unsigned long addr, int index)
 376 {
 377         outl(index, addr + PCNET32_DWIO_RAP);
 378         return (inl(addr + PCNET32_DWIO_BDP) & 0xffff);
 379 }
 380
 381 static void pcnet32_dwio_write_bcr(unsigned long addr, int index, u16 val)
 382 {
 383         outl(index, addr + PCNET32_DWIO_RAP);
 384         outl(val, addr + PCNET32_DWIO_BDP);
 385 }
 386
 387 static u16 pcnet32_dwio_read_rap(unsigned long addr)
 388 {
 389         return (inl(addr + PCNET32_DWIO_RAP) & 0xffff);
 390 }
 391
 392 static void pcnet32_dwio_write_rap(unsigned long addr, u16 val)
 393 {
 394         outl(val, addr + PCNET32_DWIO_RAP);
 395 }
 396
 397 static void pcnet32_dwio_reset(unsigned long addr)
 398 {
 399         inl(addr + PCNET32_DWIO_RESET);
 400 }
 401
 402 static int pcnet32_dwio_check(unsigned long addr)
 403 {
 404         outl(88, addr + PCNET32_DWIO_RAP);
 405         return ((inl(addr + PCNET32_DWIO_RAP) & 0xffff) == 88);
 406 }
 407
 408 static struct pcnet32_access pcnet32_dwio = {
 409         .read_csr = pcnet32_dwio_read_csr,
 410         .write_csr = pcnet32_dwio_write_csr,
 411         .read_bcr = pcnet32_dwio_read_bcr,
 412         .write_bcr = pcnet32_dwio_write_bcr,
 413         .read_rap = pcnet32_dwio_read_rap,
 414         .write_rap = pcnet32_dwio_write_rap,
 415         .reset = pcnet32_dwio_reset
 416 };
 417
 418 #ifdef CONFIG_NET_POLL_CONTROLLER
 419 static void pcnet32_poll_controller(struct net_device *dev)
 420 {
 421         disable_irq(dev->irq);
 422         pcnet32_interrupt(0, dev, NULL);
 423         enable_irq(dev->irq);
 424 }
 425 #endif
 426
 427 static int pcnet32_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 428 {
 429         struct pcnet32_private *lp = dev->priv;
 430         unsigned long flags;
 431         int r = -EOPNOTSUPP;
 432
 433         if (lp->mii) {
 434                 spin_lock_irqsave(&lp->lock, flags);
 435                 mii_ethtool_gset(&lp->mii_if, cmd);
 436                 spin_unlock_irqrestore(&lp->lock, flags);
 437                 r = 0;
 438         }
 439         return r;
 440 }
 441
 442 static int pcnet32_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 443 {
 444         struct pcnet32_private *lp = dev->priv;
 445         unsigned long flags;
 446         int r = -EOPNOTSUPP;
 447
 448         if (lp->mii) {
 449                 spin_lock_irqsave(&lp->lock, flags);
 450                 r = mii_ethtool_sset(&lp->mii_if, cmd);
 451                 spin_unlock_irqrestore(&lp->lock, flags);
 452         }
 453         return r;
 454 }
 455
 456 static void pcnet32_get_drvinfo(struct net_device *dev,
 457                                 struct ethtool_drvinfo *info)
 458 {
 459         struct pcnet32_private *lp = dev->priv;
 460
 461         strcpy(info->driver, DRV_NAME);
 462         strcpy(info->version, DRV_VERSION);
 463         if (lp->pci_dev)
 464                 strcpy(info->bus_info, pci_name(lp->pci_dev));
 465         else
 466                 sprintf(info->bus_info, "VLB 0x%lx", dev->base_addr);
 467 }
 468
 469 static u32 pcnet32_get_link(struct net_device *dev)
 470 {
 471         struct pcnet32_private *lp = dev->priv;
 472         unsigned long flags;
 473         int r;
 474
 475         spin_lock_irqsave(&lp->lock, flags);
 476         if (lp->mii) {
 477                 r = mii_link_ok(&lp->mii_if);
 478         } else {
 479                 ulong ioaddr = dev->base_addr;  /* card base I/O address */
 480                 r = (lp->a.read_bcr(ioaddr, 4) != 0xc0);
 481         }
 482         spin_unlock_irqrestore(&lp->lock, flags);
 483
 484         return r;
 485 }
 486
 487 static u32 pcnet32_get_msglevel(struct net_device *dev)
 488 {
 489         struct pcnet32_private *lp = dev->priv;
 490         return lp->msg_enable;
 491 }
 492
 493 static void pcnet32_set_msglevel(struct net_device *dev, u32 value)
 494 {
 495         struct pcnet32_private *lp = dev->priv;
 496         lp->msg_enable = value;
 497 }
 498
 499 static int pcnet32_nway_reset(struct net_device *dev)
 500 {
 501         struct pcnet32_private *lp = dev->priv;
 502         unsigned long flags;
 503         int r = -EOPNOTSUPP;
 504
 505         if (lp->mii) {
 506                 spin_lock_irqsave(&lp->lock, flags);
 507                 r = mii_nway_restart(&lp->mii_if);
 508                 spin_unlock_irqrestore(&lp->lock, flags);
 509         }
 510         return r;
 511 }
 512
 513 static void pcnet32_get_ringparam(struct net_device *dev,
 514                                   struct ethtool_ringparam *ering)
 515 {
 516         struct pcnet32_private *lp = dev->priv;
 517
 518         ering->tx_max_pending = TX_MAX_RING_SIZE;
 519         ering->tx_pending = lp->tx_ring_size;
 520         ering->rx_max_pending = RX_MAX_RING_SIZE;
 521         ering->rx_pending = lp->rx_ring_size;
 522 }
 523
 524 static int pcnet32_set_ringparam(struct net_device *dev,
 525                                  struct ethtool_ringparam *ering)
 526 {
 527         struct pcnet32_private *lp = dev->priv;
 528         unsigned long flags;
 529         int i;
 530
 531         if (ering->rx_mini_pending || ering->rx_jumbo_pending)
 532                 return -EINVAL;
 533
 534         if (netif_running(dev))
 535                 pcnet32_close(dev);
 536
 537         spin_lock_irqsave(&lp->lock, flags);
 538         pcnet32_free_ring(dev);
 539         lp->tx_ring_size =
 540             min(ering->tx_pending, (unsigned int)TX_MAX_RING_SIZE);
 541         lp->rx_ring_size =
 542             min(ering->rx_pending, (unsigned int)RX_MAX_RING_SIZE);
 543
 544         /* set the minimum ring size to 4, to allow the loopback test to work
 545          * unchanged.
 546          */
 547         for (i = 2; i <= PCNET32_LOG_MAX_TX_BUFFERS; i++) {
 548                 if (lp->tx_ring_size <= (1 << i))
 549                         break;
 550         }
 551         lp->tx_ring_size = (1 << i);
 552         lp->tx_mod_mask = lp->tx_ring_size - 1;
 553         lp->tx_len_bits = (i << 12);
 554
 555         for (i = 2; i <= PCNET32_LOG_MAX_RX_BUFFERS; i++) {
 556                 if (lp->rx_ring_size <= (1 << i))
 557                         break;
 558         }
 559         lp->rx_ring_size = (1 << i);
 560         lp->rx_mod_mask = lp->rx_ring_size - 1;
 561         lp->rx_len_bits = (i << 4);
 562
 563         if (pcnet32_alloc_ring(dev, dev->name)) {
 564                 pcnet32_free_ring(dev);
 565                 spin_unlock_irqrestore(&lp->lock, flags);
 566                 return -ENOMEM;
 567         }
 568
 569         spin_unlock_irqrestore(&lp->lock, flags);
 570
 571         if (pcnet32_debug & NETIF_MSG_DRV)
 572                 printk(KERN_INFO PFX
 573                        "%s: Ring Param Settings: RX: %d, TX: %d\n", dev->name,
 574                        lp->rx_ring_size, lp->tx_ring_size);
 575
 576         if (netif_running(dev))
 577                 pcnet32_open(dev);
 578
 579         return 0;
 580 }
 581
 582 static void pcnet32_get_strings(struct net_device *dev, u32 stringset,
 583                                 u8 * data)
 584 {
 585         memcpy(data, pcnet32_gstrings_test, sizeof(pcnet32_gstrings_test));
 586 }
 587
 588 static int pcnet32_self_test_count(struct net_device *dev)
 589 {
 590         return PCNET32_TEST_LEN;
 591 }
 592
 593 static void pcnet32_ethtool_test(struct net_device *dev,
 594                                  struct ethtool_test *test, u64 * data)
 595 {
 596         struct pcnet32_private *lp = dev->priv;
 597         int rc;
 598
 599         if (test->flags == ETH_TEST_FL_OFFLINE) {
 600                 rc = pcnet32_loopback_test(dev, data);
 601                 if (rc) {
 602                         if (netif_msg_hw(lp))
 603                                 printk(KERN_DEBUG "%s: Loopback test failed.\n",
 604                                        dev->name);
 605                         test->flags |= ETH_TEST_FL_FAILED;
 606                 } else if (netif_msg_hw(lp))
 607                         printk(KERN_DEBUG "%s: Loopback test passed.\n",
 608                                dev->name);
 609         } else if (netif_msg_hw(lp))
 610                 printk(KERN_DEBUG
 611                        "%s: No tests to run (specify 'Offline' on ethtool).",
 612                        dev->name);
 613 }                               /* end pcnet32_ethtool_test */
 614
 615 static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
 616 {
 617         struct pcnet32_private *lp = dev->priv;
 618         struct pcnet32_access *a = &lp->a;      /* access to registers */
 619         ulong ioaddr = dev->base_addr;  /* card base I/O address */
 620         struct sk_buff *skb;    /* sk buff */
 621         int x, i;               /* counters */
 622         int numbuffs = 4;       /* number of TX/RX buffers and descs */
 623         u16 status = 0x8300;    /* TX ring status */
 624         u16 teststatus;         /* test of ring status */
 625         int rc;                 /* return code */
 626         int size;               /* size of packets */
 627         unsigned char *packet;  /* source packet data */
 628         static const int data_len = 60; /* length of source packets */
 629         unsigned long flags;
 630         unsigned long ticks;
 631
 632         *data1 = 1;             /* status of test, default to fail */
 633         rc = 1;                 /* default to fail */
 634
 635         if (netif_running(dev))
 636                 pcnet32_close(dev);
 637
 638         spin_lock_irqsave(&lp->lock, flags);
 639
 640         /* Reset the PCNET32 */
 641         lp->a.reset(ioaddr);
 642
 643         /* switch pcnet32 to 32bit mode */
 644         lp->a.write_bcr(ioaddr, 20, 2);
 645
 646         lp->init_block.mode =
 647             le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
 648         lp->init_block.filter[0] = 0;
 649         lp->init_block.filter[1] = 0;
 650
 651         /* purge & init rings but don't actually restart */
 652         pcnet32_restart(dev, 0x0000);
 653
 654         lp->a.write_csr(ioaddr, 0, 0x0004);     /* Set STOP bit */
 655
 656         /* Initialize Transmit buffers. */
 657         size = data_len + 15;
 658         for (x = 0; x < numbuffs; x++) {
 659                 if (!(skb = dev_alloc_skb(size))) {
 660                         if (netif_msg_hw(lp))
 661                                 printk(KERN_DEBUG
 662                                        "%s: Cannot allocate skb at line: %d!\n",
 663                                        dev->name, __LINE__);
 664                         goto clean_up;
 665                 } else {
 666                         packet = skb->data;
 667                         skb_put(skb, size);     /* create space for data */
 668                         lp->tx_skbuff[x] = skb;
 669                         lp->tx_ring[x].length = le16_to_cpu(-skb->len);
 670                         lp->tx_ring[x].misc = 0;
 671
 672                         /* put DA and SA into the skb */
 673                         for (i = 0; i < 6; i++)
 674                                 *packet++ = dev->dev_addr[i];
 675                         for (i = 0; i < 6; i++)
 676                                 *packet++ = dev->dev_addr[i];
 677                         /* type */
 678                         *packet++ = 0x08;
 679                         *packet++ = 0x06;
 680                         /* packet number */
 681                         *packet++ = x;
 682                         /* fill packet with data */
 683                         for (i = 0; i < data_len; i++)
 684                                 *packet++ = i;
 685
 686                         lp->tx_dma_addr[x] =
 687                             pci_map_single(lp->pci_dev, skb->data, skb->len,
 688                                            PCI_DMA_TODEVICE);
 689                         lp->tx_ring[x].base =
 690                             (u32) le32_to_cpu(lp->tx_dma_addr[x]);
 691                         wmb();  /* Make sure owner changes after all others are visible */
 692                         lp->tx_ring[x].status = le16_to_cpu(status);
 693                 }
 694         }
 695
 696         x = a->read_bcr(ioaddr, 32);    /* set internal loopback in BSR32 */
 697         x = x | 0x0002;
 698         a->write_bcr(ioaddr, 32, x);
 699
 700         lp->a.write_csr(ioaddr, 15, 0x0044);    /* set int loopback in CSR15 */
 701
 702         teststatus = le16_to_cpu(0x8000);
 703         lp->a.write_csr(ioaddr, 0, 0x0002);     /* Set STRT bit */
 704
 705         /* Check status of descriptors */
 706         for (x = 0; x < numbuffs; x++) {
 707                 ticks = 0;
 708                 rmb();
 709                 while ((lp->rx_ring[x].status & teststatus) && (ticks < 200)) {
 710                         spin_unlock_irqrestore(&lp->lock, flags);
 711                         mdelay(1);
 712                         spin_lock_irqsave(&lp->lock, flags);
 713                         rmb();
 714                         ticks++;
 715                 }
 716                 if (ticks == 200) {
 717                         if (netif_msg_hw(lp))
 718                                 printk("%s: Desc %d failed to reset!\n",
 719                                        dev->name, x);
 720                         break;
 721                 }
 722         }
 723
 724         lp->a.write_csr(ioaddr, 0, 0x0004);     /* Set STOP bit */
 725         wmb();
 726         if (netif_msg_hw(lp) && netif_msg_pktdata(lp)) {
 727                 printk(KERN_DEBUG "%s: RX loopback packets:\n", dev->name);
 728
 729                 for (x = 0; x < numbuffs; x++) {
 730                         printk(KERN_DEBUG "%s: Packet %d:\n", dev->name, x);
 731                         skb = lp->rx_skbuff[x];
 732                         for (i = 0; i < size; i++) {
 733                                 printk("%02x ", *(skb->data + i));
 734                         }
 735                         printk("\n");
 736                 }
 737         }
 738
 739         x = 0;
 740         rc = 0;
 741         while (x < numbuffs && !rc) {
 742                 skb = lp->rx_skbuff[x];
 743                 packet = lp->tx_skbuff[x]->data;
 744                 for (i = 0; i < size; i++) {
 745                         if (*(skb->data + i) != packet[i]) {
 746                                 if (netif_msg_hw(lp))
 747                                         printk(KERN_DEBUG
 748                                                "%s: Error in compare! %2x - %02x %02x\n",
 749                                                dev->name, i, *(skb->data + i),
 750                                                packet[i]);
 751                                 rc = 1;
 752                                 break;
 753                         }
 754                 }
 755                 x++;
 756         }
 757         if (!rc) {
 758                 *data1 = 0;
 759         }
 760
 761       clean_up:
 762         pcnet32_purge_tx_ring(dev);
 763         x = a->read_csr(ioaddr, 15) & 0xFFFF;
 764         a->write_csr(ioaddr, 15, (x & ~0x0044));        /* reset bits 6 and 2 */
 765
 766         x = a->read_bcr(ioaddr, 32);    /* reset internal loopback */
 767         x = x & ~0x0002;
 768         a->write_bcr(ioaddr, 32, x);
 769
 770         spin_unlock_irqrestore(&lp->lock, flags);
 771
 772         if (netif_running(dev)) {
 773                 pcnet32_open(dev);
 774         } else {
 775                 lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */
 776         }
 777
 778         return (rc);
 779 }                               /* end pcnet32_loopback_test  */
 780
 781 static void pcnet32_led_blink_callback(struct net_device *dev)
 782 {
 783         struct pcnet32_private *lp = dev->priv;
 784         struct pcnet32_access *a = &lp->a;
 785         ulong ioaddr = dev->base_addr;
 786         unsigned long flags;
 787         int i;
 788
 789         spin_lock_irqsave(&lp->lock, flags);
 790         for (i = 4; i < 8; i++) {
 791                 a->write_bcr(ioaddr, i, a->read_bcr(ioaddr, i) ^ 0x4000);
 792         }
 793         spin_unlock_irqrestore(&lp->lock, flags);
 794
 795         mod_timer(&lp->blink_timer, PCNET32_BLINK_TIMEOUT);
 796 }
 797
 798 static int pcnet32_phys_id(struct net_device *dev, u32 data)
 799 {
 800         struct pcnet32_private *lp = dev->priv;
 801         struct pcnet32_access *a = &lp->a;
 802         ulong ioaddr = dev->base_addr;
 803         unsigned long flags;
 804         int i, regs[4];
 805
 806         if (!lp->blink_timer.function) {
 807                 init_timer(&lp->blink_timer);
 808                 lp->blink_timer.function = (void *)pcnet32_led_blink_callback;
 809                 lp->blink_timer.data = (unsigned long)dev;
 810         }
 811
 812         /* Save the current value of the bcrs */
 813         spin_lock_irqsave(&lp->lock, flags);
 814         for (i = 4; i < 8; i++) {
 815                 regs[i - 4] = a->read_bcr(ioaddr, i);
 816         }
 817         spin_unlock_irqrestore(&lp->lock, flags);
 818
 819         mod_timer(&lp->blink_timer, jiffies);
 820         set_current_state(TASK_INTERRUPTIBLE);
 821
 822         if ((!data) || (data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ)))
 823                 data = (u32) (MAX_SCHEDULE_TIMEOUT / HZ);
 824
 825         msleep_interruptible(data * 1000);
 826         del_timer_sync(&lp->blink_timer);
 827
 828         /* Restore the original value of the bcrs */
 829         spin_lock_irqsave(&lp->lock, flags);
 830         for (i = 4; i < 8; i++) {
 831                 a->write_bcr(ioaddr, i, regs[i - 4]);
 832         }
 833         spin_unlock_irqrestore(&lp->lock, flags);
 834
 835         return 0;
 836 }
 837
 838 #define PCNET32_REGS_PER_PHY    32
 839 #define PCNET32_MAX_PHYS        32
 840 static int pcnet32_get_regs_len(struct net_device *dev)
 841 {
 842         struct pcnet32_private *lp = dev->priv;
 843         int j = lp->phycount * PCNET32_REGS_PER_PHY;
 844
 845         return ((PCNET32_NUM_REGS + j) * sizeof(u16));
 846 }
 847
 848 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
 849                              void *ptr)
 850 {
 851         int i, csr0;
 852         u16 *buff = ptr;
 853         struct pcnet32_private *lp = dev->priv;
 854         struct pcnet32_access *a = &lp->a;
 855         ulong ioaddr = dev->base_addr;
 856         int ticks;
 857         unsigned long flags;
 858
 859         spin_lock_irqsave(&lp->lock, flags);
 860
 861         csr0 = a->read_csr(ioaddr, 0);
 862         if (!(csr0 & 0x0004)) { /* If not stopped */
 863                 /* set SUSPEND (SPND) - CSR5 bit 0 */
 864                 a->write_csr(ioaddr, 5, 0x0001);
 865
 866                 /* poll waiting for bit to be set */
 867                 ticks = 0;
 868                 while (!(a->read_csr(ioaddr, 5) & 0x0001)) {
 869                         spin_unlock_irqrestore(&lp->lock, flags);
 870                         mdelay(1);
 871                         spin_lock_irqsave(&lp->lock, flags);
 872                         ticks++;
 873                         if (ticks > 200) {
 874                                 if (netif_msg_hw(lp))
 875                                         printk(KERN_DEBUG
 876                                                "%s: Error getting into suspend!\n",
 877                                                dev->name);
 878                                 break;
 879                         }
 880                 }
 881         }
 882
 883         /* read address PROM */
 884         for (i = 0; i < 16; i += 2)
 885                 *buff++ = inw(ioaddr + i);
 886
 887         /* read control and status registers */
 888         for (i = 0; i < 90; i++) {
 889                 *buff++ = a->read_csr(ioaddr, i);
 890         }
 891
 892         *buff++ = a->read_csr(ioaddr, 112);
 893         *buff++ = a->read_csr(ioaddr, 114);
 894
 895         /* read bus configuration registers */
 896         for (i = 0; i < 30; i++) {
 897                 *buff++ = a->read_bcr(ioaddr, i);
 898         }
 899         *buff++ = 0;            /* skip bcr30 so as not to hang 79C976 */
 900         for (i = 31; i < 36; i++) {
 901                 *buff++ = a->read_bcr(ioaddr, i);
 902         }
 903
 904         /* read mii phy registers */
 905         if (lp->mii) {
 906                 int j;
 907                 for (j = 0; j < PCNET32_MAX_PHYS; j++) {
 908                         if (lp->phymask & (1 << j)) {
 909                                 for (i = 0; i < PCNET32_REGS_PER_PHY; i++) {
 910                                         lp->a.write_bcr(ioaddr, 33,
 911                                                         (j << 5) | i);
 912                                         *buff++ = lp->a.read_bcr(ioaddr, 34);
 913                                 }
 914                         }
 915                 }
 916         }
 917
 918         if (!(csr0 & 0x0004)) { /* If not stopped */
 919                 /* clear SUSPEND (SPND) - CSR5 bit 0 */
 920                 a->write_csr(ioaddr, 5, 0x0000);
 921         }
 922
 923         spin_unlock_irqrestore(&lp->lock, flags);
 924 }
 925
 926 static struct ethtool_ops pcnet32_ethtool_ops = {
 927         .get_settings           = pcnet32_get_settings,
 928         .set_settings           = pcnet32_set_settings,
 929         .get_drvinfo            = pcnet32_get_drvinfo,
 930         .get_msglevel           = pcnet32_get_msglevel,
 931         .set_msglevel           = pcnet32_set_msglevel,
 932         .nway_reset             = pcnet32_nway_reset,
 933         .get_link               = pcnet32_get_link,
 934         .get_ringparam          = pcnet32_get_ringparam,
 935         .set_ringparam          = pcnet32_set_ringparam,
 936         .get_tx_csum            = ethtool_op_get_tx_csum,
 937         .get_sg                 = ethtool_op_get_sg,
 938         .get_tso                = ethtool_op_get_tso,
 939         .get_strings            = pcnet32_get_strings,
 940         .self_test_count        = pcnet32_self_test_count,
 941         .self_test              = pcnet32_ethtool_test,
 942         .phys_id                = pcnet32_phys_id,
 943         .get_regs_len           = pcnet32_get_regs_len,
 944         .get_regs               = pcnet32_get_regs,
 945         .get_perm_addr          = ethtool_op_get_perm_addr,
 946 };
 947
 948 /* only probes for non-PCI devices, the rest are handled by
 949  * pci_register_driver via pcnet32_probe_pci */
 950
 951 static void __devinit pcnet32_probe_vlbus(unsigned int *pcnet32_portlist)
 952 {
 953         unsigned int *port, ioaddr;
 954
 955         /* search for PCnet32 VLB cards at known addresses */
 956         for (port = pcnet32_portlist; (ioaddr = *port); port++) {
 957                 if (request_region
 958                     (ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) {
 959                         /* check if there is really a pcnet chip on that ioaddr */
 960                         if ((inb(ioaddr + 14) == 0x57)
 961                             && (inb(ioaddr + 15) == 0x57)) {
 962                                 pcnet32_probe1(ioaddr, 0, NULL);
 963                         } else {
 964                                 release_region(ioaddr, PCNET32_TOTAL_SIZE);
 965                         }
 966                 }
 967         }
 968 }
 969
 970 static int __devinit
 971 pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent)
 972 {
 973         unsigned long ioaddr;
 974         int err;
 975
 976         err = pci_enable_device(pdev);
 977         if (err < 0) {
 978                 if (pcnet32_debug & NETIF_MSG_PROBE)
 979                         printk(KERN_ERR PFX
 980                                "failed to enable device -- err=%d\n", err);
 981                 return err;
 982         }
 983         pci_set_master(pdev);
 984
 985         ioaddr = pci_resource_start(pdev, 0);
 986         if (!ioaddr) {
 987                 if (pcnet32_debug & NETIF_MSG_PROBE)
 988                         printk(KERN_ERR PFX
 989                                "card has no PCI IO resources, aborting\n");
 990                 return -ENODEV;
 991         }
 992
 993         if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) {
 994                 if (pcnet32_debug & NETIF_MSG_PROBE)
 995                         printk(KERN_ERR PFX
 996                                "architecture does not support 32bit PCI busmaster DMA\n");
 997                 return -ENODEV;
 998         }
 999         if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_pci") ==
1000             NULL) {
1001                 if (pcnet32_debug & NETIF_MSG_PROBE)
1002                         printk(KERN_ERR PFX
1003                                "io address range already allocated\n");
1004                 return -EBUSY;
1005         }
1006
1007         err = pcnet32_probe1(ioaddr, 1, pdev);
1008         if (err < 0) {
1009                 pci_disable_device(pdev);
1010         }
1011         return err;
1012 }
1013
1014 /* pcnet32_probe1
1015  *  Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
1016  *  pdev will be NULL when called from pcnet32_probe_vlbus.
1017  */
1018 static int __devinit
1019 pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1020 {
1021         struct pcnet32_private *lp;
1022         dma_addr_t lp_dma_addr;
1023         int i, media;
1024         int fdx, mii, fset, dxsuflo;
1025         int chip_version;
1026         char *chipname;
1027         struct net_device *dev;
1028         struct pcnet32_access *a = NULL;
1029         u8 promaddr[6];
1030         int ret = -ENODEV;
1031
1032         /* reset the chip */
1033         pcnet32_wio_reset(ioaddr);
1034
1035         /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */
1036         if (pcnet32_wio_read_csr(ioaddr, 0) == 4 && pcnet32_wio_check(ioaddr)) {
1037                 a = &pcnet32_wio;
1038         } else {
1039                 pcnet32_dwio_reset(ioaddr);
1040                 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4
1041                     && pcnet32_dwio_check(ioaddr)) {
1042                         a = &pcnet32_dwio;
1043                 } else
1044                         goto err_release_region;
1045         }
1046
1047         chip_version =
1048             a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr, 89) << 16);
1049         if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW))
1050                 printk(KERN_INFO "  PCnet chip version is %#x.\n",
1051                        chip_version);
1052         if ((chip_version & 0xfff) != 0x003) {
1053                 if (pcnet32_debug & NETIF_MSG_PROBE)
1054                         printk(KERN_INFO PFX "Unsupported chip version.\n");
1055                 goto err_release_region;
1056         }
1057
1058         /* initialize variables */
1059         fdx = mii = fset = dxsuflo = 0;
1060         chip_version = (chip_version >> 12) & 0xffff;
1061
1062         switch (chip_version) {
1063         case 0x2420:
1064                 chipname = "PCnet/PCI 79C970";  /* PCI */
1065                 break;
1066         case 0x2430:
1067                 if (shared)
1068                         chipname = "PCnet/PCI 79C970";  /* 970 gives the wrong chip id back */
1069                 else
1070                         chipname = "PCnet/32 79C965";   /* 486/VL bus */
1071                 break;
1072         case 0x2621:
1073                 chipname = "PCnet/PCI II 79C970A";      /* PCI */
1074                 fdx = 1;
1075                 break;
1076         case 0x2623:
1077                 chipname = "PCnet/FAST 79C971"; /* PCI */
1078                 fdx = 1;
1079                 mii = 1;
1080                 fset = 1;
1081                 break;
1082         case 0x2624:
1083                 chipname = "PCnet/FAST+ 79C972";        /* PCI */
1084                 fdx = 1;
1085                 mii = 1;
1086                 fset = 1;
1087                 break;
1088         case 0x2625:
1089                 chipname = "PCnet/FAST III 79C973";     /* PCI */
1090                 fdx = 1;
1091                 mii = 1;
1092                 break;
1093         case 0x2626:
1094                 chipname = "PCnet/Home 79C978"; /* PCI */
1095                 fdx = 1;
1096                 /*
1097                  * This is based on specs published at www.amd.com.  This section
1098                  * assumes that a card with a 79C978 wants to go into standard
1099                  * ethernet mode.  The 79C978 can also go into 1Mb HomePNA mode,
1100                  * and the module option homepna=1 can select this instead.
1101                  */
1102                 media = a->read_bcr(ioaddr, 49);
1103                 media &= ~3;    /* default to 10Mb ethernet */
1104                 if (cards_found < MAX_UNITS && homepna[cards_found])
1105                         media |= 1;     /* switch to home wiring mode */
1106                 if (pcnet32_debug & NETIF_MSG_PROBE)
1107                         printk(KERN_DEBUG PFX "media set to %sMbit mode.\n",
1108                                (media & 1) ? "1" : "10");
1109                 a->write_bcr(ioaddr, 49, media);
1110                 break;
1111         case 0x2627:
1112                 chipname = "PCnet/FAST III 79C975";     /* PCI */
1113                 fdx = 1;
1114                 mii = 1;
1115                 break;
1116         case 0x2628:
1117                 chipname = "PCnet/PRO 79C976";
1118                 fdx = 1;
1119                 mii = 1;
1120                 break;
1121         default:
1122                 if (pcnet32_debug & NETIF_MSG_PROBE)
1123                         printk(KERN_INFO PFX
1124                                "PCnet version %#x, no PCnet32 chip.\n",
1125                                chip_version);
1126                 goto err_release_region;
1127         }
1128
1129         /*
1130          *  On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
1131          *  starting until the packet is loaded. Strike one for reliability, lose
1132          *  one for latency - although on PCI this isnt a big loss. Older chips
1133          *  have FIFO's smaller than a packet, so you can't do this.
1134          *  Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
1135          */
1136
1137         if (fset) {
1138                 a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860));
1139                 a->write_csr(ioaddr, 80,
1140                              (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
1141                 dxsuflo = 1;
1142         }
1143
1144         dev = alloc_etherdev(0);
1145         if (!dev) {
1146                 if (pcnet32_debug & NETIF_MSG_PROBE)
1147                         printk(KERN_ERR PFX "Memory allocation failed.\n");
1148                 ret = -ENOMEM;
1149                 goto err_release_region;
1150         }
1151         SET_NETDEV_DEV(dev, &pdev->dev);
1152
1153         if (pcnet32_debug & NETIF_MSG_PROBE)
1154                 printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);
1155
1156         /* In most chips, after a chip reset, the ethernet address is read from the
1157          * station address PROM at the base address and programmed into the
1158          * "Physical Address Registers" CSR12-14.
1159          * As a precautionary measure, we read the PROM values and complain if
1160          * they disagree with the CSRs.  If they miscompare, and the PROM addr
1161          * is valid, then the PROM addr is used.
1162          */
1163         for (i = 0; i < 3; i++) {
1164                 unsigned int val;
1165                 val = a->read_csr(ioaddr, i + 12) & 0x0ffff;
1166                 /* There may be endianness issues here. */
1167                 dev->dev_addr[2 * i] = val & 0x0ff;
1168                 dev->dev_addr[2 * i + 1] = (val >> 8) & 0x0ff;
1169         }
1170
1171         /* read PROM address and compare with CSR address */
1172         for (i = 0; i < 6; i++)
1173                 promaddr[i] = inb(ioaddr + i);
1174
1175         if (memcmp(promaddr, dev->dev_addr, 6)
1176             || !is_valid_ether_addr(dev->dev_addr)) {
1177                 if (is_valid_ether_addr(promaddr)) {
1178                         if (pcnet32_debug & NETIF_MSG_PROBE) {
1179                                 printk(" warning: CSR address invalid,\n");
1180                                 printk(KERN_INFO
1181                                        "    using instead PROM address of");
1182                         }
1183                         memcpy(dev->dev_addr, promaddr, 6);
1184                 }
1185         }
1186         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1187
1188         /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
1189         if (!is_valid_ether_addr(dev->perm_addr))
1190                 memset(dev->dev_addr, 0, sizeof(dev->dev_addr));
1191
1192         if (pcnet32_debug & NETIF_MSG_PROBE) {
1193                 for (i = 0; i < 6; i++)
1194                         printk(" %2.2x", dev->dev_addr[i]);
1195
1196                 /* Version 0x2623 and 0x2624 */
1197                 if (((chip_version + 1) & 0xfffe) == 0x2624) {
1198                         i = a->read_csr(ioaddr, 80) & 0x0C00;   /* Check tx_start_pt */
1199                         printk("\n" KERN_INFO "    tx_start_pt(0x%04x):", i);
1200                         switch (i >> 10) {
1201                         case 0:
1202                                 printk("  20 bytes,");
1203                                 break;
1204                         case 1:
1205                                 printk("  64 bytes,");
1206                                 break;
1207                         case 2:
1208                                 printk(" 128 bytes,");
1209                                 break;
1210                         case 3:
1211                                 printk("~220 bytes,");
1212                                 break;
1213                         }
1214                         i = a->read_bcr(ioaddr, 18);    /* Check Burst/Bus control */
1215                         printk(" BCR18(%x):", i & 0xffff);
1216                         if (i & (1 << 5))
1217                                 printk("BurstWrEn ");
1218                         if (i & (1 << 6))
1219                                 printk("BurstRdEn ");
1220                         if (i & (1 << 7))
1221                                 printk("DWordIO ");
1222                         if (i & (1 << 11))
1223                                 printk("NoUFlow ");
1224                         i = a->read_bcr(ioaddr, 25);
1225                         printk("\n" KERN_INFO "    SRAMSIZE=0x%04x,", i << 8);
1226                         i = a->read_bcr(ioaddr, 26);
1227                         printk(" SRAM_BND=0x%04x,", i << 8);
1228                         i = a->read_bcr(ioaddr, 27);
1229                         if (i & (1 << 14))
1230                                 printk("LowLatRx");
1231                 }
1232         }
1233
1234         dev->base_addr = ioaddr;
1235         /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
1236         if ((lp =
1237              pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
1238                 if (pcnet32_debug & NETIF_MSG_PROBE)
1239                         printk(KERN_ERR PFX
1240                                "Consistent memory allocation failed.\n");
1241                 ret = -ENOMEM;
1242                 goto err_free_netdev;
1243         }
1244
1245         memset(lp, 0, sizeof(*lp));
1246         lp->dma_addr = lp_dma_addr;
1247         lp->pci_dev = pdev;
1248
1249         spin_lock_init(&lp->lock);
1250
1251         SET_MODULE_OWNER(dev);
1252         SET_NETDEV_DEV(dev, &pdev->dev);
1253         dev->priv = lp;
1254         lp->name = chipname;
1255         lp->shared_irq = shared;
1256         lp->tx_ring_size = TX_RING_SIZE;        /* default tx ring size */
1257         lp->rx_ring_size = RX_RING_SIZE;        /* default rx ring size */
1258         lp->tx_mod_mask = lp->tx_ring_size - 1;
1259         lp->rx_mod_mask = lp->rx_ring_size - 1;
1260         lp->tx_len_bits = (PCNET32_LOG_TX_BUFFERS << 12);
1261         lp->rx_len_bits = (PCNET32_LOG_RX_BUFFERS << 4);
1262         lp->mii_if.full_duplex = fdx;
1263         lp->mii_if.phy_id_mask = 0x1f;
1264         lp->mii_if.reg_num_mask = 0x1f;
1265         lp->dxsuflo = dxsuflo;
1266         lp->mii = mii;
1267         lp->msg_enable = pcnet32_debug;
1268         if ((cards_found >= MAX_UNITS)
1269             || (options[cards_found] > sizeof(options_mapping)))
1270                 lp->options = PCNET32_PORT_ASEL;
1271         else
1272                 lp->options = options_mapping[options[cards_found]];
1273         lp->mii_if.dev = dev;
1274         lp->mii_if.mdio_read = mdio_read;
1275         lp->mii_if.mdio_write = mdio_write;
1276
1277         if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
1278             ((cards_found >= MAX_UNITS) || full_duplex[cards_found]))
1279                 lp->options |= PCNET32_PORT_FD;
1280
1281         if (!a) {
1282                 if (pcnet32_debug & NETIF_MSG_PROBE)
1283                         printk(KERN_ERR PFX "No access methods\n");
1284                 ret = -ENODEV;
1285                 goto err_free_consistent;
1286         }
1287         lp->a = *a;
1288
1289         /* prior to register_netdev, dev->name is not yet correct */
1290         if (pcnet32_alloc_ring(dev, pci_name(lp->pci_dev))) {
1291                 ret = -ENOMEM;
1292                 goto err_free_ring;
1293         }
1294         /* detect special T1/E1 WAN card by checking for MAC address */
1295         if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0
1296             && dev->dev_addr[2] == 0x75)
1297                 lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
1298
1299         lp->init_block.mode = le16_to_cpu(0x0003);      /* Disable Rx and Tx. */
1300         lp->init_block.tlen_rlen =
1301             le16_to_cpu(lp->tx_len_bits | lp->rx_len_bits);
1302         for (i = 0; i < 6; i++)
1303                 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1304         lp->init_block.filter[0] = 0x00000000;
1305         lp->init_block.filter[1] = 0x00000000;
1306         lp->init_block.rx_ring = (u32) le32_to_cpu(lp->rx_ring_dma_addr);
1307         lp->init_block.tx_ring = (u32) le32_to_cpu(lp->tx_ring_dma_addr);
1308
1309         /* switch pcnet32 to 32bit mode */
1310         a->write_bcr(ioaddr, 20, 2);
1311
1312         a->write_csr(ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private,
1313                                                          init_block)) & 0xffff);
1314         a->write_csr(ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private,
1315                                                          init_block)) >> 16);
1316
1317         if (pdev) {             /* use the IRQ provided by PCI */
1318                 dev->irq = pdev->irq;
1319                 if (pcnet32_debug & NETIF_MSG_PROBE)
1320                         printk(" assigned IRQ %d.\n", dev->irq);
1321         } else {
1322                 unsigned long irq_mask = probe_irq_on();
1323
1324                 /*
1325                  * To auto-IRQ we enable the initialization-done and DMA error
1326                  * interrupts. For ISA boards we get a DMA error, but VLB and PCI
1327                  * boards will work.
1328                  */
1329                 /* Trigger an initialization just for the interrupt. */
1330                 a->write_csr(ioaddr, 0, 0x41);
1331                 mdelay(1);
1332
1333                 dev->irq = probe_irq_off(irq_mask);
1334                 if (!dev->irq) {
1335                         if (pcnet32_debug & NETIF_MSG_PROBE)
1336                                 printk(", failed to detect IRQ line.\n");
1337                         ret = -ENODEV;
1338                         goto err_free_ring;
1339                 }
1340                 if (pcnet32_debug & NETIF_MSG_PROBE)
1341                         printk(", probed IRQ %d.\n", dev->irq);
1342         }
1343
1344         /* Set the mii phy_id so that we can query the link state */
1345         if (lp->mii) {
1346                 /* lp->phycount and lp->phymask are set to 0 by memset above */
1347
1348                 lp->mii_if.phy_id = ((lp->a.read_bcr(ioaddr, 33)) >> 5) & 0x1f;
1349                 /* scan for PHYs */
1350                 for (i = 0; i < PCNET32_MAX_PHYS; i++) {
1351                         unsigned short id1, id2;
1352
1353                         id1 = mdio_read(dev, i, MII_PHYSID1);
1354                         if (id1 == 0xffff)
1355                                 continue;
1356                         id2 = mdio_read(dev, i, MII_PHYSID2);
1357                         if (id2 == 0xffff)
1358                                 continue;
1359                         if (i == 31 && ((chip_version + 1) & 0xfffe) == 0x2624)
1360                                 continue;       /* 79C971 & 79C972 have phantom phy at id 31 */
1361                         lp->phycount++;
1362                         lp->phymask |= (1 << i);
1363                         lp->mii_if.phy_id = i;
1364                         if (pcnet32_debug & NETIF_MSG_PROBE)
1365                                 printk(KERN_INFO PFX
1366                                        "Found PHY %04x:%04x at address %d.\n",
1367                                        id1, id2, i);
1368                 }
1369                 lp->a.write_bcr(ioaddr, 33, (lp->mii_if.phy_id) << 5);
1370                 if (lp->phycount > 1) {
1371                         lp->options |= PCNET32_PORT_MII;
1372                 }
1373         }
1374
1375         init_timer(&lp->watchdog_timer);
1376         lp->watchdog_timer.data = (unsigned long)dev;
1377         lp->watchdog_timer.function = (void *)&pcnet32_watchdog;
1378
1379         /* The PCNET32-specific entries in the device structure. */
1380         dev->open = &pcnet32_open;
1381         dev->hard_start_xmit = &pcnet32_start_xmit;
1382         dev->stop = &pcnet32_close;
1383         dev->get_stats = &pcnet32_get_stats;
1384         dev->set_multicast_list = &pcnet32_set_multicast_list;
1385         dev->do_ioctl = &pcnet32_ioctl;
1386         dev->ethtool_ops = &pcnet32_ethtool_ops;
1387         dev->tx_timeout = pcnet32_tx_timeout;
1388         dev->watchdog_timeo = (5 * HZ);
1389
1390 #ifdef CONFIG_NET_POLL_CONTROLLER
1391         dev->poll_controller = pcnet32_poll_controller;
1392 #endif
1393
1394         /* Fill in the generic fields of the device structure. */
1395         if (register_netdev(dev))
1396                 goto err_free_ring;
1397
1398         if (pdev) {
1399                 pci_set_drvdata(pdev, dev);
1400         } else {
1401                 lp->next = pcnet32_dev;
1402                 pcnet32_dev = dev;
1403         }
1404
1405         if (pcnet32_debug & NETIF_MSG_PROBE)
1406                 printk(KERN_INFO "%s: registered as %s\n", dev->name, lp->name);
1407         cards_found++;
1408
1409         /* enable LED writes */
1410         a->write_bcr(ioaddr, 2, a->read_bcr(ioaddr, 2) | 0x1000);
1411
1412         return 0;
1413
1414       err_free_ring:
1415         pcnet32_free_ring(dev);
1416       err_free_consistent:
1417         pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
1418       err_free_netdev:
1419         free_netdev(dev);
1420       err_release_region:
1421         release_region(ioaddr, PCNET32_TOTAL_SIZE);
1422         return ret;
1423 }
1424
1425 /* if any allocation fails, caller must also call pcnet32_free_ring */
1426 static int pcnet32_alloc_ring(struct net_device *dev, char *name)
1427 {
1428         struct pcnet32_private *lp = dev->priv;
1429
1430         lp->tx_ring = pci_alloc_consistent(lp->pci_dev,
1431                                            sizeof(struct pcnet32_tx_head) *
1432                                            lp->tx_ring_size,
1433                                            &lp->tx_ring_dma_addr);
1434         if (lp->tx_ring == NULL) {
1435                 if (netif_msg_drv(lp))
1436                         printk("\n" KERN_ERR PFX
1437                                "%s: Consistent memory allocation failed.\n",
1438                                name);
1439                 return -ENOMEM;
1440         }
1441
1442         lp->rx_ring = pci_alloc_consistent(lp->pci_dev,
1443                                            sizeof(struct pcnet32_rx_head) *
1444                                            lp->rx_ring_size,
1445                                            &lp->rx_ring_dma_addr);
1446         if (lp->rx_ring == NULL) {
1447                 if (netif_msg_drv(lp))
1448                         printk("\n" KERN_ERR PFX
1449                                "%s: Consistent memory allocation failed.\n",
1450                                name);
1451                 return -ENOMEM;
1452         }
1453
1454         lp->tx_dma_addr = kcalloc(lp->tx_ring_size, sizeof(dma_addr_t),
1455                                   GFP_ATOMIC);
1456         if (!lp->tx_dma_addr) {
1457                 if (netif_msg_drv(lp))
1458                         printk("\n" KERN_ERR PFX
1459                                "%s: Memory allocation failed.\n", name);
1460                 return -ENOMEM;
1461         }
1462
1463         lp->rx_dma_addr = kcalloc(lp->rx_ring_size, sizeof(dma_addr_t),
1464                                   GFP_ATOMIC);
1465         if (!lp->rx_dma_addr) {
1466                 if (netif_msg_drv(lp))
1467                         printk("\n" KERN_ERR PFX
1468                                "%s: Memory allocation failed.\n", name);
1469                 return -ENOMEM;
1470         }
1471
1472         lp->tx_skbuff = kcalloc(lp->tx_ring_size, sizeof(struct sk_buff *),
1473                                 GFP_ATOMIC);
1474         if (!lp->tx_skbuff) {
1475                 if (netif_msg_drv(lp))
1476                         printk("\n" KERN_ERR PFX
1477                                "%s: Memory allocation failed.\n", name);
1478                 return -ENOMEM;
1479         }
1480
1481         lp->rx_skbuff = kcalloc(lp->rx_ring_size, sizeof(struct sk_buff *),
1482                                 GFP_ATOMIC);
1483         if (!lp->rx_skbuff) {
1484                 if (netif_msg_drv(lp))
1485                         printk("\n" KERN_ERR PFX
1486                                "%s: Memory allocation failed.\n", name);
1487                 return -ENOMEM;
1488         }
1489
1490         return 0;
1491 }
1492
1493 static void pcnet32_free_ring(struct net_device *dev)
1494 {
1495         struct pcnet32_private *lp = dev->priv;
1496
1497         kfree(lp->tx_skbuff);
1498         lp->tx_skbuff = NULL;
1499
1500         kfree(lp->rx_skbuff);
1501         lp->rx_skbuff = NULL;
1502
1503         kfree(lp->tx_dma_addr);
1504         lp->tx_dma_addr = NULL;
1505
1506         kfree(lp->rx_dma_addr);
1507         lp->rx_dma_addr = NULL;
1508
1509         if (lp->tx_ring) {
1510                 pci_free_consistent(lp->pci_dev,
1511                                     sizeof(struct pcnet32_tx_head) *
1512                                     lp->tx_ring_size, lp->tx_ring,
1513                                     lp->tx_ring_dma_addr);
1514                 lp->tx_ring = NULL;
1515         }
1516
1517         if (lp->rx_ring) {
1518                 pci_free_consistent(lp->pci_dev,
1519                                     sizeof(struct pcnet32_rx_head) *
1520                                     lp->rx_ring_size, lp->rx_ring,
1521                                     lp->rx_ring_dma_addr);
1522                 lp->rx_ring = NULL;
1523         }
1524 }
1525
1526 static int pcnet32_open(struct net_device *dev)
1527 {
1528         struct pcnet32_private *lp = dev->priv;
1529         unsigned long ioaddr = dev->base_addr;
1530         u16 val;
1531         int i;
1532         int rc;
1533         unsigned long flags;
1534
1535         if (request_irq(dev->irq, &pcnet32_interrupt,
1536                         lp->shared_irq ? IRQF_SHARED : 0, dev->name,
1537                         (void *)dev)) {
1538                 return -EAGAIN;
1539         }
1540
1541         spin_lock_irqsave(&lp->lock, flags);
1542         /* Check for a valid station address */
1543         if (!is_valid_ether_addr(dev->dev_addr)) {
1544                 rc = -EINVAL;
1545                 goto err_free_irq;
1546         }
1547
1548         /* Reset the PCNET32 */
1549         lp->a.reset(ioaddr);
1550
1551         /* switch pcnet32 to 32bit mode */
1552         lp->a.write_bcr(ioaddr, 20, 2);
1553
1554         if (netif_msg_ifup(lp))
1555                 printk(KERN_DEBUG
1556                        "%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
1557                        dev->name, dev->irq, (u32) (lp->tx_ring_dma_addr),
1558                        (u32) (lp->rx_ring_dma_addr),
1559                        (u32) (lp->dma_addr +
1560                               offsetof(struct pcnet32_private, init_block)));
1561
1562         /* set/reset autoselect bit */
1563         val = lp->a.read_bcr(ioaddr, 2) & ~2;
1564         if (lp->options & PCNET32_PORT_ASEL)
1565                 val |= 2;
1566         lp->a.write_bcr(ioaddr, 2, val);
1567
1568         /* handle full duplex setting */
1569         if (lp->mii_if.full_duplex) {
1570                 val = lp->a.read_bcr(ioaddr, 9) & ~3;
1571                 if (lp->options & PCNET32_PORT_FD) {
1572                         val |= 1;
1573                         if (lp->options == (PCNET32_PORT_FD | PCNET32_PORT_AUI))
1574                                 val |= 2;
1575                 } else if (lp->options & PCNET32_PORT_ASEL) {
1576                         /* workaround of xSeries250, turn on for 79C975 only */
1577                         i = ((lp->a.read_csr(ioaddr, 88) |
1578                               (lp->a.
1579                                read_csr(ioaddr, 89) << 16)) >> 12) & 0xffff;
1580                         if (i == 0x2627)
1581                                 val |= 3;
1582                 }
1583                 lp->a.write_bcr(ioaddr, 9, val);
1584         }
1585
1586         /* set/reset GPSI bit in test register */
1587         val = lp->a.read_csr(ioaddr, 124) & ~0x10;
1588         if ((lp->options & PCNET32_PORT_PORTSEL) == PCNET32_PORT_GPSI)
1589                 val |= 0x10;
1590         lp->a.write_csr(ioaddr, 124, val);
1591
1592         /* Allied Telesyn AT 2700/2701 FX are 100Mbit only and do not negotiate */
1593         if (lp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_AT &&
1594             (lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2700FX ||
1595              lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2701FX)) {
1596                 if (lp->options & PCNET32_PORT_ASEL) {
1597                         lp->options = PCNET32_PORT_FD | PCNET32_PORT_100;
1598                         if (netif_msg_link(lp))
1599                                 printk(KERN_DEBUG
1600                                        "%s: Setting 100Mb-Full Duplex.\n",
1601                                        dev->name);
1602                 }
1603         }
1604         if (lp->phycount < 2) {
1605                 /*
1606                  * 24 Jun 2004 according AMD, in order to change the PHY,
1607                  * DANAS (or DISPM for 79C976) must be set; then select the speed,
1608                  * duplex, and/or enable auto negotiation, and clear DANAS
1609                  */
1610                 if (lp->mii && !(lp->options & PCNET32_PORT_ASEL)) {
1611                         lp->a.write_bcr(ioaddr, 32,
1612                                         lp->a.read_bcr(ioaddr, 32) | 0x0080);
1613                         /* disable Auto Negotiation, set 10Mpbs, HD */
1614                         val = lp->a.read_bcr(ioaddr, 32) & ~0xb8;
1615                         if (lp->options & PCNET32_PORT_FD)
1616                                 val |= 0x10;
1617                         if (lp->options & PCNET32_PORT_100)
1618                                 val |= 0x08;
1619                         lp->a.write_bcr(ioaddr, 32, val);
1620                 } else {
1621                         if (lp->options & PCNET32_PORT_ASEL) {
1622                                 lp->a.write_bcr(ioaddr, 32,
1623                                                 lp->a.read_bcr(ioaddr,
1624                                                                32) | 0x0080);
1625                                 /* enable auto negotiate, setup, disable fd */
1626                                 val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
1627                                 val |= 0x20;
1628                                 lp->a.write_bcr(ioaddr, 32, val);
1629                         }
1630                 }
1631         } else {
1632                 int first_phy = -1;
1633                 u16 bmcr;
1634                 u32 bcr9;
1635                 struct ethtool_cmd ecmd;
1636
1637                 /*
1638                  * There is really no good other way to handle multiple PHYs
1639                  * other than turning off all automatics
1640                  */
1641                 val = lp->a.read_bcr(ioaddr, 2);
1642                 lp->a.write_bcr(ioaddr, 2, val & ~2);
1643                 val = lp->a.read_bcr(ioaddr, 32);
1644                 lp->a.write_bcr(ioaddr, 32, val & ~(1 << 7));   /* stop MII manager */
1645
1646                 if (!(lp->options & PCNET32_PORT_ASEL)) {
1647                         /* setup ecmd */
1648                         ecmd.port = PORT_MII;
1649                         ecmd.transceiver = XCVR_INTERNAL;
1650                         ecmd.autoneg = AUTONEG_DISABLE;
1651                         ecmd.speed =
1652                             lp->
1653                             options & PCNET32_PORT_100 ? SPEED_100 : SPEED_10;
1654                         bcr9 = lp->a.read_bcr(ioaddr, 9);
1655
1656                         if (lp->options & PCNET32_PORT_FD) {
1657                                 ecmd.duplex = DUPLEX_FULL;
1658                                 bcr9 |= (1 << 0);
1659                         } else {
1660                                 ecmd.duplex = DUPLEX_HALF;
1661                                 bcr9 |= ~(1 << 0);
1662                         }
1663                         lp->a.write_bcr(ioaddr, 9, bcr9);
1664                 }
1665
1666                 for (i = 0; i < PCNET32_MAX_PHYS; i++) {
1667                         if (lp->phymask & (1 << i)) {
1668                                 /* isolate all but the first PHY */
1669                                 bmcr = mdio_read(dev, i, MII_BMCR);
1670                                 if (first_phy == -1) {
1671                                         first_phy = i;
1672                                         mdio_write(dev, i, MII_BMCR,
1673                                                    bmcr & ~BMCR_ISOLATE);
1674                                 } else {
1675                                         mdio_write(dev, i, MII_BMCR,
1676                                                    bmcr | BMCR_ISOLATE);
1677                                 }
1678                                 /* use mii_ethtool_sset to setup PHY */
1679                                 lp->mii_if.phy_id = i;
1680                                 ecmd.phy_address = i;
1681                                 if (lp->options & PCNET32_PORT_ASEL) {
1682                                         mii_ethtool_gset(&lp->mii_if, &ecmd);
1683                                         ecmd.autoneg = AUTONEG_ENABLE;
1684                                 }
1685                                 mii_ethtool_sset(&lp->mii_if, &ecmd);
1686                         }
1687                 }
1688                 lp->mii_if.phy_id = first_phy;
1689                 if (netif_msg_link(lp))
1690                         printk(KERN_INFO "%s: Using PHY number %d.\n",
1691                                dev->name, first_phy);
1692         }
1693
1694 #ifdef DO_DXSUFLO
1695         if (lp->dxsuflo) {      /* Disable transmit stop on underflow */
1696                 val = lp->a.read_csr(ioaddr, 3);
1697                 val |= 0x40;
1698                 lp->a.write_csr(ioaddr, 3, val);
1699         }
1700 #endif
1701
1702         lp->init_block.mode =
1703             le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
1704         pcnet32_load_multicast(dev);
1705
1706         if (pcnet32_init_ring(dev)) {
1707                 rc = -ENOMEM;
1708                 goto err_free_ring;
1709         }
1710
1711         /* Re-initialize the PCNET32, and start it when done. */
1712         lp->a.write_csr(ioaddr, 1, (lp->dma_addr +
1713                                     offsetof(struct pcnet32_private,
1714                                              init_block)) & 0xffff);
1715         lp->a.write_csr(ioaddr, 2,
1716                         (lp->dma_addr +
1717                          offsetof(struct pcnet32_private, init_block)) >> 16);
1718
1719         lp->a.write_csr(ioaddr, 4, 0x0915);
1720         lp->a.write_csr(ioaddr, 0, 0x0001);
1721
1722         netif_start_queue(dev);
1723
1724         /* Print the link status and start the watchdog */
1725         pcnet32_check_media(dev, 1);
1726         mod_timer(&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
1727
1728         i = 0;
1729         while (i++ < 100)
1730                 if (lp->a.read_csr(ioaddr, 0) & 0x0100)
1731                         break;
1732         /*
1733          * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
1734          * reports that doing so triggers a bug in the '974.
1735          */
1736         lp->a.write_csr(ioaddr, 0, 0x0042);
1737
1738         if (netif_msg_ifup(lp))
1739                 printk(KERN_DEBUG
1740                        "%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n",
1741                        dev->name, i,
1742                        (u32) (lp->dma_addr +
1743                               offsetof(struct pcnet32_private, init_block)),
1744                        lp->a.read_csr(ioaddr, 0));
1745
1746         spin_unlock_irqrestore(&lp->lock, flags);
1747
1748         return 0;               /* Always succeed */
1749
1750       err_free_ring:
1751         /* free any allocated skbuffs */
1752         for (i = 0; i < lp->rx_ring_size; i++) {
1753                 lp->rx_ring[i].status = 0;
1754                 if (lp->rx_skbuff[i]) {
1755                         pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i],
1756                                          PKT_BUF_SZ - 2, PCI_DMA_FROMDEVICE);
1757                         dev_kfree_skb(lp->rx_skbuff[i]);
1758                 }
1759                 lp->rx_skbuff[i] = NULL;
1760                 lp->rx_dma_addr[i] = 0;
1761         }
1762
1763         /*
1764          * Switch back to 16bit mode to avoid problems with dumb
1765          * DOS packet driver after a warm reboot
1766          */
1767         lp->a.write_bcr(ioaddr, 20, 4);
1768
1769       err_free_irq:
1770         spin_unlock_irqrestore(&lp->lock, flags);
1771         free_irq(dev->irq, dev);
1772         return rc;
1773 }
1774
1775 /*
1776  * The LANCE has been halted for one reason or another (busmaster memory
1777  * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
1778  * etc.).  Modern LANCE variants always reload their ring-buffer
1779  * configuration when restarted, so we must reinitialize our ring
1780  * context before restarting.  As part of this reinitialization,
1781  * find all packets still on the Tx ring and pretend that they had been
1782  * sent (in effect, drop the packets on the floor) - the higher-level
1783  * protocols will time out and retransmit.  It'd be better to shuffle
1784  * these skbs to a temp list and then actually re-Tx them after
1785  * restarting the chip, but I'm too lazy to do so right now.  dplatt@3do.com
1786  */
1787
1788 static void pcnet32_purge_tx_ring(struct net_device *dev)
1789 {
1790         struct pcnet32_private *lp = dev->priv;
1791         int i;
1792
1793         for (i = 0; i < lp->tx_ring_size; i++) {
1794                 lp->tx_ring[i].status = 0;      /* CPU owns buffer */
1795                 wmb();          /* Make sure adapter sees owner change */
1796                 if (lp->tx_skbuff[i]) {
1797                         pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
1798                                          lp->tx_skbuff[i]->len,
1799                                          PCI_DMA_TODEVICE);
1800                         dev_kfree_skb_any(lp->tx_skbuff[i]);
1801                 }
1802                 lp->tx_skbuff[i] = NULL;
1803                 lp->tx_dma_addr[i] = 0;
1804         }
1805 }
1806
1807 /* Initialize the PCNET32 Rx and Tx rings. */
1808 static int pcnet32_init_ring(struct net_device *dev)
1809 {
1810         struct pcnet32_private *lp = dev->priv;
1811         int i;
1812
1813         lp->tx_full = 0;
1814         lp->cur_rx = lp->cur_tx = 0;
1815         lp->dirty_rx = lp->dirty_tx = 0;
1816
1817         for (i = 0; i < lp->rx_ring_size; i++) {
1818                 struct sk_buff *rx_skbuff = lp->rx_skbuff[i];
1819                 if (rx_skbuff == NULL) {
1820                         if (!
1821                             (rx_skbuff = lp->rx_skbuff[i] =
1822                              dev_alloc_skb(PKT_BUF_SZ))) {
1823                                 /* there is not much, we can do at this point */
1824                                 if (pcnet32_debug & NETIF_MSG_DRV)
1825                                         printk(KERN_ERR
1826                                                "%s: pcnet32_init_ring dev_alloc_skb failed.\n",
1827                                                dev->name);
1828                                 return -1;
1829                         }
1830                         skb_reserve(rx_skbuff, 2);
1831                 }
1832
1833                 rmb();
1834                 if (lp->rx_dma_addr[i] == 0)
1835                         lp->rx_dma_addr[i] =
1836                             pci_map_single(lp->pci_dev, rx_skbuff->data,
1837                                            PKT_BUF_SZ - 2, PCI_DMA_FROMDEVICE);
1838                 lp->rx_ring[i].base = (u32) le32_to_cpu(lp->rx_dma_addr[i]);
1839                 lp->rx_ring[i].buf_length = le16_to_cpu(2 - PKT_BUF_SZ);
1840                 wmb();          /* Make sure owner changes after all others are visible */
1841                 lp->rx_ring[i].status = le16_to_cpu(0x8000);
1842         }
1843         /* The Tx buffer address is filled in as needed, but we do need to clear
1844          * the upper ownership bit. */
1845         for (i = 0; i < lp->tx_ring_size; i++) {
1846                 lp->tx_ring[i].status = 0;      /* CPU owns buffer */
1847                 wmb();          /* Make sure adapter sees owner change */
1848                 lp->tx_ring[i].base = 0;
1849                 lp->tx_dma_addr[i] = 0;
1850         }
1851
1852         lp->init_block.tlen_rlen =
1853             le16_to_cpu(lp->tx_len_bits | lp->rx_len_bits);
1854         for (i = 0; i < 6; i++)
1855                 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1856         lp->init_block.rx_ring = (u32) le32_to_cpu(lp->rx_ring_dma_addr);
1857         lp->init_block.tx_ring = (u32) le32_to_cpu(lp->tx_ring_dma_addr);
1858         wmb();                  /* Make sure all changes are visible */
1859         return 0;
1860 }
1861
1862 /* the pcnet32 has been issued a stop or reset.  Wait for the stop bit
1863  * then flush the pending transmit operations, re-initialize the ring,
1864  * and tell the chip to initialize.
1865  */
1866 static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)
1867 {
1868         struct pcnet32_private *lp = dev->priv;
1869         unsigned long ioaddr = dev->base_addr;
1870         int i;
1871
1872         /* wait for stop */
1873         for (i = 0; i < 100; i++)
1874                 if (lp->a.read_csr(ioaddr, 0) & 0x0004)
1875                         break;
1876
1877         if (i >= 100 && netif_msg_drv(lp))
1878                 printk(KERN_ERR
1879                        "%s: pcnet32_restart timed out waiting for stop.\n",
1880                        dev->name);
1881
1882         pcnet32_purge_tx_ring(dev);
1883         if (pcnet32_init_ring(dev))
1884                 return;
1885
1886         /* ReInit Ring */
1887         lp->a.write_csr(ioaddr, 0, 1);
1888         i = 0;
1889         while (i++ < 1000)
1890                 if (lp->a.read_csr(ioaddr, 0) & 0x0100)
1891                         break;
1892
1893         lp->a.write_csr(ioaddr, 0, csr0_bits);
1894 }
1895
1896 static void pcnet32_tx_timeout(struct net_device *dev)
1897 {
1898         struct pcnet32_private *lp = dev->priv;
1899         unsigned long ioaddr = dev->base_addr, flags;
1900
1901         spin_lock_irqsave(&lp->lock, flags);
1902         /* Transmitter timeout, serious problems. */
1903         if (pcnet32_debug & NETIF_MSG_DRV)
1904                 printk(KERN_ERR
1905                        "%s: transmit timed out, status %4.4x, resetting.\n",
1906                        dev->name, lp->a.read_csr(ioaddr, 0));
1907         lp->a.write_csr(ioaddr, 0, 0x0004);
1908         lp->stats.tx_errors++;
1909         if (netif_msg_tx_err(lp)) {
1910                 int i;
1911                 printk(KERN_DEBUG
1912                        " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
1913                        lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
1914                        lp->cur_rx);
1915                 for (i = 0; i < lp->rx_ring_size; i++)
1916                         printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1917                                le32_to_cpu(lp->rx_ring[i].base),
1918                                (-le16_to_cpu(lp->rx_ring[i].buf_length)) &
1919                                0xffff, le32_to_cpu(lp->rx_ring[i].msg_length),
1920                                le16_to_cpu(lp->rx_ring[i].status));
1921                 for (i = 0; i < lp->tx_ring_size; i++)
1922                         printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1923                                le32_to_cpu(lp->tx_ring[i].base),
1924                                (-le16_to_cpu(lp->tx_ring[i].length)) & 0xffff,
1925                                le32_to_cpu(lp->tx_ring[i].misc),
1926                                le16_to_cpu(lp->tx_ring[i].status));
1927                 printk("\n");
1928         }
1929         pcnet32_restart(dev, 0x0042);
1930
1931         dev->trans_start = jiffies;
1932         netif_wake_queue(dev);
1933
1934         spin_unlock_irqrestore(&lp->lock, flags);
1935 }
1936
1937 static int pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev)
1938 {
1939         struct pcnet32_private *lp = dev->priv;
1940         unsigned long ioaddr = dev->base_addr;
1941         u16 status;
1942         int entry;
1943         unsigned long flags;
1944
1945         spin_lock_irqsave(&lp->lock, flags);
1946
1947         if (netif_msg_tx_queued(lp)) {
1948                 printk(KERN_DEBUG
1949                        "%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
1950                        dev->name, lp->a.read_csr(ioaddr, 0));
1951         }
1952
1953         /* Default status -- will not enable Successful-TxDone
1954          * interrupt when that option is available to us.
1955          */
1956         status = 0x8300;
1957
1958         /* Fill in a Tx ring entry */
1959
1960         /* Mask to ring buffer boundary. */
1961         entry = lp->cur_tx & lp->tx_mod_mask;
1962
1963         /* Caution: the write order is important here, set the status
1964          * with the "ownership" bits last. */
1965
1966         lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
1967
1968         lp->tx_ring[entry].misc = 0x00000000;
1969
1970         lp->tx_skbuff[entry] = skb;
1971         lp->tx_dma_addr[entry] =
1972             pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1973         lp->tx_ring[entry].base = (u32) le32_to_cpu(lp->tx_dma_addr[entry]);
1974         wmb();                  /* Make sure owner changes after all others are visible */
1975         lp->tx_ring[entry].status = le16_to_cpu(status);
1976
1977         lp->cur_tx++;
1978         lp->stats.tx_bytes += skb->len;
1979
1980         /* Trigger an immediate send poll. */
1981         lp->a.write_csr(ioaddr, 0, 0x0048);
1982
1983         dev->trans_start = jiffies;
1984
1985         if (lp->tx_ring[(entry + 1) & lp->tx_mod_mask].base != 0) {
1986                 lp->tx_full = 1;
1987                 netif_stop_queue(dev);
1988         }
1989         spin_unlock_irqrestore(&lp->lock, flags);
1990         return 0;
1991 }
1992
1993 /* The PCNET32 interrupt handler. */
1994 static irqreturn_t
1995 pcnet32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1996 {
1997         struct net_device *dev = dev_id;
1998         struct pcnet32_private *lp;
1999         unsigned long ioaddr;
2000         u16 csr0, rap;
2001         int boguscnt = max_interrupt_work;
2002         int must_restart;
2003
2004         if (!dev) {
2005                 if (pcnet32_debug & NETIF_MSG_INTR)
2006                         printk(KERN_DEBUG "%s(): irq %d for unknown device\n",
2007                                __FUNCTION__, irq);
2008                 return IRQ_NONE;
2009         }
2010
2011         ioaddr = dev->base_addr;
2012         lp = dev->priv;
2013
2014         spin_lock(&lp->lock);
2015
2016         rap = lp->a.read_rap(ioaddr);
2017         while ((csr0 = lp->a.read_csr(ioaddr, 0)) & 0x8f00 && --boguscnt >= 0) {
2018                 if (csr0 == 0xffff) {
2019                         break;  /* PCMCIA remove happened */
2020                 }
2021                 /* Acknowledge all of the current interrupt sources ASAP. */
2022                 lp->a.write_csr(ioaddr, 0, csr0 & ~0x004f);
2023
2024                 must_restart = 0;
2025
2026                 if (netif_msg_intr(lp))
2027                         printk(KERN_DEBUG
2028                                "%s: interrupt  csr0=%#2.2x new csr=%#2.2x.\n",
2029                                dev->name, csr0, lp->a.read_csr(ioaddr, 0));
2030
2031                 if (csr0 & 0x0400)      /* Rx interrupt */
2032                         pcnet32_rx(dev);
2033
2034                 if (csr0 & 0x0200) {    /* Tx-done interrupt */
2035                         unsigned int dirty_tx = lp->dirty_tx;
2036                         int delta;
2037
2038                         while (dirty_tx != lp->cur_tx) {
2039                                 int entry = dirty_tx & lp->tx_mod_mask;
2040                                 int status =
2041                                     (short)le16_to_cpu(lp->tx_ring[entry].
2042                                                        status);
2043
2044                                 if (status < 0)
2045                                         break;  /* It still hasn't been Txed */
2046
2047                                 lp->tx_ring[entry].base = 0;
2048
2049                                 if (status & 0x4000) {
2050                                         /* There was an major error, log it. */
2051                                         int err_status =
2052                                             le32_to_cpu(lp->tx_ring[entry].
2053                                                         misc);
2054                                         lp->stats.tx_errors++;
2055                                         if (netif_msg_tx_err(lp))
2056                                                 printk(KERN_ERR
2057                                                        "%s: Tx error status=%04x err_status=%08x\n",
2058                                                        dev->name, status,
2059                                                        err_status);
2060                                         if (err_status & 0x04000000)
2061                                                 lp->stats.tx_aborted_errors++;
2062                                         if (err_status & 0x08000000)
2063                                                 lp->stats.tx_carrier_errors++;
2064                                         if (err_status & 0x10000000)
2065                                                 lp->stats.tx_window_errors++;
2066 #ifndef DO_DXSUFLO
2067                                         if (err_status & 0x40000000) {
2068                                                 lp->stats.tx_fifo_errors++;
2069                                                 /* Ackk!  On FIFO errors the Tx unit is turned off! */
2070                                                 /* Remove this verbosity later! */
2071                                                 if (netif_msg_tx_err(lp))
2072                                                         printk(KERN_ERR
2073                                                                "%s: Tx FIFO error! CSR0=%4.4x\n",
2074                                                                dev->name, csr0);
2075                                                 must_restart = 1;
2076                                         }
2077 #else
2078                                         if (err_status & 0x40000000) {
2079                                                 lp->stats.tx_fifo_errors++;
2080                                                 if (!lp->dxsuflo) {     /* If controller doesn't recover ... */
2081                                                         /* Ackk!  On FIFO errors the Tx unit is turned off! */
2082                                                         /* Remove this verbosity later! */
2083                                                         if (netif_msg_tx_err
2084                                                             (lp))
2085                                                                 printk(KERN_ERR
2086                                                                        "%s: Tx FIFO error! CSR0=%4.4x\n",
2087                                                                        dev->
2088                                                                        name,
2089                                                                        csr0);
2090                                                         must_restart = 1;
2091                                                 }
2092                                         }
2093 #endif
2094                                 } else {
2095                                         if (status & 0x1800)
2096                                                 lp->stats.collisions++;
2097                                         lp->stats.tx_packets++;
2098                                 }
2099
2100                                 /* We must free the original skb */
2101                                 if (lp->tx_skbuff[entry]) {
2102                                         pci_unmap_single(lp->pci_dev,
2103                                                          lp->tx_dma_addr[entry],
2104                                                          lp->tx_skbuff[entry]->
2105                                                          len, PCI_DMA_TODEVICE);
2106                                         dev_kfree_skb_irq(lp->tx_skbuff[entry]);
2107                                         lp->tx_skbuff[entry] = NULL;
2108                                         lp->tx_dma_addr[entry] = 0;
2109                                 }
2110                                 dirty_tx++;
2111                         }
2112
2113                         delta =
2114                             (lp->cur_tx - dirty_tx) & (lp->tx_mod_mask +
2115                                                        lp->tx_ring_size);
2116                         if (delta > lp->tx_ring_size) {
2117                                 if (netif_msg_drv(lp))
2118                                         printk(KERN_ERR
2119                                                "%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
2120                                                dev->name, dirty_tx, lp->cur_tx,
2121                                                lp->tx_full);
2122                                 dirty_tx += lp->tx_ring_size;
2123                                 delta -= lp->tx_ring_size;
2124                         }
2125
2126                         if (lp->tx_full &&
2127                             netif_queue_stopped(dev) &&
2128                             delta < lp->tx_ring_size - 2) {
2129                                 /* The ring is no longer full, clear tbusy. */
2130                                 lp->tx_full = 0;
2131                                 netif_wake_queue(dev);
2132                         }
2133                         lp->dirty_tx = dirty_tx;
2134                 }
2135
2136                 /* Log misc errors. */
2137                 if (csr0 & 0x4000)
2138                         lp->stats.tx_errors++;  /* Tx babble. */
2139                 if (csr0 & 0x1000) {
2140                         /*
2141                          * this happens when our receive ring is full. This shouldn't
2142                          * be a problem as we will see normal rx interrupts for the frames
2143                          * in the receive ring. But there are some PCI chipsets (I can
2144                          * reproduce this on SP3G with Intel saturn chipset) which have
2145                          * sometimes problems and will fill up the receive ring with
2146                          * error descriptors. In this situation we don't get a rx
2147                          * interrupt, but a missed frame interrupt sooner or later.
2148                          * So we try to clean up our receive ring here.
2149                          */
2150                         pcnet32_rx(dev);
2151                         lp->stats.rx_errors++;  /* Missed a Rx frame. */
2152                 }
2153                 if (csr0 & 0x0800) {
2154                         if (netif_msg_drv(lp))
2155                                 printk(KERN_ERR
2156                                        "%s: Bus master arbitration failure, status %4.4x.\n",
2157                                        dev->name, csr0);
2158                         /* unlike for the lance, there is no restart needed */
2159                 }
2160
2161                 if (must_restart) {
2162                         /* reset the chip to clear the error condition, then restart */
2163                         lp->a.reset(ioaddr);
2164                         lp->a.write_csr(ioaddr, 4, 0x0915);
2165                         pcnet32_restart(dev, 0x0002);
2166                         netif_wake_queue(dev);
2167                 }
2168         }
2169
2170         /* Set interrupt enable. */
2171         lp->a.write_csr(ioaddr, 0, 0x0040);
2172         lp->a.write_rap(ioaddr, rap);
2173
2174         if (netif_msg_intr(lp))
2175                 printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
2176                        dev->name, lp->a.read_csr(ioaddr, 0));
2177
2178         spin_unlock(&lp->lock);
2179
2180         return IRQ_HANDLED;
2181 }
2182
2183 static int pcnet32_rx(struct net_device *dev)
2184 {
2185         struct pcnet32_private *lp = dev->priv;
2186         int entry = lp->cur_rx & lp->rx_mod_mask;
2187         int boguscnt = lp->rx_ring_size / 2;
2188
2189         /* If we own the next entry, it's a new packet. Send it up. */
2190         while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
2191                 int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
2192
2193                 if (status != 0x03) {   /* There was an error. */
2194                         /*
2195                          * There is a tricky error noted by John Murphy,
2196                          * <murf@perftech.com> to Russ Nelson: Even with full-sized
2197                          * buffers it's possible for a jabber packet to use two
2198                          * buffers, with only the last correctly noting the error.
2199                          */
2200                         if (status & 0x01)      /* Only count a general error at the */
2201                                 lp->stats.rx_errors++;  /* end of a packet. */
2202                         if (status & 0x20)
2203                                 lp->stats.rx_frame_errors++;
2204                         if (status & 0x10)
2205                                 lp->stats.rx_over_errors++;
2206                         if (status & 0x08)
2207                                 lp->stats.rx_crc_errors++;
2208                         if (status & 0x04)
2209                                 lp->stats.rx_fifo_errors++;
2210                         lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
2211                 } else {
2212                         /* Malloc up new buffer, compatible with net-2e. */
2213                         short pkt_len =
2214                             (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)
2215                             - 4;
2216                         struct sk_buff *skb;
2217
2218                         /* Discard oversize frames. */
2219                         if (unlikely(pkt_len > PKT_BUF_SZ - 2)) {
2220                                 if (netif_msg_drv(lp))
2221                                         printk(KERN_ERR
2222                                                "%s: Impossible packet size %d!\n",
2223                                                dev->name, pkt_len);
2224                                 lp->stats.rx_errors++;
2225                         } else if (pkt_len < 60) {
2226                                 if (netif_msg_rx_err(lp))
2227                                         printk(KERN_ERR "%s: Runt packet!\n",
2228                                                dev->name);
2229                                 lp->stats.rx_errors++;
2230                         } else {
2231                                 int rx_in_place = 0;
2232
2233                                 if (pkt_len > rx_copybreak) {
2234                                         struct sk_buff *newskb;
2235
2236                                         if ((newskb =
2237                                              dev_alloc_skb(PKT_BUF_SZ))) {
2238                                                 skb_reserve(newskb, 2);
2239                                                 skb = lp->rx_skbuff[entry];
2240                                                 pci_unmap_single(lp->pci_dev,
2241                                                                  lp->
2242                                                                  rx_dma_addr
2243                                                                  [entry],
2244                                                                  PKT_BUF_SZ - 2,
2245                                                                  PCI_DMA_FROMDEVICE);
2246                                                 skb_put(skb, pkt_len);
2247                                                 lp->rx_skbuff[entry] = newskb;
2248                                                 newskb->dev = dev;
2249                                                 lp->rx_dma_addr[entry] =
2250                                                     pci_map_single(lp->pci_dev,
2251                                                                    newskb->data,
2252                                                                    PKT_BUF_SZ -
2253                                                                    2,
2254                                                                    PCI_DMA_FROMDEVICE);
2255                                                 lp->rx_ring[entry].base =
2256                                                     le32_to_cpu(lp->
2257                                                                 rx_dma_addr
2258                                                                 [entry]);
2259                                                 rx_in_place = 1;
2260                                         } else
2261                                                 skb = NULL;
2262                                 } else {
2263                                         skb = dev_alloc_skb(pkt_len + 2);
2264                                 }
2265
2266                                 if (skb == NULL) {
2267                                         int i;
2268                                         if (netif_msg_drv(lp))
2269                                                 printk(KERN_ERR
2270                                                        "%s: Memory squeeze, deferring packet.\n",
2271                                                        dev->name);
2272                                         for (i = 0; i < lp->rx_ring_size; i++)
2273                                                 if ((short)
2274                                                     le16_to_cpu(lp->
2275                                                                 rx_ring[(entry +
2276                                                                          i)
2277                                                                         & lp->
2278                                                                         rx_mod_mask].
2279                                                                 status) < 0)
2280                                                         break;
2281
2282                                         if (i > lp->rx_ring_size - 2) {
2283                                                 lp->stats.rx_dropped++;
2284                                                 lp->rx_ring[entry].status |=
2285                                                     le16_to_cpu(0x8000);
2286                                                 wmb();  /* Make sure adapter sees owner change */
2287                                                 lp->cur_rx++;
2288                                         }
2289                                         break;
2290                                 }
2291                                 skb->dev = dev;
2292                                 if (!rx_in_place) {
2293                                         skb_reserve(skb, 2);    /* 16 byte align */
2294                                         skb_put(skb, pkt_len);  /* Make room */
2295                                         pci_dma_sync_single_for_cpu(lp->pci_dev,
2296                                                                     lp->
2297                                                                     rx_dma_addr
2298                                                                     [entry],
2299                                                                     PKT_BUF_SZ -
2300                                                                     2,
2301                                                                     PCI_DMA_FROMDEVICE);
2302                                         eth_copy_and_sum(skb,
2303                                                          (unsigned char *)(lp->
2304                                                                            rx_skbuff
2305                                                                            [entry]->
2306                                                                            data),
2307                                                          pkt_len, 0);
2308                                         pci_dma_sync_single_for_device(lp->
2309                                                                        pci_dev,
2310                                                                        lp->
2311                                                                        rx_dma_addr
2312                                                                        [entry],
2313                                                                        PKT_BUF_SZ
2314                                                                        - 2,
2315                                                                        PCI_DMA_FROMDEVICE);
2316                                 }
2317                                 lp->stats.rx_bytes += skb->len;
2318                                 skb->protocol = eth_type_trans(skb, dev);
2319                                 netif_rx(skb);
2320                                 dev->last_rx = jiffies;
2321                                 lp->stats.rx_packets++;
2322                         }
2323                 }
2324                 /*
2325                  * The docs say that the buffer length isn't touched, but Andrew Boyd
2326                  * of QNX reports that some revs of the 79C965 clear it.
2327                  */
2328                 lp->rx_ring[entry].buf_length = le16_to_cpu(2 - PKT_BUF_SZ);
2329                 wmb();          /* Make sure owner changes after all others are visible */
2330                 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
2331                 entry = (++lp->cur_rx) & lp->rx_mod_mask;
2332                 if (--boguscnt <= 0)
2333                         break;  /* don't stay in loop forever */
2334         }
2335
2336         return 0;
2337 }
2338
2339 static int pcnet32_close(struct net_device *dev)
2340 {
2341         unsigned long ioaddr = dev->base_addr;
2342         struct pcnet32_private *lp = dev->priv;
2343         int i;
2344         unsigned long flags;
2345
2346         del_timer_sync(&lp->watchdog_timer);
2347
2348         netif_stop_queue(dev);
2349
2350         spin_lock_irqsave(&lp->lock, flags);
2351
2352         lp->stats.rx_missed_errors = lp->a.read_csr(ioaddr, 112);
2353
2354         if (netif_msg_ifdown(lp))
2355                 printk(KERN_DEBUG
2356                        "%s: Shutting down ethercard, status was %2.2x.\n",
2357                        dev->name, lp->a.read_csr(ioaddr, 0));
2358
2359         /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
2360         lp->a.write_csr(ioaddr, 0, 0x0004);
2361
2362         /*
2363          * Switch back to 16bit mode to avoid problems with dumb
2364          * DOS packet driver after a warm reboot
2365          */
2366         lp->a.write_bcr(ioaddr, 20, 4);
2367
2368         spin_unlock_irqrestore(&lp->lock, flags);
2369
2370         free_irq(dev->irq, dev);
2371
2372         spin_lock_irqsave(&lp->lock, flags);
2373
2374         /* free all allocated skbuffs */
2375         for (i = 0; i < lp->rx_ring_size; i++) {
2376                 lp->rx_ring[i].status = 0;
2377                 wmb();          /* Make sure adapter sees owner change */
2378                 if (lp->rx_skbuff[i]) {
2379                         pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i],
2380                                          PKT_BUF_SZ - 2, PCI_DMA_FROMDEVICE);
2381                         dev_kfree_skb(lp->rx_skbuff[i]);
2382                 }
2383                 lp->rx_skbuff[i] = NULL;
2384                 lp->rx_dma_addr[i] = 0;
2385         }
2386
2387         for (i = 0; i < lp->tx_ring_size; i++) {
2388                 lp->tx_ring[i].status = 0;      /* CPU owns buffer */
2389                 wmb();          /* Make sure adapter sees owner change */
2390                 if (lp->tx_skbuff[i]) {
2391                         pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
2392                                          lp->tx_skbuff[i]->len,
2393                                          PCI_DMA_TODEVICE);
2394                         dev_kfree_skb(lp->tx_skbuff[i]);
2395                 }
2396                 lp->tx_skbuff[i] = NULL;
2397                 lp->tx_dma_addr[i] = 0;
2398         }
2399
2400         spin_unlock_irqrestore(&lp->lock, flags);
2401
2402         return 0;
2403 }
2404
2405 static struct net_device_stats *pcnet32_get_stats(struct net_device *dev)
2406 {
2407         struct pcnet32_private *lp = dev->priv;
2408         unsigned long ioaddr = dev->base_addr;
2409         u16 saved_addr;
2410         unsigned long flags;
2411
2412         spin_lock_irqsave(&lp->lock, flags);
2413         saved_addr = lp->a.read_rap(ioaddr);
2414         lp->stats.rx_missed_errors = lp->a.read_csr(ioaddr, 112);
2415         lp->a.write_rap(ioaddr, saved_addr);
2416         spin_unlock_irqrestore(&lp->lock, flags);
2417
2418         return &lp->stats;
2419 }
2420
2421 /* taken from the sunlance driver, which it took from the depca driver */
2422 static void pcnet32_load_multicast(struct net_device *dev)
2423 {
2424         struct pcnet32_private *lp = dev->priv;
2425         volatile struct pcnet32_init_block *ib = &lp->init_block;
2426         volatile u16 *mcast_table = (u16 *) & ib->filter;
2427         struct dev_mc_list *dmi = dev->mc_list;
2428         char *addrs;
2429         int i;
2430         u32 crc;
2431
2432         /* set all multicast bits */
2433         if (dev->flags & IFF_ALLMULTI) {
2434                 ib->filter[0] = 0xffffffff;
2435                 ib->filter[1] = 0xffffffff;
2436                 return;
2437         }
2438         /* clear the multicast filter */
2439         ib->filter[0] = 0;
2440         ib->filter[1] = 0;
2441
2442         /* Add addresses */
2443         for (i = 0; i < dev->mc_count; i++) {
2444                 addrs = dmi->dmi_addr;
2445                 dmi = dmi->next;
2446
2447                 /* multicast address? */
2448                 if (!(*addrs & 1))
2449                         continue;
2450
2451                 crc = ether_crc_le(6, addrs);
2452                 crc = crc >> 26;
2453                 mcast_table[crc >> 4] =
2454                     le16_to_cpu(le16_to_cpu(mcast_table[crc >> 4]) |
2455                                 (1 << (crc & 0xf)));
2456         }
2457         return;
2458 }
2459
2460 /*
2461  * Set or clear the multicast filter for this adaptor.
2462  */
2463 static void pcnet32_set_multicast_list(struct net_device *dev)
2464 {
2465         unsigned long ioaddr = dev->base_addr, flags;
2466         struct pcnet32_private *lp = dev->priv;
2467
2468         spin_lock_irqsave(&lp->lock, flags);
2469         if (dev->flags & IFF_PROMISC) {
2470                 /* Log any net taps. */
2471                 if (netif_msg_hw(lp))
2472                         printk(KERN_INFO "%s: Promiscuous mode enabled.\n",
2473                                dev->name);
2474                 lp->init_block.mode =
2475                     le16_to_cpu(0x8000 | (lp->options & PCNET32_PORT_PORTSEL) <<
2476                                 7);
2477         } else {
2478                 lp->init_block.mode =
2479                     le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
2480                 pcnet32_load_multicast(dev);
2481         }
2482
2483         lp->a.write_csr(ioaddr, 0, 0x0004);     /* Temporarily stop the lance. */
2484         pcnet32_restart(dev, 0x0042);   /*  Resume normal operation */
2485         netif_wake_queue(dev);
2486
2487         spin_unlock_irqrestore(&lp->lock, flags);
2488 }
2489
2490 /* This routine assumes that the lp->lock is held */
2491 static int mdio_read(struct net_device *dev, int phy_id, int reg_num)
2492 {
2493         struct pcnet32_private *lp = dev->priv;
2494         unsigned long ioaddr = dev->base_addr;
2495         u16 val_out;
2496
2497         if (!lp->mii)
2498                 return 0;
2499
2500         lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2501         val_out = lp->a.read_bcr(ioaddr, 34);
2502
2503         return val_out;
2504 }
2505
2506 /* This routine assumes that the lp->lock is held */
2507 static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val)
2508 {
2509         struct pcnet32_private *lp = dev->priv;
2510         unsigned long ioaddr = dev->base_addr;
2511
2512         if (!lp->mii)
2513                 return;
2514
2515         lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2516         lp->a.write_bcr(ioaddr, 34, val);
2517 }
2518
2519 static int pcnet32_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2520 {
2521         struct pcnet32_private *lp = dev->priv;
2522         int rc;
2523         unsigned long flags;
2524
2525         /* SIOC[GS]MIIxxx ioctls */
2526         if (lp->mii) {
2527                 spin_lock_irqsave(&lp->lock, flags);
2528                 rc = generic_mii_ioctl(&lp->mii_if, if_mii(rq), cmd, NULL);
2529                 spin_unlock_irqrestore(&lp->lock, flags);
2530         } else {
2531                 rc = -EOPNOTSUPP;
2532         }
2533
2534         return rc;
2535 }
2536
2537 static int pcnet32_check_otherphy(struct net_device *dev)
2538 {
2539         struct pcnet32_private *lp = dev->priv;
2540         struct mii_if_info mii = lp->mii_if;
2541         u16 bmcr;
2542         int i;
2543
2544         for (i = 0; i < PCNET32_MAX_PHYS; i++) {
2545                 if (i == lp->mii_if.phy_id)
2546                         continue;       /* skip active phy */
2547                 if (lp->phymask & (1 << i)) {
2548                         mii.phy_id = i;
2549                         if (mii_link_ok(&mii)) {
2550                                 /* found PHY with active link */
2551                                 if (netif_msg_link(lp))
2552                                         printk(KERN_INFO
2553                                                "%s: Using PHY number %d.\n",
2554                                                dev->name, i);
2555
2556                                 /* isolate inactive phy */
2557                                 bmcr =
2558                                     mdio_read(dev, lp->mii_if.phy_id, MII_BMCR);
2559                                 mdio_write(dev, lp->mii_if.phy_id, MII_BMCR,
2560                                            bmcr | BMCR_ISOLATE);
2561
2562                                 /* de-isolate new phy */
2563                                 bmcr = mdio_read(dev, i, MII_BMCR);
2564                                 mdio_write(dev, i, MII_BMCR,
2565                                            bmcr & ~BMCR_ISOLATE);
2566
2567                                 /* set new phy address */
2568                                 lp->mii_if.phy_id = i;
2569                                 return 1;
2570                         }
2571                 }
2572         }
2573         return 0;
2574 }
2575
2576 /*
2577  * Show the status of the media.  Similar to mii_check_media however it
2578  * correctly shows the link speed for all (tested) pcnet32 variants.
2579  * Devices with no mii just report link state without speed.
2580  *
2581  * Caller is assumed to hold and release the lp->lock.
2582  */
2583
2584 static void pcnet32_check_media(struct net_device *dev, int verbose)
2585 {
2586         struct pcnet32_private *lp = dev->priv;
2587         int curr_link;
2588         int prev_link = netif_carrier_ok(dev) ? 1 : 0;
2589         u32 bcr9;
2590
2591         if (lp->mii) {
2592                 curr_link = mii_link_ok(&lp->mii_if);
2593         } else {
2594                 ulong ioaddr = dev->base_addr;  /* card base I/O address */
2595                 curr_link = (lp->a.read_bcr(ioaddr, 4) != 0xc0);
2596         }
2597         if (!curr_link) {
2598                 if (prev_link || verbose) {
2599                         netif_carrier_off(dev);
2600                         if (netif_msg_link(lp))
2601                                 printk(KERN_INFO "%s: link down\n", dev->name);
2602                 }
2603                 if (lp->phycount > 1) {
2604                         curr_link = pcnet32_check_otherphy(dev);
2605                         prev_link = 0;
2606                 }
2607         } else if (verbose || !prev_link) {
2608                 netif_carrier_on(dev);
2609                 if (lp->mii) {
2610                         if (netif_msg_link(lp)) {
2611                                 struct ethtool_cmd ecmd;
2612                                 mii_ethtool_gset(&lp->mii_if, &ecmd);
2613                                 printk(KERN_INFO
2614                                        "%s: link up, %sMbps, %s-duplex\n",
2615                                        dev->name,
2616                                        (ecmd.speed == SPEED_100) ? "100" : "10",
2617                                        (ecmd.duplex ==
2618                                         DUPLEX_FULL) ? "full" : "half");
2619                         }
2620                         bcr9 = lp->a.read_bcr(dev->base_addr, 9);
2621                         if ((bcr9 & (1 << 0)) != lp->mii_if.full_duplex) {
2622                                 if (lp->mii_if.full_duplex)
2623                                         bcr9 |= (1 << 0);
2624                                 else
2625                                         bcr9 &= ~(1 << 0);
2626                                 lp->a.write_bcr(dev->base_addr, 9, bcr9);
2627                         }
2628                 } else {
2629                         if (netif_msg_link(lp))
2630                                 printk(KERN_INFO "%s: link up\n", dev->name);
2631                 }
2632         }
2633 }
2634
2635 /*
2636  * Check for loss of link and link establishment.
2637  * Can not use mii_check_media because it does nothing if mode is forced.
2638  */
2639
2640 static void pcnet32_watchdog(struct net_device *dev)
2641 {
2642         struct pcnet32_private *lp = dev->priv;
2643         unsigned long flags;
2644
2645         /* Print the link status if it has changed */
2646         spin_lock_irqsave(&lp->lock, flags);
2647         pcnet32_check_media(dev, 0);
2648         spin_unlock_irqrestore(&lp->lock, flags);
2649
2650         mod_timer(&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
2651 }
2652
2653 static void __devexit pcnet32_remove_one(struct pci_dev *pdev)
2654 {
2655         struct net_device *dev = pci_get_drvdata(pdev);
2656
2657         if (dev) {
2658                 struct pcnet32_private *lp = dev->priv;
2659
2660                 unregister_netdev(dev);
2661                 pcnet32_free_ring(dev);
2662                 release_region(dev->base_addr, PCNET32_TOTAL_SIZE);
2663                 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2664                 free_netdev(dev);
2665                 pci_disable_device(pdev);
2666                 pci_set_drvdata(pdev, NULL);
2667         }
2668 }
2669
2670 static struct pci_driver pcnet32_driver = {
2671         .name = DRV_NAME,
2672         .probe = pcnet32_probe_pci,
2673         .remove = __devexit_p(pcnet32_remove_one),
2674         .id_table = pcnet32_pci_tbl,
2675 };
2676
2677 /* An additional parameter that may be passed in... */
2678 static int debug = -1;
2679 static int tx_start_pt = -1;
2680 static int pcnet32_have_pci;
2681
2682 module_param(debug, int, 0);
2683 MODULE_PARM_DESC(debug, DRV_NAME " debug level");
2684 module_param(max_interrupt_work, int, 0);
2685 MODULE_PARM_DESC(max_interrupt_work,
2686                  DRV_NAME " maximum events handled per interrupt");
2687 module_param(rx_copybreak, int, 0);
2688 MODULE_PARM_DESC(rx_copybreak,
2689                  DRV_NAME " copy breakpoint for copy-only-tiny-frames");
2690 module_param(tx_start_pt, int, 0);
2691 MODULE_PARM_DESC(tx_start_pt, DRV_NAME " transmit start point (0-3)");
2692 module_param(pcnet32vlb, int, 0);
2693 MODULE_PARM_DESC(pcnet32vlb, DRV_NAME " Vesa local bus (VLB) support (0/1)");
2694 module_param_array(options, int, NULL, 0);
2695 MODULE_PARM_DESC(options, DRV_NAME " initial option setting(s) (0-15)");
2696 module_param_array(full_duplex, int, NULL, 0);
2697 MODULE_PARM_DESC(full_duplex, DRV_NAME " full duplex setting(s) (1)");
2698 /* Module Parameter for HomePNA cards added by Patrick Simmons, 2004 */
2699 module_param_array(homepna, int, NULL, 0);
2700 MODULE_PARM_DESC(homepna,
2701                  DRV_NAME
2702                  " mode for 79C978 cards (1 for HomePNA, 0 for Ethernet, default Ethernet");
2703
2704 MODULE_AUTHOR("Thomas Bogendoerfer");
2705 MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards");
2706 MODULE_LICENSE("GPL");
2707
2708 #define PCNET32_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
2709
2710 static int __init pcnet32_init_module(void)
2711 {
2712         printk(KERN_INFO "%s", version);
2713
2714         pcnet32_debug = netif_msg_init(debug, PCNET32_MSG_DEFAULT);
2715
2716         if ((tx_start_pt >= 0) && (tx_start_pt <= 3))
2717                 tx_start = tx_start_pt;
2718
2719         /* find the PCI devices */
2720         if (!pci_module_init(&pcnet32_driver))
2721                 pcnet32_have_pci = 1;
2722
2723         /* should we find any remaining VLbus devices ? */
2724         if (pcnet32vlb)
2725                 pcnet32_probe_vlbus(pcnet32_portlist);
2726
2727         if (cards_found && (pcnet32_debug & NETIF_MSG_PROBE))
2728                 printk(KERN_INFO PFX "%d cards_found.\n", cards_found);
2729
2730         return (pcnet32_have_pci + cards_found) ? 0 : -ENODEV;
2731 }
2732
2733 static void __exit pcnet32_cleanup_module(void)
2734 {
2735         struct net_device *next_dev;
2736
2737         while (pcnet32_dev) {
2738                 struct pcnet32_private *lp = pcnet32_dev->priv;
2739                 next_dev = lp->next;
2740                 unregister_netdev(pcnet32_dev);
2741                 pcnet32_free_ring(pcnet32_dev);
2742                 release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
2743                 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2744                 free_netdev(pcnet32_dev);
2745                 pcnet32_dev = next_dev;
2746         }
2747
2748         if (pcnet32_have_pci)
2749                 pci_unregister_driver(&pcnet32_driver);
2750 }
2751
2752 module_init(pcnet32_init_module);
2753 module_exit(pcnet32_cleanup_module);
2754
2755 /*
2756  * Local variables:
2757  *  c-indent-level: 4
2758  *  tab-width: 8
2759  * End:
2760  */