2 * linux/drivers/message/fusion/mptbase.c
3 * This is the Fusion MPT base driver which supports multiple
4 * (SCSI + LAN) specialized protocol drivers.
5 * For use with LSI Logic PCI chip/adapter(s)
6 * running LSI Logic Fusion MPT (Message Passing Technology) firmware.
8 * Copyright (c) 1999-2005 LSI Logic Corporation
9 * (mailto:mpt_linux_developer@lsil.com)
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; version 2 of the License.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
24 THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25 CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27 MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28 solely responsible for determining the appropriateness of using and
29 distributing the Program and assumes all risks associated with its
30 exercise of rights under this Agreement, including but not limited to
31 the risks and costs of program errors, damage to or loss of data,
32 programs or equipment, and unavailability or interruption of operations.
34 DISCLAIMER OF LIABILITY
35 NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39 TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40 USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41 HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
43 You should have received a copy of the GNU General Public License
44 along with this program; if not, write to the Free Software
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
49 #include <linux/config.h>
50 #include <linux/kernel.h>
51 #include <linux/module.h>
52 #include <linux/errno.h>
53 #include <linux/init.h>
54 #include <linux/slab.h>
55 #include <linux/types.h>
56 #include <linux/pci.h>
57 #include <linux/kdev_t.h>
58 #include <linux/blkdev.h>
59 #include <linux/delay.h>
60 #include <linux/interrupt.h> /* needed for in_interrupt() proto */
61 #include <linux/dma-mapping.h>
69 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
70 #define my_NAME "Fusion MPT base driver"
71 #define my_VERSION MPT_LINUX_VERSION_COMMON
72 #define MYNAM "mptbase"
74 MODULE_AUTHOR(MODULEAUTHOR);
75 MODULE_DESCRIPTION(my_NAME);
76 MODULE_LICENSE("GPL");
81 static int mpt_msi_enable;
82 module_param(mpt_msi_enable, int, 0);
83 MODULE_PARM_DESC(mpt_msi_enable, " MSI Support Enable (default=0)");
86 static int mfcounter = 0;
87 #define PRINT_MF_COUNT 20000
90 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
94 int mpt_lan_index = -1;
95 int mpt_stm_index = -1;
97 struct proc_dir_entry *mpt_proc_root_dir;
99 #define WHOINIT_UNKNOWN 0xAA
101 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
105 /* Adapter link list */
107 /* Callback lookup table */
108 static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
109 /* Protocol driver class lookup table */
110 static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
111 /* Event handler lookup table */
112 static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
113 /* Reset handler lookup table */
114 static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
115 static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
117 static int mpt_base_index = -1;
118 static int last_drv_idx = -1;
120 static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
122 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
126 static irqreturn_t mpt_interrupt(int irq, void *bus_id, struct pt_regs *r);
127 static int mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
128 static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
129 u32 *req, int replyBytes, u16 *u16reply, int maxwait,
131 static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
132 static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
133 static void mpt_adapter_disable(MPT_ADAPTER *ioc);
134 static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
136 static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
137 static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
138 static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
139 static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
140 static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
141 static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
142 static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
143 static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
144 static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
145 static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
146 static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
147 static int PrimeIocFifos(MPT_ADAPTER *ioc);
148 static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
149 static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
150 static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
151 static int GetLanConfigPages(MPT_ADAPTER *ioc);
152 static int GetIoUnitPage2(MPT_ADAPTER *ioc);
153 int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
154 static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
155 static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
156 static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
157 static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
158 static void mpt_timer_expired(unsigned long data);
159 static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
160 static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
161 static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
162 static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
164 #ifdef CONFIG_PROC_FS
165 static int procmpt_summary_read(char *buf, char **start, off_t offset,
166 int request, int *eof, void *data);
167 static int procmpt_version_read(char *buf, char **start, off_t offset,
168 int request, int *eof, void *data);
169 static int procmpt_iocinfo_read(char *buf, char **start, off_t offset,
170 int request, int *eof, void *data);
172 static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
174 //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
175 static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
176 static void mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
177 static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
178 static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
179 static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
180 static int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
182 /* module entry point */
183 static int __init fusion_init (void);
184 static void __exit fusion_exit (void);
186 #define CHIPREG_READ32(addr) readl_relaxed(addr)
187 #define CHIPREG_READ32_dmasync(addr) readl(addr)
188 #define CHIPREG_WRITE32(addr,val) writel(val, addr)
189 #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
190 #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
193 pci_disable_io_access(struct pci_dev *pdev)
197 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
199 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
203 pci_enable_io_access(struct pci_dev *pdev)
207 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
209 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
213 * Process turbo (context) reply...
216 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
218 MPT_FRAME_HDR *mf = NULL;
219 MPT_FRAME_HDR *mr = NULL;
223 dmfprintk((MYIOC_s_INFO_FMT "Got TURBO reply req_idx=%08x\n",
226 switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
227 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
228 req_idx = pa & 0x0000FFFF;
229 cb_idx = (pa & 0x00FF0000) >> 16;
230 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
232 case MPI_CONTEXT_REPLY_TYPE_LAN:
233 cb_idx = mpt_lan_index;
235 * Blind set of mf to NULL here was fatal
236 * after lan_reply says "freeme"
237 * Fix sort of combined with an optimization here;
238 * added explicit check for case where lan_reply
239 * was just returning 1 and doing nothing else.
240 * For this case skip the callback, but set up
241 * proper mf value first here:-)
243 if ((pa & 0x58000000) == 0x58000000) {
244 req_idx = pa & 0x0000FFFF;
245 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
246 mpt_free_msg_frame(ioc, mf);
251 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
253 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
254 cb_idx = mpt_stm_index;
255 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
262 /* Check for (valid) IO callback! */
263 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
264 MptCallbacks[cb_idx] == NULL) {
265 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
266 __FUNCTION__, ioc->name, cb_idx);
270 if (MptCallbacks[cb_idx](ioc, mf, mr))
271 mpt_free_msg_frame(ioc, mf);
277 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
288 /* non-TURBO reply! Hmmm, something may be up...
289 * Newest turbo reply mechanism; get address
290 * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
293 /* Map DMA address of reply header to cpu address.
294 * pa is 32 bits - but the dma address may be 32 or 64 bits
295 * get offset based only only the low addresses
298 reply_dma_low = (pa <<= 1);
299 mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
300 (reply_dma_low - ioc->reply_frames_low_dma));
302 req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
303 cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
304 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
306 dmfprintk((MYIOC_s_INFO_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
307 ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
308 DBG_DUMP_REPLY_FRAME(mr)
310 /* Check/log IOC log info
312 ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
313 if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
314 u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
315 if (ioc->bus_type == FC)
316 mpt_fc_log_info(ioc, log_info);
317 else if (ioc->bus_type == SPI)
318 mpt_spi_log_info(ioc, log_info);
319 else if (ioc->bus_type == SAS)
320 mpt_sas_log_info(ioc, log_info);
322 if (ioc_stat & MPI_IOCSTATUS_MASK) {
323 if (ioc->bus_type == SPI &&
324 cb_idx != mpt_stm_index &&
325 cb_idx != mpt_lan_index)
326 mpt_sp_ioc_info(ioc, (u32)ioc_stat, mf);
330 /* Check for (valid) IO callback! */
331 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
332 MptCallbacks[cb_idx] == NULL) {
333 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
334 __FUNCTION__, ioc->name, cb_idx);
339 freeme = MptCallbacks[cb_idx](ioc, mf, mr);
342 /* Flush (non-TURBO) reply with a WRITE! */
343 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
346 mpt_free_msg_frame(ioc, mf);
350 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
352 * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
353 * @irq: irq number (not used)
354 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
355 * @r: pt_regs pointer (not used)
357 * This routine is registered via the request_irq() kernel API call,
358 * and handles all interrupts generated from a specific MPT adapter
359 * (also referred to as a IO Controller or IOC).
360 * This routine must clear the interrupt from the adapter and does
361 * so by reading the reply FIFO. Multiple replies may be processed
362 * per single call to this routine.
364 * This routine handles register-level access of the adapter but
365 * dispatches (calls) a protocol-specific callback routine to handle
366 * the protocol-specific details of the MPT request completion.
369 mpt_interrupt(int irq, void *bus_id, struct pt_regs *r)
371 MPT_ADAPTER *ioc = bus_id;
375 * Drain the reply FIFO!
378 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
379 if (pa == 0xFFFFFFFF)
381 else if (pa & MPI_ADDRESS_REPLY_A_BIT)
384 mpt_turbo_reply(ioc, pa);
390 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
392 * mpt_base_reply - MPT base driver's callback routine; all base driver
393 * "internal" request/reply processing is routed here.
394 * Currently used for EventNotification and EventAck handling.
395 * @ioc: Pointer to MPT_ADAPTER structure
396 * @mf: Pointer to original MPT request frame
397 * @reply: Pointer to MPT reply frame (NULL if TurboReply)
399 * Returns 1 indicating original alloc'd request frame ptr
400 * should be freed, or 0 if it shouldn't.
403 mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
408 dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply() called\n", ioc->name));
410 #if defined(MPT_DEBUG_MSG_FRAME)
411 if (!(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
412 dmfprintk((KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf));
413 DBG_DUMP_REQUEST_FRAME_HDR(mf)
417 func = reply->u.hdr.Function;
418 dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply, Function=%02Xh\n",
421 if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
422 EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
426 results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
427 if (results != evHandlers) {
428 /* CHECKME! Any special handling needed here? */
429 devtverboseprintk((MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
430 ioc->name, evHandlers, results));
434 * Hmmm... It seems that EventNotificationReply is an exception
435 * to the rule of one reply per request.
437 if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
439 devtverboseprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p does not return Request frame\n",
440 ioc->name, pEvReply));
442 devtverboseprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
443 ioc->name, pEvReply));
446 #ifdef CONFIG_PROC_FS
447 // LogEvent(ioc, pEvReply);
450 } else if (func == MPI_FUNCTION_EVENT_ACK) {
451 dprintk((MYIOC_s_INFO_FMT "mpt_base_reply, EventAck reply received\n",
453 } else if (func == MPI_FUNCTION_CONFIG) {
457 dcprintk((MYIOC_s_INFO_FMT "config_complete (mf=%p,mr=%p)\n",
458 ioc->name, mf, reply));
460 pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
463 /* disable timer and remove from linked list */
464 del_timer(&pCfg->timer);
466 spin_lock_irqsave(&ioc->FreeQlock, flags);
467 list_del(&pCfg->linkage);
468 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
471 * If IOC Status is SUCCESS, save the header
472 * and set the status code to GOOD.
474 pCfg->status = MPT_CONFIG_ERROR;
476 ConfigReply_t *pReply = (ConfigReply_t *)reply;
479 status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
480 dcprintk((KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n",
481 status, le32_to_cpu(pReply->IOCLogInfo)));
483 pCfg->status = status;
484 if (status == MPI_IOCSTATUS_SUCCESS) {
485 if ((pReply->Header.PageType &
486 MPI_CONFIG_PAGETYPE_MASK) ==
487 MPI_CONFIG_PAGETYPE_EXTENDED) {
488 pCfg->cfghdr.ehdr->ExtPageLength =
489 le16_to_cpu(pReply->ExtPageLength);
490 pCfg->cfghdr.ehdr->ExtPageType =
493 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
495 /* If this is a regular header, save PageLength. */
496 /* LMP Do this better so not using a reserved field! */
497 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
498 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
499 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
504 * Wake up the original calling thread
509 } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
510 /* we should be always getting a reply frame */
511 memcpy(ioc->persist_reply_frame, reply,
512 min(MPT_DEFAULT_FRAME_SIZE,
513 4*reply->u.reply.MsgLength));
514 del_timer(&ioc->persist_timer);
515 ioc->persist_wait_done = 1;
518 printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
523 * Conditionally tell caller to free the original
524 * EventNotification/EventAck/unexpected request frame!
529 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
531 * mpt_register - Register protocol-specific main callback handler.
532 * @cbfunc: callback function pointer
533 * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
535 * This routine is called by a protocol-specific driver (SCSI host,
536 * LAN, SCSI target) to register it's reply callback routine. Each
537 * protocol-specific driver must do this before it will be able to
538 * use any IOC resources, such as obtaining request frames.
540 * NOTES: The SCSI protocol driver currently calls this routine thrice
541 * in order to register separate callbacks; one for "normal" SCSI IO;
542 * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
544 * Returns a positive integer valued "handle" in the
545 * range (and S.O.D. order) {N,...,7,6,5,...,1} if successful.
546 * Any non-positive return value (including zero!) should be considered
547 * an error by the caller.
550 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
557 * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
558 * (slot/handle 0 is reserved!)
560 for (i = MPT_MAX_PROTOCOL_DRIVERS-1; i; i--) {
561 if (MptCallbacks[i] == NULL) {
562 MptCallbacks[i] = cbfunc;
563 MptDriverClass[i] = dclass;
564 MptEvHandlers[i] = NULL;
573 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
575 * mpt_deregister - Deregister a protocol drivers resources.
576 * @cb_idx: previously registered callback handle
578 * Each protocol-specific driver should call this routine when it's
579 * module is unloaded.
582 mpt_deregister(int cb_idx)
584 if ((cb_idx >= 0) && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
585 MptCallbacks[cb_idx] = NULL;
586 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
587 MptEvHandlers[cb_idx] = NULL;
593 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
595 * mpt_event_register - Register protocol-specific event callback
597 * @cb_idx: previously registered (via mpt_register) callback handle
598 * @ev_cbfunc: callback function
600 * This routine can be called by one or more protocol-specific drivers
601 * if/when they choose to be notified of MPT events.
603 * Returns 0 for success.
606 mpt_event_register(int cb_idx, MPT_EVHANDLER ev_cbfunc)
608 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
611 MptEvHandlers[cb_idx] = ev_cbfunc;
615 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
617 * mpt_event_deregister - Deregister protocol-specific event callback
619 * @cb_idx: previously registered callback handle
621 * Each protocol-specific driver should call this routine
622 * when it does not (or can no longer) handle events,
623 * or when it's module is unloaded.
626 mpt_event_deregister(int cb_idx)
628 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
631 MptEvHandlers[cb_idx] = NULL;
634 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
636 * mpt_reset_register - Register protocol-specific IOC reset handler.
637 * @cb_idx: previously registered (via mpt_register) callback handle
638 * @reset_func: reset function
640 * This routine can be called by one or more protocol-specific drivers
641 * if/when they choose to be notified of IOC resets.
643 * Returns 0 for success.
646 mpt_reset_register(int cb_idx, MPT_RESETHANDLER reset_func)
648 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
651 MptResetHandlers[cb_idx] = reset_func;
655 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
657 * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
658 * @cb_idx: previously registered callback handle
660 * Each protocol-specific driver should call this routine
661 * when it does not (or can no longer) handle IOC reset handling,
662 * or when it's module is unloaded.
665 mpt_reset_deregister(int cb_idx)
667 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
670 MptResetHandlers[cb_idx] = NULL;
673 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
675 * mpt_device_driver_register - Register device driver hooks
678 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, int cb_idx)
682 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS) {
686 MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
688 /* call per pci device probe entry point */
689 list_for_each_entry(ioc, &ioc_list, list) {
690 if(dd_cbfunc->probe) {
691 dd_cbfunc->probe(ioc->pcidev,
692 ioc->pcidev->driver->id_table);
699 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
701 * mpt_device_driver_deregister - DeRegister device driver hooks
704 mpt_device_driver_deregister(int cb_idx)
706 struct mpt_pci_driver *dd_cbfunc;
709 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
712 dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
714 list_for_each_entry(ioc, &ioc_list, list) {
715 if (dd_cbfunc->remove)
716 dd_cbfunc->remove(ioc->pcidev);
719 MptDeviceDriverHandlers[cb_idx] = NULL;
723 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
725 * mpt_get_msg_frame - Obtain a MPT request frame from the pool (of 1024)
726 * allocated per MPT adapter.
727 * @handle: Handle of registered MPT protocol driver
728 * @ioc: Pointer to MPT adapter structure
730 * Returns pointer to a MPT request frame or %NULL if none are available
731 * or IOC is not active.
734 mpt_get_msg_frame(int handle, MPT_ADAPTER *ioc)
738 u16 req_idx; /* Request index */
740 /* validate handle and ioc identifier */
744 printk(KERN_WARNING "IOC Not Active! mpt_get_msg_frame returning NULL!\n");
747 /* If interrupts are not attached, do not return a request frame */
751 spin_lock_irqsave(&ioc->FreeQlock, flags);
752 if (!list_empty(&ioc->FreeQ)) {
755 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
756 u.frame.linkage.list);
757 list_del(&mf->u.frame.linkage.list);
758 mf->u.frame.linkage.arg1 = 0;
759 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
760 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
762 req_idx = req_offset / ioc->req_sz;
763 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
764 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
765 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame; /* Default, will be changed if necessary in SG generation */
772 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
776 printk(KERN_WARNING "IOC Active. No free Msg Frames! Count 0x%x Max 0x%x\n", ioc->mfcnt, ioc->req_depth);
778 if (mfcounter == PRINT_MF_COUNT)
779 printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth);
782 dmfprintk((KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n",
783 ioc->name, handle, ioc->id, mf));
787 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
789 * mpt_put_msg_frame - Send a protocol specific MPT request frame
791 * @handle: Handle of registered MPT protocol driver
792 * @ioc: Pointer to MPT adapter structure
793 * @mf: Pointer to MPT request frame
795 * This routine posts a MPT request frame to the request post FIFO of a
796 * specific MPT adapter.
799 mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
803 u16 req_idx; /* Request index */
805 /* ensure values are reset properly! */
806 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
807 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
809 req_idx = req_offset / ioc->req_sz;
810 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
811 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
813 #ifdef MPT_DEBUG_MSG_FRAME
815 u32 *m = mf->u.frame.hwhdr.__hdr;
818 printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ",
820 n = ioc->req_sz/4 - 1;
823 for (ii=0; ii<=n; ii++) {
824 if (ii && ((ii%8)==0))
825 printk("\n" KERN_INFO " ");
826 printk(" %08x", le32_to_cpu(m[ii]));
832 mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
833 dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));
834 CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
837 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
839 * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
840 * @handle: Handle of registered MPT protocol driver
841 * @ioc: Pointer to MPT adapter structure
842 * @mf: Pointer to MPT request frame
844 * This routine places a MPT request frame back on the MPT adapter's
848 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
852 /* Put Request back on FreeQ! */
853 spin_lock_irqsave(&ioc->FreeQlock, flags);
854 mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
855 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
859 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
862 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
864 * mpt_add_sge - Place a simple SGE at address pAddr.
865 * @pAddr: virtual address for SGE
866 * @flagslength: SGE flags and data transfer length
867 * @dma_addr: Physical address
869 * This routine places a MPT request frame back on the MPT adapter's
873 mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
875 if (sizeof(dma_addr_t) == sizeof(u64)) {
876 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
877 u32 tmp = dma_addr & 0xFFFFFFFF;
879 pSge->FlagsLength = cpu_to_le32(flagslength);
880 pSge->Address.Low = cpu_to_le32(tmp);
881 tmp = (u32) ((u64)dma_addr >> 32);
882 pSge->Address.High = cpu_to_le32(tmp);
885 SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
886 pSge->FlagsLength = cpu_to_le32(flagslength);
887 pSge->Address = cpu_to_le32(dma_addr);
891 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
893 * mpt_send_handshake_request - Send MPT request via doorbell
895 * @handle: Handle of registered MPT protocol driver
896 * @ioc: Pointer to MPT adapter structure
897 * @reqBytes: Size of the request in bytes
898 * @req: Pointer to MPT request frame
899 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
901 * This routine is used exclusively to send MptScsiTaskMgmt
902 * requests since they are required to be sent via doorbell handshake.
904 * NOTE: It is the callers responsibility to byte-swap fields in the
905 * request which are greater than 1 byte in size.
907 * Returns 0 for success, non-zero for failure.
910 mpt_send_handshake_request(int handle, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
916 /* State is known to be good upon entering
917 * this function so issue the bus reset
922 * Emulate what mpt_put_msg_frame() does /wrt to sanity
923 * setting cb_idx/req_idx. But ONLY if this request
924 * is in proper (pre-alloc'd) request buffer range...
926 ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
927 if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
928 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
929 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
930 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle;
933 /* Make sure there are no doorbells */
934 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
936 CHIPREG_WRITE32(&ioc->chip->Doorbell,
937 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
938 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
940 /* Wait for IOC doorbell int */
941 if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
945 /* Read doorbell and check for active bit */
946 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
949 dhsprintk((KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n",
952 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
954 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
958 /* Send request via doorbell handshake */
959 req_as_bytes = (u8 *) req;
960 for (ii = 0; ii < reqBytes/4; ii++) {
963 word = ((req_as_bytes[(ii*4) + 0] << 0) |
964 (req_as_bytes[(ii*4) + 1] << 8) |
965 (req_as_bytes[(ii*4) + 2] << 16) |
966 (req_as_bytes[(ii*4) + 3] << 24));
967 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
968 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
974 if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
979 /* Make sure there are no doorbells */
980 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
985 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
987 * mpt_host_page_access_control - provides mechanism for the host
988 * driver to control the IOC's Host Page Buffer access.
989 * @ioc: Pointer to MPT adapter structure
990 * @access_control_value: define bits below
992 * Access Control Value - bits[15:12]
994 * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
995 * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
996 * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
998 * Returns 0 for success, non-zero for failure.
1002 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1006 /* return if in use */
1007 if (CHIPREG_READ32(&ioc->chip->Doorbell)
1008 & MPI_DOORBELL_ACTIVE)
1011 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1013 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1014 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1015 <<MPI_DOORBELL_FUNCTION_SHIFT) |
1016 (access_control_value<<12)));
1018 /* Wait for IOC to clear Doorbell Status bit */
1019 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1025 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1027 * mpt_host_page_alloc - allocate system memory for the fw
1028 * If we already allocated memory in past, then resend the same pointer.
1029 * ioc@: Pointer to pointer to IOC adapter
1030 * ioc_init@: Pointer to ioc init config page
1032 * Returns 0 for success, non-zero for failure.
1035 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1039 u32 host_page_buffer_sz=0;
1041 if(!ioc->HostPageBuffer) {
1043 host_page_buffer_sz =
1044 le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1046 if(!host_page_buffer_sz)
1047 return 0; /* fw doesn't need any host buffers */
1049 /* spin till we get enough memory */
1050 while(host_page_buffer_sz > 0) {
1052 if((ioc->HostPageBuffer = pci_alloc_consistent(
1054 host_page_buffer_sz,
1055 &ioc->HostPageBuffer_dma)) != NULL) {
1057 dinitprintk((MYIOC_s_INFO_FMT
1058 "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1060 ioc->HostPageBuffer,
1061 ioc->HostPageBuffer_dma,
1062 host_page_buffer_sz));
1063 ioc->alloc_total += host_page_buffer_sz;
1064 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1068 host_page_buffer_sz -= (4*1024);
1072 if(!ioc->HostPageBuffer) {
1073 printk(MYIOC_s_ERR_FMT
1074 "Failed to alloc memory for host_page_buffer!\n",
1079 psge = (char *)&ioc_init->HostPageBufferSGE;
1080 flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1081 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1082 MPI_SGE_FLAGS_32_BIT_ADDRESSING |
1083 MPI_SGE_FLAGS_HOST_TO_IOC |
1084 MPI_SGE_FLAGS_END_OF_BUFFER;
1085 if (sizeof(dma_addr_t) == sizeof(u64)) {
1086 flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
1088 flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1089 flags_length |= ioc->HostPageBuffer_sz;
1090 mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1091 ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1096 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1098 * mpt_verify_adapter - Given a unique IOC identifier, set pointer to
1099 * the associated MPT adapter structure.
1100 * @iocid: IOC unique identifier (integer)
1101 * @iocpp: Pointer to pointer to IOC adapter
1103 * Returns iocid and sets iocpp.
1106 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1110 list_for_each_entry(ioc,&ioc_list,list) {
1111 if (ioc->id == iocid) {
1121 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1123 * mpt_attach - Install a PCI intelligent MPT adapter.
1124 * @pdev: Pointer to pci_dev structure
1126 * This routine performs all the steps necessary to bring the IOC of
1127 * a MPT adapter to a OPERATIONAL state. This includes registering
1128 * memory regions, registering the interrupt, and allocating request
1129 * and reply memory pools.
1131 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1134 * Returns 0 for success, non-zero for failure.
1136 * TODO: Add support for polled controllers
1139 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1143 unsigned long mem_phys;
1151 static int mpt_ids = 0;
1152 #ifdef CONFIG_PROC_FS
1153 struct proc_dir_entry *dent, *ent;
1156 if (pci_enable_device(pdev))
1159 dinitprintk((KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1161 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1162 dprintk((KERN_INFO MYNAM
1163 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n"));
1164 } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1165 printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
1169 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1170 dprintk((KERN_INFO MYNAM
1171 ": Using 64 bit consistent mask\n"));
1173 dprintk((KERN_INFO MYNAM
1174 ": Not using 64 bit consistent mask\n"));
1176 ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1178 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1181 ioc->alloc_total = sizeof(MPT_ADAPTER);
1182 ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
1183 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1186 ioc->diagPending = 0;
1187 spin_lock_init(&ioc->diagLock);
1188 spin_lock_init(&ioc->initializing_hba_lock);
1190 /* Initialize the event logging.
1192 ioc->eventTypes = 0; /* None */
1193 ioc->eventContext = 0;
1194 ioc->eventLogSize = 0;
1201 ioc->cached_fw = NULL;
1203 /* Initilize SCSI Config Data structure
1205 memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1207 /* Initialize the running configQ head.
1209 INIT_LIST_HEAD(&ioc->configQ);
1211 /* Initialize the fc rport list head.
1213 INIT_LIST_HEAD(&ioc->fc_rports);
1215 /* Find lookup slot. */
1216 INIT_LIST_HEAD(&ioc->list);
1217 ioc->id = mpt_ids++;
1219 mem_phys = msize = 0;
1221 for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1222 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1223 /* Get I/O space! */
1224 port = pci_resource_start(pdev, ii);
1225 psize = pci_resource_len(pdev,ii);
1228 mem_phys = pci_resource_start(pdev, ii);
1229 msize = pci_resource_len(pdev,ii);
1233 ioc->mem_size = msize;
1235 if (ii == DEVICE_COUNT_RESOURCE) {
1236 printk(KERN_ERR MYNAM ": ERROR - MPT adapter has no memory regions defined!\n");
1241 dinitprintk((KERN_INFO MYNAM ": MPT adapter @ %lx, msize=%dd bytes\n", mem_phys, msize));
1242 dinitprintk((KERN_INFO MYNAM ": (port i/o @ %lx, psize=%dd bytes)\n", port, psize));
1245 /* Get logical ptr for PciMem0 space */
1246 /*mem = ioremap(mem_phys, msize);*/
1247 mem = ioremap(mem_phys, 0x100);
1249 printk(KERN_ERR MYNAM ": ERROR - Unable to map adapter memory!\n");
1254 dinitprintk((KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys));
1256 dinitprintk((KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n",
1257 &ioc->facts, &ioc->pfacts[0]));
1259 ioc->mem_phys = mem_phys;
1260 ioc->chip = (SYSIF_REGS __iomem *)mem;
1262 /* Save Port IO values in case we need to do downloadboot */
1264 u8 *pmem = (u8*)port;
1265 ioc->pio_mem_phys = port;
1266 ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
1269 if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC909) {
1270 ioc->prod_name = "LSIFC909";
1273 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929) {
1274 ioc->prod_name = "LSIFC929";
1277 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919) {
1278 ioc->prod_name = "LSIFC919";
1281 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929X) {
1282 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1284 if (revision < XL_929) {
1285 ioc->prod_name = "LSIFC929X";
1286 /* 929X Chip Fix. Set Split transactions level
1287 * for PCIX. Set MOST bits to zero.
1289 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1291 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1293 ioc->prod_name = "LSIFC929XL";
1294 /* 929XL Chip Fix. Set MMRBC to 0x08.
1296 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1298 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1301 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919X) {
1302 ioc->prod_name = "LSIFC919X";
1304 /* 919X Chip Fix. Set Split transactions level
1305 * for PCIX. Set MOST bits to zero.
1307 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1309 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1311 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC939X) {
1312 ioc->prod_name = "LSIFC939X";
1314 ioc->errata_flag_1064 = 1;
1316 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949X) {
1317 ioc->prod_name = "LSIFC949X";
1319 ioc->errata_flag_1064 = 1;
1321 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949E) {
1322 ioc->prod_name = "LSIFC949E";
1325 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_53C1030) {
1326 ioc->prod_name = "LSI53C1030";
1327 ioc->bus_type = SPI;
1328 /* 1030 Chip Fix. Disable Split transactions
1329 * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1331 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1332 if (revision < C0_1030) {
1333 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1335 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1338 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_1030_53C1035) {
1339 ioc->prod_name = "LSI53C1035";
1340 ioc->bus_type = SPI;
1342 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064) {
1343 ioc->prod_name = "LSISAS1064";
1344 ioc->bus_type = SAS;
1345 ioc->errata_flag_1064 = 1;
1347 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066) {
1348 ioc->prod_name = "LSISAS1066";
1349 ioc->bus_type = SAS;
1350 ioc->errata_flag_1064 = 1;
1352 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068) {
1353 ioc->prod_name = "LSISAS1068";
1354 ioc->bus_type = SAS;
1355 ioc->errata_flag_1064 = 1;
1357 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064E) {
1358 ioc->prod_name = "LSISAS1064E";
1359 ioc->bus_type = SAS;
1361 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066E) {
1362 ioc->prod_name = "LSISAS1066E";
1363 ioc->bus_type = SAS;
1365 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068E) {
1366 ioc->prod_name = "LSISAS1068E";
1367 ioc->bus_type = SAS;
1370 if (ioc->errata_flag_1064)
1371 pci_disable_io_access(pdev);
1373 sprintf(ioc->name, "ioc%d", ioc->id);
1375 spin_lock_init(&ioc->FreeQlock);
1378 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1380 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1382 /* Set lookup ptr. */
1383 list_add_tail(&ioc->list, &ioc_list);
1385 /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1387 mpt_detect_bound_ports(ioc, pdev);
1389 if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
1391 printk(KERN_WARNING MYNAM
1392 ": WARNING - %s did not initialize properly! (%d)\n",
1394 list_del(&ioc->list);
1396 ioc->alt_ioc->alt_ioc = NULL;
1399 pci_set_drvdata(pdev, NULL);
1403 /* call per device driver probe entry point */
1404 for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
1405 if(MptDeviceDriverHandlers[ii] &&
1406 MptDeviceDriverHandlers[ii]->probe) {
1407 MptDeviceDriverHandlers[ii]->probe(pdev,id);
1411 #ifdef CONFIG_PROC_FS
1413 * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
1415 dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
1417 ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
1419 ent->read_proc = procmpt_iocinfo_read;
1422 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
1424 ent->read_proc = procmpt_summary_read;
1433 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1435 * mpt_detach - Remove a PCI intelligent MPT adapter.
1436 * @pdev: Pointer to pci_dev structure
1441 mpt_detach(struct pci_dev *pdev)
1443 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1447 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
1448 remove_proc_entry(pname, NULL);
1449 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
1450 remove_proc_entry(pname, NULL);
1451 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
1452 remove_proc_entry(pname, NULL);
1454 /* call per device driver remove entry point */
1455 for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
1456 if(MptDeviceDriverHandlers[ii] &&
1457 MptDeviceDriverHandlers[ii]->remove) {
1458 MptDeviceDriverHandlers[ii]->remove(pdev);
1462 /* Disable interrupts! */
1463 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1466 synchronize_irq(pdev->irq);
1468 /* Clear any lingering interrupt */
1469 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1471 CHIPREG_READ32(&ioc->chip->IntStatus);
1473 mpt_adapter_dispose(ioc);
1475 pci_set_drvdata(pdev, NULL);
1478 /**************************************************************************
1482 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1484 * mpt_suspend - Fusion MPT base driver suspend routine.
1489 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
1492 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1494 device_state=pci_choose_state(pdev, state);
1496 printk(MYIOC_s_INFO_FMT
1497 "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
1498 ioc->name, pdev, pci_name(pdev), device_state);
1500 pci_save_state(pdev);
1502 /* put ioc into READY_STATE */
1503 if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
1504 printk(MYIOC_s_ERR_FMT
1505 "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
1508 /* disable interrupts */
1509 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1512 /* Clear any lingering interrupt */
1513 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1515 pci_disable_device(pdev);
1516 pci_set_power_state(pdev, device_state);
1521 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1523 * mpt_resume - Fusion MPT base driver resume routine.
1528 mpt_resume(struct pci_dev *pdev)
1530 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1531 u32 device_state = pdev->current_state;
1534 printk(MYIOC_s_INFO_FMT
1535 "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
1536 ioc->name, pdev, pci_name(pdev), device_state);
1538 pci_set_power_state(pdev, 0);
1539 pci_restore_state(pdev);
1540 pci_enable_device(pdev);
1542 /* enable interrupts */
1543 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1546 printk(MYIOC_s_INFO_FMT
1547 "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
1549 (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
1550 CHIPREG_READ32(&ioc->chip->Doorbell));
1552 /* bring ioc to operational state */
1553 if ((recovery_state = mpt_do_ioc_recovery(ioc,
1554 MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
1555 printk(MYIOC_s_INFO_FMT
1556 "pci-resume: Cannot recover, error:[%x]\n",
1557 ioc->name, recovery_state);
1559 printk(MYIOC_s_INFO_FMT
1560 "pci-resume: success\n", ioc->name);
1568 mpt_signal_reset(int index, MPT_ADAPTER *ioc, int reset_phase)
1570 if ((MptDriverClass[index] == MPTSPI_DRIVER &&
1571 ioc->bus_type != SPI) ||
1572 (MptDriverClass[index] == MPTFC_DRIVER &&
1573 ioc->bus_type != FC) ||
1574 (MptDriverClass[index] == MPTSAS_DRIVER &&
1575 ioc->bus_type != SAS))
1576 /* make sure we only call the relevant reset handler
1579 return (MptResetHandlers[index])(ioc, reset_phase);
1582 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1584 * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
1585 * @ioc: Pointer to MPT adapter structure
1586 * @reason: Event word / reason
1587 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1589 * This routine performs all the steps necessary to bring the IOC
1590 * to a OPERATIONAL state.
1592 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1597 * -1 if failed to get board READY
1598 * -2 if READY but IOCFacts Failed
1599 * -3 if READY but PrimeIOCFifos Failed
1600 * -4 if READY but IOCInit Failed
1603 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
1605 int hard_reset_done = 0;
1606 int alt_ioc_ready = 0;
1612 int reset_alt_ioc_active = 0;
1613 int irq_allocated = 0;
1615 printk(KERN_INFO MYNAM ": Initiating %s %s\n",
1616 ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
1618 /* Disable reply interrupts (also blocks FreeQ) */
1619 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1623 if (ioc->alt_ioc->active)
1624 reset_alt_ioc_active = 1;
1626 /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
1627 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
1628 ioc->alt_ioc->active = 0;
1632 if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
1635 if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
1636 if (hard_reset_done == -4) {
1637 printk(KERN_WARNING MYNAM ": %s Owned by PEER..skipping!\n",
1640 if (reset_alt_ioc_active && ioc->alt_ioc) {
1641 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
1642 dprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
1643 ioc->alt_ioc->name));
1644 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1645 ioc->alt_ioc->active = 1;
1649 printk(KERN_WARNING MYNAM ": %s NOT READY WARNING!\n",
1655 /* hard_reset_done = 0 if a soft reset was performed
1656 * and 1 if a hard reset was performed.
1658 if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
1659 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
1662 printk(KERN_WARNING MYNAM
1663 ": alt-%s: Not ready WARNING!\n",
1664 ioc->alt_ioc->name);
1667 for (ii=0; ii<5; ii++) {
1668 /* Get IOC facts! Allow 5 retries */
1669 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
1675 dinitprintk((MYIOC_s_INFO_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc));
1677 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1678 MptDisplayIocCapabilities(ioc);
1681 if (alt_ioc_ready) {
1682 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
1683 dinitprintk((MYIOC_s_INFO_FMT "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
1684 /* Retry - alt IOC was initialized once
1686 rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
1689 dinitprintk((MYIOC_s_INFO_FMT "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
1691 reset_alt_ioc_active = 0;
1692 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1693 MptDisplayIocCapabilities(ioc->alt_ioc);
1698 * Device is reset now. It must have de-asserted the interrupt line
1699 * (if it was asserted) and it should be safe to register for the
1702 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
1704 if (ioc->pcidev->irq) {
1705 if (mpt_msi_enable && !pci_enable_msi(ioc->pcidev))
1706 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
1708 rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
1709 SA_SHIRQ, ioc->name, ioc);
1711 printk(MYIOC_s_ERR_FMT "Unable to allocate "
1712 "interrupt %d!\n", ioc->name,
1715 pci_disable_msi(ioc->pcidev);
1719 ioc->pci_irq = ioc->pcidev->irq;
1720 pci_set_master(ioc->pcidev); /* ?? */
1721 pci_set_drvdata(ioc->pcidev, ioc);
1722 dprintk((KERN_INFO MYNAM ": %s installed at interrupt "
1723 "%d\n", ioc->name, ioc->pcidev->irq));
1727 /* Prime reply & request queues!
1728 * (mucho alloc's) Must be done prior to
1729 * init as upper addresses are needed for init.
1730 * If fails, continue with alt-ioc processing
1732 if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
1735 /* May need to check/upload firmware & data here!
1736 * If fails, continue with alt-ioc processing
1738 if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
1741 if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
1742 printk(KERN_WARNING MYNAM ": alt-%s: (%d) FIFO mgmt alloc WARNING!\n",
1743 ioc->alt_ioc->name, rc);
1745 reset_alt_ioc_active = 0;
1748 if (alt_ioc_ready) {
1749 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
1751 reset_alt_ioc_active = 0;
1752 printk(KERN_WARNING MYNAM
1753 ": alt-%s: (%d) init failure WARNING!\n",
1754 ioc->alt_ioc->name, rc);
1758 if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
1759 if (ioc->upload_fw) {
1760 ddlprintk((MYIOC_s_INFO_FMT
1761 "firmware upload required!\n", ioc->name));
1763 /* Controller is not operational, cannot do upload
1766 rc = mpt_do_upload(ioc, sleepFlag);
1768 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
1770 * Maintain only one pointer to FW memory
1771 * so there will not be two attempt to
1772 * downloadboot onboard dual function
1773 * chips (mpt_adapter_disable,
1776 ioc->cached_fw = NULL;
1777 ddlprintk((MYIOC_s_INFO_FMT ": mpt_upload: alt_%s has cached_fw=%p \n",
1778 ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
1781 printk(KERN_WARNING MYNAM ": firmware upload failure!\n");
1789 /* Enable! (reply interrupt) */
1790 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1794 if (reset_alt_ioc_active && ioc->alt_ioc) {
1795 /* (re)Enable alt-IOC! (reply interrupt) */
1796 dinitprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
1797 ioc->alt_ioc->name));
1798 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1799 ioc->alt_ioc->active = 1;
1802 /* Enable MPT base driver management of EventNotification
1803 * and EventAck handling.
1805 if ((ret == 0) && (!ioc->facts.EventState))
1806 (void) SendEventNotification(ioc, 1); /* 1=Enable EventNotification */
1808 if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
1809 (void) SendEventNotification(ioc->alt_ioc, 1); /* 1=Enable EventNotification */
1811 /* Add additional "reason" check before call to GetLanConfigPages
1812 * (combined with GetIoUnitPage2 call). This prevents a somewhat
1813 * recursive scenario; GetLanConfigPages times out, timer expired
1814 * routine calls HardResetHandler, which calls into here again,
1815 * and we try GetLanConfigPages again...
1817 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
1818 if (ioc->bus_type == SAS) {
1820 /* clear persistency table */
1821 if(ioc->facts.IOCExceptions &
1822 MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
1823 ret = mptbase_sas_persist_operation(ioc,
1824 MPI_SAS_OP_CLEAR_NOT_PRESENT);
1831 mpt_findImVolumes(ioc);
1833 } else if (ioc->bus_type == FC) {
1834 if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
1835 (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
1837 * Pre-fetch the ports LAN MAC address!
1838 * (LANPage1_t stuff)
1840 (void) GetLanConfigPages(ioc);
1843 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
1844 dprintk((MYIOC_s_INFO_FMT "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
1845 ioc->name, a[5], a[4], a[3], a[2], a[1], a[0] ));
1850 /* Get NVRAM and adapter maximums from SPP 0 and 2
1852 mpt_GetScsiPortSettings(ioc, 0);
1854 /* Get version and length of SDP 1
1856 mpt_readScsiDevicePageHeaders(ioc, 0);
1860 if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
1861 mpt_findImVolumes(ioc);
1863 /* Check, and possibly reset, the coalescing value
1865 mpt_read_ioc_pg_1(ioc);
1867 mpt_read_ioc_pg_4(ioc);
1870 GetIoUnitPage2(ioc);
1874 * Call each currently registered protocol IOC reset handler
1875 * with post-reset indication.
1876 * NOTE: If we're doing _IOC_BRINGUP, there can be no
1877 * MptResetHandlers[] registered yet.
1879 if (hard_reset_done) {
1881 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
1882 if ((ret == 0) && MptResetHandlers[ii]) {
1883 dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n",
1885 rc += mpt_signal_reset(ii, ioc, MPT_IOC_POST_RESET);
1889 if (alt_ioc_ready && MptResetHandlers[ii]) {
1890 drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n",
1891 ioc->name, ioc->alt_ioc->name, ii));
1892 rc += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_POST_RESET);
1896 /* FIXME? Examine results here? */
1900 if ((ret != 0) && irq_allocated) {
1901 free_irq(ioc->pci_irq, ioc);
1903 pci_disable_msi(ioc->pcidev);
1908 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1910 * mpt_detect_bound_ports - Search for PCI bus/dev_function
1911 * which matches PCI bus/dev_function (+/-1) for newly discovered 929,
1912 * 929X, 1030 or 1035.
1913 * @ioc: Pointer to MPT adapter structure
1914 * @pdev: Pointer to (struct pci_dev) structure
1916 * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
1917 * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
1920 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
1922 struct pci_dev *peer=NULL;
1923 unsigned int slot = PCI_SLOT(pdev->devfn);
1924 unsigned int func = PCI_FUNC(pdev->devfn);
1925 MPT_ADAPTER *ioc_srch;
1927 dprintk((MYIOC_s_INFO_FMT "PCI device %s devfn=%x/%x,"
1928 " searching for devfn match on %x or %x\n",
1929 ioc->name, pci_name(pdev), pdev->bus->number,
1930 pdev->devfn, func-1, func+1));
1932 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
1934 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
1939 list_for_each_entry(ioc_srch, &ioc_list, list) {
1940 struct pci_dev *_pcidev = ioc_srch->pcidev;
1941 if (_pcidev == peer) {
1942 /* Paranoia checks */
1943 if (ioc->alt_ioc != NULL) {
1944 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
1945 ioc->name, ioc->alt_ioc->name);
1947 } else if (ioc_srch->alt_ioc != NULL) {
1948 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
1949 ioc_srch->name, ioc_srch->alt_ioc->name);
1952 dprintk((KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n",
1953 ioc->name, ioc_srch->name));
1954 ioc_srch->alt_ioc = ioc;
1955 ioc->alt_ioc = ioc_srch;
1961 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1963 * mpt_adapter_disable - Disable misbehaving MPT adapter.
1964 * @this: Pointer to MPT adapter structure
1967 mpt_adapter_disable(MPT_ADAPTER *ioc)
1972 if (ioc->cached_fw != NULL) {
1973 ddlprintk((KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n"));
1974 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) {
1975 printk(KERN_WARNING MYNAM
1976 ": firmware downloadboot failure (%d)!\n", ret);
1980 /* Disable adapter interrupts! */
1981 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1983 /* Clear any lingering interrupt */
1984 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1986 if (ioc->alloc != NULL) {
1988 dexitprintk((KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n",
1989 ioc->name, ioc->alloc, ioc->alloc_sz));
1990 pci_free_consistent(ioc->pcidev, sz,
1991 ioc->alloc, ioc->alloc_dma);
1992 ioc->reply_frames = NULL;
1993 ioc->req_frames = NULL;
1995 ioc->alloc_total -= sz;
1998 if (ioc->sense_buf_pool != NULL) {
1999 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2000 pci_free_consistent(ioc->pcidev, sz,
2001 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2002 ioc->sense_buf_pool = NULL;
2003 ioc->alloc_total -= sz;
2006 if (ioc->events != NULL){
2007 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2010 ioc->alloc_total -= sz;
2013 if (ioc->cached_fw != NULL) {
2014 sz = ioc->facts.FWImageSize;
2015 pci_free_consistent(ioc->pcidev, sz,
2016 ioc->cached_fw, ioc->cached_fw_dma);
2017 ioc->cached_fw = NULL;
2018 ioc->alloc_total -= sz;
2021 kfree(ioc->spi_data.nvram);
2022 kfree(ioc->raid_data.pIocPg3);
2023 ioc->spi_data.nvram = NULL;
2024 ioc->raid_data.pIocPg3 = NULL;
2026 if (ioc->spi_data.pIocPg4 != NULL) {
2027 sz = ioc->spi_data.IocPg4Sz;
2028 pci_free_consistent(ioc->pcidev, sz,
2029 ioc->spi_data.pIocPg4,
2030 ioc->spi_data.IocPg4_dma);
2031 ioc->spi_data.pIocPg4 = NULL;
2032 ioc->alloc_total -= sz;
2035 if (ioc->ReqToChain != NULL) {
2036 kfree(ioc->ReqToChain);
2037 kfree(ioc->RequestNB);
2038 ioc->ReqToChain = NULL;
2041 kfree(ioc->ChainToChain);
2042 ioc->ChainToChain = NULL;
2044 if (ioc->HostPageBuffer != NULL) {
2045 if((ret = mpt_host_page_access_control(ioc,
2046 MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2047 printk(KERN_ERR MYNAM
2048 ": %s: host page buffers free failed (%d)!\n",
2051 dexitprintk((KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n",
2052 ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
2053 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2054 ioc->HostPageBuffer,
2055 ioc->HostPageBuffer_dma);
2056 ioc->HostPageBuffer = NULL;
2057 ioc->HostPageBuffer_sz = 0;
2058 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2062 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2064 * mpt_adapter_dispose - Free all resources associated with a MPT
2066 * @ioc: Pointer to MPT adapter structure
2068 * This routine unregisters h/w resources and frees all alloc'd memory
2069 * associated with a MPT adapter structure.
2072 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2074 int sz_first, sz_last;
2079 sz_first = ioc->alloc_total;
2081 mpt_adapter_disable(ioc);
2083 if (ioc->pci_irq != -1) {
2084 free_irq(ioc->pci_irq, ioc);
2086 pci_disable_msi(ioc->pcidev);
2090 if (ioc->memmap != NULL) {
2091 iounmap(ioc->memmap);
2095 #if defined(CONFIG_MTRR) && 0
2096 if (ioc->mtrr_reg > 0) {
2097 mtrr_del(ioc->mtrr_reg, 0, 0);
2098 dprintk((KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name));
2102 /* Zap the adapter lookup ptr! */
2103 list_del(&ioc->list);
2105 sz_last = ioc->alloc_total;
2106 dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
2107 ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2110 ioc->alt_ioc->alt_ioc = NULL;
2115 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2117 * MptDisplayIocCapabilities - Disply IOC's capacilities.
2118 * @ioc: Pointer to MPT adapter structure
2121 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2125 printk(KERN_INFO "%s: ", ioc->name);
2126 if (ioc->prod_name && strlen(ioc->prod_name) > 3)
2127 printk("%s: ", ioc->prod_name+3);
2128 printk("Capabilities={");
2130 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2131 printk("Initiator");
2135 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2136 printk("%sTarget", i ? "," : "");
2140 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2141 printk("%sLAN", i ? "," : "");
2147 * This would probably evoke more questions than it's worth
2149 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2150 printk("%sLogBusAddr", i ? "," : "");
2158 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2160 * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2161 * @ioc: Pointer to MPT_ADAPTER structure
2162 * @force: Force hard KickStart of IOC
2163 * @sleepFlag: Specifies whether the process can sleep
2166 * 1 - DIAG reset and READY
2167 * 0 - READY initially OR soft reset and READY
2168 * -1 - Any failure on KickStart
2169 * -2 - Msg Unit Reset Failed
2170 * -3 - IO Unit Reset Failed
2171 * -4 - IOC owned by a PEER
2174 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2179 int hard_reset_done = 0;
2184 /* Get current [raw] IOC state */
2185 ioc_state = mpt_GetIocState(ioc, 0);
2186 dhsprintk((KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state));
2189 * Check to see if IOC got left/stuck in doorbell handshake
2190 * grip of death. If so, hard reset the IOC.
2192 if (ioc_state & MPI_DOORBELL_ACTIVE) {
2194 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2198 /* Is it already READY? */
2199 if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
2203 * Check to see if IOC is in FAULT state.
2205 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2207 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2209 printk(KERN_WARNING " FAULT code = %04xh\n",
2210 ioc_state & MPI_DOORBELL_DATA_MASK);
2214 * Hmmm... Did it get left operational?
2216 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2217 dinitprintk((MYIOC_s_INFO_FMT "IOC operational unexpected\n",
2221 * If PCI Peer, exit.
2222 * Else, if no fault conditions are present, issue a MessageUnitReset
2223 * Else, fall through to KickStart case
2225 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2226 dinitprintk((KERN_INFO MYNAM
2227 ": whoinit 0x%x statefault %d force %d\n",
2228 whoinit, statefault, force));
2229 if (whoinit == MPI_WHOINIT_PCI_PEER)
2232 if ((statefault == 0 ) && (force == 0)) {
2233 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2240 hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2241 if (hard_reset_done < 0)
2245 * Loop here waiting for IOC to come READY.
2248 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
2250 while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2251 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2253 * BIOS or previous driver load left IOC in OP state.
2254 * Reset messaging FIFOs.
2256 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2257 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2260 } else if (ioc_state == MPI_IOC_STATE_RESET) {
2262 * Something is wrong. Try to get IOC back
2265 if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2266 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2273 printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
2274 ioc->name, (int)((ii+5)/HZ));
2278 if (sleepFlag == CAN_SLEEP) {
2281 mdelay (1); /* 1 msec delay */
2286 if (statefault < 3) {
2287 printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
2289 statefault==1 ? "stuck handshake" : "IOC FAULT");
2292 return hard_reset_done;
2295 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2297 * mpt_GetIocState - Get the current state of a MPT adapter.
2298 * @ioc: Pointer to MPT_ADAPTER structure
2299 * @cooked: Request raw or cooked IOC state
2301 * Returns all IOC Doorbell register bits if cooked==0, else just the
2302 * Doorbell bits in MPI_IOC_STATE_MASK.
2305 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
2310 s = CHIPREG_READ32(&ioc->chip->Doorbell);
2311 // dprintk((MYIOC_s_INFO_FMT "raw state = %08x\n", ioc->name, s));
2312 sc = s & MPI_IOC_STATE_MASK;
2315 ioc->last_state = sc;
2317 return cooked ? sc : s;
2320 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2322 * GetIocFacts - Send IOCFacts request to MPT adapter.
2323 * @ioc: Pointer to MPT_ADAPTER structure
2324 * @sleepFlag: Specifies whether the process can sleep
2325 * @reason: If recovery, only update facts.
2327 * Returns 0 for success, non-zero for failure.
2330 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
2332 IOCFacts_t get_facts;
2333 IOCFactsReply_t *facts;
2341 /* IOC *must* NOT be in RESET state! */
2342 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2343 printk(KERN_ERR MYNAM ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
2349 facts = &ioc->facts;
2351 /* Destination (reply area)... */
2352 reply_sz = sizeof(*facts);
2353 memset(facts, 0, reply_sz);
2355 /* Request area (get_facts on the stack right now!) */
2356 req_sz = sizeof(get_facts);
2357 memset(&get_facts, 0, req_sz);
2359 get_facts.Function = MPI_FUNCTION_IOC_FACTS;
2360 /* Assert: All other get_facts fields are zero! */
2362 dinitprintk((MYIOC_s_INFO_FMT
2363 "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
2364 ioc->name, req_sz, reply_sz));
2366 /* No non-zero fields in the get_facts request are greater than
2367 * 1 byte in size, so we can just fire it off as is.
2369 r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
2370 reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
2375 * Now byte swap (GRRR) the necessary fields before any further
2376 * inspection of reply contents.
2378 * But need to do some sanity checks on MsgLength (byte) field
2379 * to make sure we don't zero IOC's req_sz!
2381 /* Did we get a valid reply? */
2382 if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
2383 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2385 * If not been here, done that, save off first WhoInit value
2387 if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
2388 ioc->FirstWhoInit = facts->WhoInit;
2391 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
2392 facts->MsgContext = le32_to_cpu(facts->MsgContext);
2393 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
2394 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
2395 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
2396 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
2397 /* CHECKME! IOCStatus, IOCLogInfo */
2399 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
2400 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
2403 * FC f/w version changed between 1.1 and 1.2
2404 * Old: u16{Major(4),Minor(4),SubMinor(8)}
2405 * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
2407 if (facts->MsgVersion < 0x0102) {
2409 * Handle old FC f/w style, convert to new...
2411 u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
2412 facts->FWVersion.Word =
2413 ((oldv<<12) & 0xFF000000) |
2414 ((oldv<<8) & 0x000FFF00);
2416 facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
2418 facts->ProductID = le16_to_cpu(facts->ProductID);
2419 facts->CurrentHostMfaHighAddr =
2420 le32_to_cpu(facts->CurrentHostMfaHighAddr);
2421 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
2422 facts->CurrentSenseBufferHighAddr =
2423 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
2424 facts->CurReplyFrameSize =
2425 le16_to_cpu(facts->CurReplyFrameSize);
2426 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
2429 * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
2430 * Older MPI-1.00.xx struct had 13 dwords, and enlarged
2431 * to 14 in MPI-1.01.0x.
2433 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
2434 facts->MsgVersion > 0x0100) {
2435 facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
2438 sz = facts->FWImageSize;
2443 facts->FWImageSize = sz;
2445 if (!facts->RequestFrameSize) {
2446 /* Something is wrong! */
2447 printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
2452 r = sz = facts->BlockSize;
2453 vv = ((63 / (sz * 4)) + 1) & 0x03;
2454 ioc->NB_for_64_byte_frame = vv;
2460 ioc->NBShiftFactor = shiftFactor;
2461 dinitprintk((MYIOC_s_INFO_FMT "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
2462 ioc->name, vv, shiftFactor, r));
2464 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2466 * Set values for this IOC's request & reply frame sizes,
2467 * and request & reply queue depths...
2469 ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
2470 ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
2471 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
2472 ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
2474 dinitprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n",
2475 ioc->name, ioc->reply_sz, ioc->reply_depth));
2476 dinitprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n",
2477 ioc->name, ioc->req_sz, ioc->req_depth));
2479 /* Get port facts! */
2480 if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
2484 printk(MYIOC_s_ERR_FMT
2485 "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
2486 ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
2487 RequestFrameSize)/sizeof(u32)));
2494 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2496 * GetPortFacts - Send PortFacts request to MPT adapter.
2497 * @ioc: Pointer to MPT_ADAPTER structure
2498 * @portnum: Port number
2499 * @sleepFlag: Specifies whether the process can sleep
2501 * Returns 0 for success, non-zero for failure.
2504 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2506 PortFacts_t get_pfacts;
2507 PortFactsReply_t *pfacts;
2512 /* IOC *must* NOT be in RESET state! */
2513 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2514 printk(KERN_ERR MYNAM ": ERROR - Can't get PortFacts, %s NOT READY! (%08x)\n",
2520 pfacts = &ioc->pfacts[portnum];
2522 /* Destination (reply area)... */
2523 reply_sz = sizeof(*pfacts);
2524 memset(pfacts, 0, reply_sz);
2526 /* Request area (get_pfacts on the stack right now!) */
2527 req_sz = sizeof(get_pfacts);
2528 memset(&get_pfacts, 0, req_sz);
2530 get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
2531 get_pfacts.PortNumber = portnum;
2532 /* Assert: All other get_pfacts fields are zero! */
2534 dinitprintk((MYIOC_s_INFO_FMT "Sending get PortFacts(%d) request\n",
2535 ioc->name, portnum));
2537 /* No non-zero fields in the get_pfacts request are greater than
2538 * 1 byte in size, so we can just fire it off as is.
2540 ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
2541 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
2545 /* Did we get a valid reply? */
2547 /* Now byte swap the necessary fields in the response. */
2548 pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
2549 pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
2550 pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
2551 pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
2552 pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
2553 pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
2554 pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
2555 pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
2556 pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
2561 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2563 * SendIocInit - Send IOCInit request to MPT adapter.
2564 * @ioc: Pointer to MPT_ADAPTER structure
2565 * @sleepFlag: Specifies whether the process can sleep
2567 * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
2569 * Returns 0 for success, non-zero for failure.
2572 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
2575 MPIDefaultReply_t init_reply;
2581 memset(&ioc_init, 0, sizeof(ioc_init));
2582 memset(&init_reply, 0, sizeof(init_reply));
2584 ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
2585 ioc_init.Function = MPI_FUNCTION_IOC_INIT;
2587 /* If we are in a recovery mode and we uploaded the FW image,
2588 * then this pointer is not NULL. Skip the upload a second time.
2589 * Set this flag if cached_fw set for either IOC.
2591 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
2595 ddlprintk((MYIOC_s_INFO_FMT "upload_fw %d facts.Flags=%x\n",
2596 ioc->name, ioc->upload_fw, ioc->facts.Flags));
2598 if(ioc->bus_type == SAS)
2599 ioc_init.MaxDevices = ioc->facts.MaxDevices;
2600 else if(ioc->bus_type == FC)
2601 ioc_init.MaxDevices = MPT_MAX_FC_DEVICES;
2603 ioc_init.MaxDevices = MPT_MAX_SCSI_DEVICES;
2604 ioc_init.MaxBuses = MPT_MAX_BUS;
2605 dinitprintk((MYIOC_s_INFO_FMT "facts.MsgVersion=%x\n",
2606 ioc->name, ioc->facts.MsgVersion));
2607 if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
2608 // set MsgVersion and HeaderVersion host driver was built with
2609 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
2610 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
2612 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
2613 ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
2614 } else if(mpt_host_page_alloc(ioc, &ioc_init))
2617 ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
2619 if (sizeof(dma_addr_t) == sizeof(u64)) {
2620 /* Save the upper 32-bits of the request
2621 * (reply) and sense buffers.
2623 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
2624 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
2626 /* Force 32-bit addressing */
2627 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
2628 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
2631 ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
2632 ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
2633 ioc->facts.MaxDevices = ioc_init.MaxDevices;
2634 ioc->facts.MaxBuses = ioc_init.MaxBuses;
2636 dhsprintk((MYIOC_s_INFO_FMT "Sending IOCInit (req @ %p)\n",
2637 ioc->name, &ioc_init));
2639 r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
2640 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
2642 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
2646 /* No need to byte swap the multibyte fields in the reply
2647 * since we don't even look at it's contents.
2650 dhsprintk((MYIOC_s_INFO_FMT "Sending PortEnable (req @ %p)\n",
2651 ioc->name, &ioc_init));
2653 if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
2654 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
2658 /* YIKES! SUPER IMPORTANT!!!
2659 * Poll IocState until _OPERATIONAL while IOC is doing
2660 * LoopInit and TargetDiscovery!
2663 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
2664 state = mpt_GetIocState(ioc, 1);
2665 while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
2666 if (sleepFlag == CAN_SLEEP) {
2673 printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
2674 ioc->name, (int)((count+5)/HZ));
2678 state = mpt_GetIocState(ioc, 1);
2681 dinitprintk((MYIOC_s_INFO_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n",
2687 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2689 * SendPortEnable - Send PortEnable request to MPT adapter port.
2690 * @ioc: Pointer to MPT_ADAPTER structure
2691 * @portnum: Port number to enable
2692 * @sleepFlag: Specifies whether the process can sleep
2694 * Send PortEnable to bring IOC to OPERATIONAL state.
2696 * Returns 0 for success, non-zero for failure.
2699 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2701 PortEnable_t port_enable;
2702 MPIDefaultReply_t reply_buf;
2707 /* Destination... */
2708 reply_sz = sizeof(MPIDefaultReply_t);
2709 memset(&reply_buf, 0, reply_sz);
2711 req_sz = sizeof(PortEnable_t);
2712 memset(&port_enable, 0, req_sz);
2714 port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
2715 port_enable.PortNumber = portnum;
2716 /* port_enable.ChainOffset = 0; */
2717 /* port_enable.MsgFlags = 0; */
2718 /* port_enable.MsgContext = 0; */
2720 dinitprintk((MYIOC_s_INFO_FMT "Sending Port(%d)Enable (req @ %p)\n",
2721 ioc->name, portnum, &port_enable));
2723 /* RAID FW may take a long time to enable
2725 if (((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
2726 > MPI_FW_HEADER_PID_PROD_TARGET_SCSI) ||
2727 (ioc->bus_type == SAS)) {
2728 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
2729 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
2730 300 /*seconds*/, sleepFlag);
2732 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
2733 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
2734 30 /*seconds*/, sleepFlag);
2740 * ioc: Pointer to MPT_ADAPTER structure
2741 * size - total FW bytes
2744 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
2747 return; /* use already allocated memory */
2748 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2749 ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
2750 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
2752 if ( (ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma) ) )
2753 ioc->alloc_total += size;
2757 * If alt_img is NULL, delete from ioc structure.
2758 * Else, delete a secondary image in same format.
2761 mpt_free_fw_memory(MPT_ADAPTER *ioc)
2765 sz = ioc->facts.FWImageSize;
2766 dinitprintk((KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
2767 ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
2768 pci_free_consistent(ioc->pcidev, sz,
2769 ioc->cached_fw, ioc->cached_fw_dma);
2770 ioc->cached_fw = NULL;
2776 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2778 * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
2779 * @ioc: Pointer to MPT_ADAPTER structure
2780 * @sleepFlag: Specifies whether the process can sleep
2782 * Returns 0 for success, >0 for handshake failure
2783 * <0 for fw upload failure.
2785 * Remark: If bound IOC and a successful FWUpload was performed
2786 * on the bound IOC, the second image is discarded
2787 * and memory is free'd. Both channels must upload to prevent
2788 * IOC from running in degraded mode.
2791 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
2793 u8 request[ioc->req_sz];
2794 u8 reply[sizeof(FWUploadReply_t)];
2795 FWUpload_t *prequest;
2796 FWUploadReply_t *preply;
2797 FWUploadTCSGE_t *ptcsge;
2800 int ii, sz, reply_sz;
2803 /* If the image size is 0, we are done.
2805 if ((sz = ioc->facts.FWImageSize) == 0)
2808 mpt_alloc_fw_memory(ioc, sz);
2810 dinitprintk((KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
2811 ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
2813 if (ioc->cached_fw == NULL) {
2819 prequest = (FWUpload_t *)&request;
2820 preply = (FWUploadReply_t *)&reply;
2822 /* Destination... */
2823 memset(prequest, 0, ioc->req_sz);
2825 reply_sz = sizeof(reply);
2826 memset(preply, 0, reply_sz);
2828 prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
2829 prequest->Function = MPI_FUNCTION_FW_UPLOAD;
2831 ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
2832 ptcsge->DetailsLength = 12;
2833 ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
2834 ptcsge->ImageSize = cpu_to_le32(sz);
2836 sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
2838 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
2839 mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma);
2841 sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
2842 dinitprintk((KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
2843 prequest, sgeoffset));
2844 DBG_DUMP_FW_REQUEST_FRAME(prequest)
2846 ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
2847 reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
2849 dinitprintk((KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii));
2851 cmdStatus = -EFAULT;
2853 /* Handshake transfer was complete and successful.
2854 * Check the Reply Frame.
2856 int status, transfer_sz;
2857 status = le16_to_cpu(preply->IOCStatus);
2858 if (status == MPI_IOCSTATUS_SUCCESS) {
2859 transfer_sz = le32_to_cpu(preply->ActualImageSize);
2860 if (transfer_sz == sz)
2864 dinitprintk((MYIOC_s_INFO_FMT ": do_upload cmdStatus=%d \n",
2865 ioc->name, cmdStatus));
2870 ddlprintk((MYIOC_s_INFO_FMT ": fw upload failed, freeing image \n",
2872 mpt_free_fw_memory(ioc);
2878 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2880 * mpt_downloadboot - DownloadBoot code
2881 * @ioc: Pointer to MPT_ADAPTER structure
2882 * @flag: Specify which part of IOC memory is to be uploaded.
2883 * @sleepFlag: Specifies whether the process can sleep
2885 * FwDownloadBoot requires Programmed IO access.
2887 * Returns 0 for success
2888 * -1 FW Image size is 0
2889 * -2 No valid cached_fw Pointer
2890 * <0 for fw upload failure.
2893 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
2895 MpiExtImageHeader_t *pExtImage;
2905 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
2906 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
2908 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
2909 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
2910 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
2911 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
2912 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
2913 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
2915 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
2918 if (sleepFlag == CAN_SLEEP) {
2924 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
2925 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
2927 for (count = 0; count < 30; count ++) {
2928 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
2929 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
2930 ddlprintk((MYIOC_s_INFO_FMT "RESET_ADAPTER cleared, count=%d\n",
2935 if (sleepFlag == CAN_SLEEP) {
2942 if ( count == 30 ) {
2943 ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! "
2944 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
2945 ioc->name, diag0val));
2949 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
2950 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
2951 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
2952 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
2953 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
2954 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
2956 /* Set the DiagRwEn and Disable ARM bits */
2957 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
2959 fwSize = (pFwHeader->ImageSize + 3)/4;
2960 ptrFw = (u32 *) pFwHeader;
2962 /* Write the LoadStartAddress to the DiagRw Address Register
2963 * using Programmed IO
2965 if (ioc->errata_flag_1064)
2966 pci_enable_io_access(ioc->pcidev);
2968 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
2969 ddlprintk((MYIOC_s_INFO_FMT "LoadStart addr written 0x%x \n",
2970 ioc->name, pFwHeader->LoadStartAddress));
2972 ddlprintk((MYIOC_s_INFO_FMT "Write FW Image: 0x%x bytes @ %p\n",
2973 ioc->name, fwSize*4, ptrFw));
2975 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
2978 nextImage = pFwHeader->NextImageHeaderOffset;
2980 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
2982 load_addr = pExtImage->LoadStartAddress;
2984 fwSize = (pExtImage->ImageSize + 3) >> 2;
2985 ptrFw = (u32 *)pExtImage;
2987 ddlprintk((MYIOC_s_INFO_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
2988 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
2989 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
2992 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
2994 nextImage = pExtImage->NextImageHeaderOffset;
2997 /* Write the IopResetVectorRegAddr */
2998 ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
2999 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3001 /* Write the IopResetVectorValue */
3002 ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3003 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3005 /* Clear the internal flash bad bit - autoincrementing register,
3006 * so must do two writes.
3008 if (ioc->bus_type == SPI) {
3010 * 1030 and 1035 H/W errata, workaround to access
3011 * the ClearFlashBadSignatureBit
3013 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3014 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3015 diagRwData |= 0x40000000;
3016 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3017 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3019 } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3020 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3021 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3022 MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3025 if (sleepFlag == CAN_SLEEP) {
3032 if (ioc->errata_flag_1064)
3033 pci_disable_io_access(ioc->pcidev);
3035 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3036 ddlprintk((MYIOC_s_INFO_FMT "downloadboot diag0val=%x, "
3037 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3038 ioc->name, diag0val));
3039 diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3040 ddlprintk((MYIOC_s_INFO_FMT "downloadboot now diag0val=%x\n",
3041 ioc->name, diag0val));
3042 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3044 /* Write 0xFF to reset the sequencer */
3045 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3047 if (ioc->bus_type == SAS) {
3048 ioc_state = mpt_GetIocState(ioc, 0);
3049 if ( (GetIocFacts(ioc, sleepFlag,
3050 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3051 ddlprintk((MYIOC_s_INFO_FMT "GetIocFacts failed: IocState=%x\n",
3052 ioc->name, ioc_state));
3057 for (count=0; count<HZ*20; count++) {
3058 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3059 ddlprintk((MYIOC_s_INFO_FMT "downloadboot successful! (count=%d) IocState=%x\n",
3060 ioc->name, count, ioc_state));
3061 if (ioc->bus_type == SAS) {
3064 if ((SendIocInit(ioc, sleepFlag)) != 0) {
3065 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit failed\n",
3069 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit successful\n",
3073 if (sleepFlag == CAN_SLEEP) {
3079 ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! IocState=%x\n",
3080 ioc->name, ioc_state));
3084 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3086 * KickStart - Perform hard reset of MPT adapter.
3087 * @ioc: Pointer to MPT_ADAPTER structure
3088 * @force: Force hard reset
3089 * @sleepFlag: Specifies whether the process can sleep
3091 * This routine places MPT adapter in diagnostic mode via the
3092 * WriteSequence register, and then performs a hard reset of adapter
3093 * via the Diagnostic register.
3095 * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
3096 * or NO_SLEEP (interrupt thread, use mdelay)
3097 * force - 1 if doorbell active, board fault state
3098 * board operational, IOC_RECOVERY or
3099 * IOC_BRINGUP and there is an alt_ioc.
3103 * 1 - hard reset, READY
3104 * 0 - no reset due to History bit, READY
3105 * -1 - no reset due to History bit but not READY
3106 * OR reset but failed to come READY
3107 * -2 - no reset, could not enter DIAG mode
3108 * -3 - reset but bad FW bit
3111 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3113 int hard_reset_done = 0;
3117 dinitprintk((KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name));
3118 if (ioc->bus_type == SPI) {
3119 /* Always issue a Msg Unit Reset first. This will clear some
3120 * SCSI bus hang conditions.
3122 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3124 if (sleepFlag == CAN_SLEEP) {
3131 hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3132 if (hard_reset_done < 0)
3133 return hard_reset_done;
3135 dinitprintk((MYIOC_s_INFO_FMT "Diagnostic reset successful!\n",
3138 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
3139 for (cnt=0; cnt<cntdn; cnt++) {
3140 ioc_state = mpt_GetIocState(ioc, 1);
3141 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3142 dinitprintk((MYIOC_s_INFO_FMT "KickStart successful! (cnt=%d)\n",
3144 return hard_reset_done;
3146 if (sleepFlag == CAN_SLEEP) {
3153 printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3154 ioc->name, ioc_state);
3158 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3160 * mpt_diag_reset - Perform hard reset of the adapter.
3161 * @ioc: Pointer to MPT_ADAPTER structure
3162 * @ignore: Set if to honor and clear to ignore
3163 * the reset history bit
3164 * @sleepflag: CAN_SLEEP if called in a non-interrupt thread,
3165 * else set to NO_SLEEP (use mdelay instead)
3167 * This routine places the adapter in diagnostic mode via the
3168 * WriteSequence register and then performs a hard reset of adapter
3169 * via the Diagnostic register. Adapter should be in ready state
3170 * upon successful completion.
3172 * Returns: 1 hard reset successful
3173 * 0 no reset performed because reset history bit set
3174 * -2 enabling diagnostic mode failed
3175 * -3 diagnostic reset failed
3178 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3182 int hard_reset_done = 0;
3188 /* Clear any existing interrupts */
3189 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3191 /* Use "Diagnostic reset" method! (only thing available!) */
3192 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3196 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3197 dprintk((MYIOC_s_INFO_FMT "DbG1: diag0=%08x, diag1=%08x\n",
3198 ioc->name, diag0val, diag1val));
3201 /* Do the reset if we are told to ignore the reset history
3202 * or if the reset history is 0
3204 if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
3205 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3206 /* Write magic sequence to WriteSequence register
3207 * Loop until in diagnostic mode
3209 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3210 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3211 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3212 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3213 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3214 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3217 if (sleepFlag == CAN_SLEEP) {
3225 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3226 ioc->name, diag0val);
3231 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3233 dprintk((MYIOC_s_INFO_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
3234 ioc->name, diag0val));
3239 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3240 dprintk((MYIOC_s_INFO_FMT "DbG2: diag0=%08x, diag1=%08x\n",
3241 ioc->name, diag0val, diag1val));
3244 * Disable the ARM (Bug fix)
3247 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
3251 * Now hit the reset bit in the Diagnostic register
3252 * (THE BIG HAMMER!) (Clears DRWE bit).
3254 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3255 hard_reset_done = 1;
3256 dprintk((MYIOC_s_INFO_FMT "Diagnostic reset performed\n",
3260 * Call each currently registered protocol IOC reset handler
3261 * with pre-reset indication.
3262 * NOTE: If we're doing _IOC_BRINGUP, there can be no
3263 * MptResetHandlers[] registered yet.
3269 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
3270 if (MptResetHandlers[ii]) {
3271 dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n",
3273 r += mpt_signal_reset(ii, ioc, MPT_IOC_PRE_RESET);
3275 dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n",
3276 ioc->name, ioc->alt_ioc->name, ii));
3277 r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_PRE_RESET);
3281 /* FIXME? Examine results here? */
3284 if (ioc->cached_fw) {
3285 /* If the DownloadBoot operation fails, the
3286 * IOC will be left unusable. This is a fatal error
3287 * case. _diag_reset will return < 0
3289 for (count = 0; count < 30; count ++) {
3290 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3291 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3296 if (sleepFlag == CAN_SLEEP) {
3302 if ((count = mpt_downloadboot(ioc,
3303 (MpiFwHeader_t *)ioc->cached_fw, sleepFlag)) < 0) {
3304 printk(KERN_WARNING MYNAM
3305 ": firmware downloadboot failure (%d)!\n", count);
3309 /* Wait for FW to reload and for board
3310 * to go to the READY state.
3311 * Maximum wait is 60 seconds.
3312 * If fail, no error will check again
3313 * with calling program.
3315 for (count = 0; count < 60; count ++) {
3316 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3317 doorbell &= MPI_IOC_STATE_MASK;
3319 if (doorbell == MPI_IOC_STATE_READY) {
3324 if (sleepFlag == CAN_SLEEP) {
3333 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3336 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3337 dprintk((MYIOC_s_INFO_FMT "DbG3: diag0=%08x, diag1=%08x\n",
3338 ioc->name, diag0val, diag1val));
3341 /* Clear RESET_HISTORY bit! Place board in the
3342 * diagnostic mode to update the diag register.
3344 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3346 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3347 /* Write magic sequence to WriteSequence register
3348 * Loop until in diagnostic mode
3350 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3351 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3352 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3353 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3354 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3355 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3358 if (sleepFlag == CAN_SLEEP) {
3366 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3367 ioc->name, diag0val);
3370 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3372 diag0val &= ~MPI_DIAG_RESET_HISTORY;
3373 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3374 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3375 if (diag0val & MPI_DIAG_RESET_HISTORY) {
3376 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
3380 /* Disable Diagnostic Mode
3382 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
3384 /* Check FW reload status flags.
3386 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3387 if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
3388 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
3389 ioc->name, diag0val);
3395 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3396 dprintk((MYIOC_s_INFO_FMT "DbG4: diag0=%08x, diag1=%08x\n",
3397 ioc->name, diag0val, diag1val));
3401 * Reset flag that says we've enabled event notification
3403 ioc->facts.EventState = 0;
3406 ioc->alt_ioc->facts.EventState = 0;
3408 return hard_reset_done;
3411 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3413 * SendIocReset - Send IOCReset request to MPT adapter.
3414 * @ioc: Pointer to MPT_ADAPTER structure
3415 * @reset_type: reset type, expected values are
3416 * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
3418 * Send IOCReset request to the MPT adapter.
3420 * Returns 0 for success, non-zero for failure.
3423 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
3429 drsprintk((KERN_INFO MYNAM ": %s: Sending IOC reset(0x%02x)!\n",
3430 ioc->name, reset_type));
3431 CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
3432 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
3435 /* FW ACK'd request, wait for READY state
3438 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
3440 while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
3444 if (sleepFlag != CAN_SLEEP)
3447 printk(KERN_ERR MYNAM ": %s: ERROR - Wait IOC_READY state timeout(%d)!\n",
3448 ioc->name, (int)((count+5)/HZ));
3452 if (sleepFlag == CAN_SLEEP) {
3455 mdelay (1); /* 1 msec delay */
3460 * Cleanup all event stuff for this IOC; re-issue EventNotification
3461 * request if needed.
3463 if (ioc->facts.Function)
3464 ioc->facts.EventState = 0;
3469 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3471 * initChainBuffers - Allocate memory for and initialize
3472 * chain buffers, chain buffer control arrays and spinlock.
3473 * @hd: Pointer to MPT_SCSI_HOST structure
3474 * @init: If set, initialize the spin lock.
3477 initChainBuffers(MPT_ADAPTER *ioc)
3480 int sz, ii, num_chain;
3481 int scale, num_sge, numSGE;
3483 /* ReqToChain size must equal the req_depth
3486 if (ioc->ReqToChain == NULL) {
3487 sz = ioc->req_depth * sizeof(int);
3488 mem = kmalloc(sz, GFP_ATOMIC);
3492 ioc->ReqToChain = (int *) mem;
3493 dinitprintk((KERN_INFO MYNAM ": %s ReqToChain alloc @ %p, sz=%d bytes\n",
3494 ioc->name, mem, sz));
3495 mem = kmalloc(sz, GFP_ATOMIC);
3499 ioc->RequestNB = (int *) mem;
3500 dinitprintk((KERN_INFO MYNAM ": %s RequestNB alloc @ %p, sz=%d bytes\n",
3501 ioc->name, mem, sz));
3503 for (ii = 0; ii < ioc->req_depth; ii++) {
3504 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
3507 /* ChainToChain size must equal the total number
3508 * of chain buffers to be allocated.
3511 * Calculate the number of chain buffers needed(plus 1) per I/O
3512 * then multiply the the maximum number of simultaneous cmds
3514 * num_sge = num sge in request frame + last chain buffer
3515 * scale = num sge per chain buffer if no chain element
3517 scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
3518 if (sizeof(dma_addr_t) == sizeof(u64))
3519 num_sge = scale + (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
3521 num_sge = 1+ scale + (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
3523 if (sizeof(dma_addr_t) == sizeof(u64)) {
3524 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
3525 (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
3527 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
3528 (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
3530 dinitprintk((KERN_INFO MYNAM ": %s num_sge=%d numSGE=%d\n",
3531 ioc->name, num_sge, numSGE));
3533 if ( numSGE > MPT_SCSI_SG_DEPTH )
3534 numSGE = MPT_SCSI_SG_DEPTH;
3537 while (numSGE - num_sge > 0) {
3539 num_sge += (scale - 1);
3543 dinitprintk((KERN_INFO MYNAM ": %s Now numSGE=%d num_sge=%d num_chain=%d\n",
3544 ioc->name, numSGE, num_sge, num_chain));
3546 if (ioc->bus_type == SPI)
3547 num_chain *= MPT_SCSI_CAN_QUEUE;
3549 num_chain *= MPT_FC_CAN_QUEUE;
3551 ioc->num_chain = num_chain;
3553 sz = num_chain * sizeof(int);
3554 if (ioc->ChainToChain == NULL) {
3555 mem = kmalloc(sz, GFP_ATOMIC);
3559 ioc->ChainToChain = (int *) mem;
3560 dinitprintk((KERN_INFO MYNAM ": %s ChainToChain alloc @ %p, sz=%d bytes\n",
3561 ioc->name, mem, sz));
3563 mem = (u8 *) ioc->ChainToChain;
3565 memset(mem, 0xFF, sz);
3569 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3571 * PrimeIocFifos - Initialize IOC request and reply FIFOs.
3572 * @ioc: Pointer to MPT_ADAPTER structure
3574 * This routine allocates memory for the MPT reply and request frame
3575 * pools (if necessary), and primes the IOC reply FIFO with
3578 * Returns 0 for success, non-zero for failure.
3581 PrimeIocFifos(MPT_ADAPTER *ioc)
3584 unsigned long flags;
3585 dma_addr_t alloc_dma;
3587 int i, reply_sz, sz, total_size, num_chain;
3589 /* Prime reply FIFO... */
3591 if (ioc->reply_frames == NULL) {
3592 if ( (num_chain = initChainBuffers(ioc)) < 0)
3595 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
3596 dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
3597 ioc->name, ioc->reply_sz, ioc->reply_depth));
3598 dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d[%x] bytes\n",
3599 ioc->name, reply_sz, reply_sz));
3601 sz = (ioc->req_sz * ioc->req_depth);
3602 dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d bytes, RequestDepth=%d\n",
3603 ioc->name, ioc->req_sz, ioc->req_depth));
3604 dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d[%x] bytes\n",
3605 ioc->name, sz, sz));
3608 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
3609 dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d bytes, ChainDepth=%d\n",
3610 ioc->name, ioc->req_sz, num_chain));
3611 dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
3612 ioc->name, sz, sz, num_chain));
3615 mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
3617 printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
3622 dinitprintk((KERN_INFO MYNAM ": %s.Total alloc @ %p[%p], sz=%d[%x] bytes\n",
3623 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
3625 memset(mem, 0, total_size);
3626 ioc->alloc_total += total_size;
3628 ioc->alloc_dma = alloc_dma;
3629 ioc->alloc_sz = total_size;
3630 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
3631 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
3633 dinitprintk((KERN_INFO MYNAM ": %s ReplyBuffers @ %p[%p]\n",
3634 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
3636 alloc_dma += reply_sz;
3639 /* Request FIFO - WE manage this! */
3641 ioc->req_frames = (MPT_FRAME_HDR *) mem;
3642 ioc->req_frames_dma = alloc_dma;
3644 dinitprintk((KERN_INFO MYNAM ": %s RequestBuffers @ %p[%p]\n",
3645 ioc->name, mem, (void *)(ulong)alloc_dma));
3647 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
3649 #if defined(CONFIG_MTRR) && 0
3651 * Enable Write Combining MTRR for IOC's memory region.
3652 * (at least as much as we can; "size and base must be
3653 * multiples of 4 kiB"
3655 ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
3657 MTRR_TYPE_WRCOMB, 1);
3658 dprintk((MYIOC_s_INFO_FMT "MTRR region registered (base:size=%08x:%x)\n",
3659 ioc->name, ioc->req_frames_dma, sz));
3662 for (i = 0; i < ioc->req_depth; i++) {
3663 alloc_dma += ioc->req_sz;
3667 ioc->ChainBuffer = mem;
3668 ioc->ChainBufferDMA = alloc_dma;
3670 dinitprintk((KERN_INFO MYNAM " :%s ChainBuffers @ %p(%p)\n",
3671 ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
3673 /* Initialize the free chain Q.
3676 INIT_LIST_HEAD(&ioc->FreeChainQ);
3678 /* Post the chain buffers to the FreeChainQ.
3680 mem = (u8 *)ioc->ChainBuffer;
3681 for (i=0; i < num_chain; i++) {
3682 mf = (MPT_FRAME_HDR *) mem;
3683 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
3687 /* Initialize Request frames linked list
3689 alloc_dma = ioc->req_frames_dma;
3690 mem = (u8 *) ioc->req_frames;
3692 spin_lock_irqsave(&ioc->FreeQlock, flags);
3693 INIT_LIST_HEAD(&ioc->FreeQ);
3694 for (i = 0; i < ioc->req_depth; i++) {
3695 mf = (MPT_FRAME_HDR *) mem;
3697 /* Queue REQUESTs *internally*! */
3698 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
3702 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
3704 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
3705 ioc->sense_buf_pool =
3706 pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
3707 if (ioc->sense_buf_pool == NULL) {
3708 printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
3713 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
3714 ioc->alloc_total += sz;
3715 dinitprintk((KERN_INFO MYNAM ": %s.SenseBuffers @ %p[%p]\n",
3716 ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
3720 /* Post Reply frames to FIFO
3722 alloc_dma = ioc->alloc_dma;
3723 dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffers @ %p[%p]\n",
3724 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
3726 for (i = 0; i < ioc->reply_depth; i++) {
3727 /* Write each address to the IOC! */
3728 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
3729 alloc_dma += ioc->reply_sz;
3735 if (ioc->alloc != NULL) {
3737 pci_free_consistent(ioc->pcidev,
3739 ioc->alloc, ioc->alloc_dma);
3740 ioc->reply_frames = NULL;
3741 ioc->req_frames = NULL;
3742 ioc->alloc_total -= sz;
3744 if (ioc->sense_buf_pool != NULL) {
3745 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
3746 pci_free_consistent(ioc->pcidev,
3748 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
3749 ioc->sense_buf_pool = NULL;
3754 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3756 * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
3757 * from IOC via doorbell handshake method.
3758 * @ioc: Pointer to MPT_ADAPTER structure
3759 * @reqBytes: Size of the request in bytes
3760 * @req: Pointer to MPT request frame
3761 * @replyBytes: Expected size of the reply in bytes
3762 * @u16reply: Pointer to area where reply should be written
3763 * @maxwait: Max wait time for a reply (in seconds)
3764 * @sleepFlag: Specifies whether the process can sleep
3766 * NOTES: It is the callers responsibility to byte-swap fields in the
3767 * request which are greater than 1 byte in size. It is also the
3768 * callers responsibility to byte-swap response fields which are
3769 * greater than 1 byte in size.
3771 * Returns 0 for success, non-zero for failure.
3774 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
3775 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
3777 MPIDefaultReply_t *mptReply;
3782 * Get ready to cache a handshake reply
3784 ioc->hs_reply_idx = 0;
3785 mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
3786 mptReply->MsgLength = 0;
3789 * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
3790 * then tell IOC that we want to handshake a request of N words.
3791 * (WRITE u32val to Doorbell reg).
3793 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3794 CHIPREG_WRITE32(&ioc->chip->Doorbell,
3795 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
3796 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
3799 * Wait for IOC's doorbell handshake int
3801 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
3804 dhsprintk((MYIOC_s_INFO_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
3805 ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
3807 /* Read doorbell and check for active bit */
3808 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
3812 * Clear doorbell int (WRITE 0 to IntStatus reg),
3813 * then wait for IOC to ACKnowledge that it's ready for
3814 * our handshake request.
3816 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3817 if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
3822 u8 *req_as_bytes = (u8 *) req;
3825 * Stuff request words via doorbell handshake,
3826 * with ACK from IOC for each.
3828 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
3829 u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
3830 (req_as_bytes[(ii*4) + 1] << 8) |
3831 (req_as_bytes[(ii*4) + 2] << 16) |
3832 (req_as_bytes[(ii*4) + 3] << 24));
3834 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
3835 if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
3839 dhsprintk((KERN_INFO MYNAM ": Handshake request frame (@%p) header\n", req));
3840 DBG_DUMP_REQUEST_FRAME_HDR(req)
3842 dhsprintk((MYIOC_s_INFO_FMT "HandShake request post done, WaitCnt=%d%s\n",
3843 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
3846 * Wait for completion of doorbell handshake reply from the IOC
3848 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
3851 dhsprintk((MYIOC_s_INFO_FMT "HandShake reply count=%d%s\n",
3852 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
3855 * Copy out the cached reply...
3857 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
3858 u16reply[ii] = ioc->hs_reply[ii];
3866 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3868 * WaitForDoorbellAck - Wait for IOC to clear the IOP_DOORBELL_STATUS bit
3869 * in it's IntStatus register.
3870 * @ioc: Pointer to MPT_ADAPTER structure
3871 * @howlong: How long to wait (in seconds)
3872 * @sleepFlag: Specifies whether the process can sleep
3874 * This routine waits (up to ~2 seconds max) for IOC doorbell
3875 * handshake ACKnowledge.
3877 * Returns a negative value on failure, else wait loop count.
3880 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
3886 cntdn = 1000 * howlong;
3888 if (sleepFlag == CAN_SLEEP) {
3890 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3891 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
3898 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3899 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
3907 dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell ACK (count=%d)\n",
3912 printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
3913 ioc->name, count, intstat);
3917 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3919 * WaitForDoorbellInt - Wait for IOC to set the HIS_DOORBELL_INTERRUPT bit
3920 * in it's IntStatus register.
3921 * @ioc: Pointer to MPT_ADAPTER structure
3922 * @howlong: How long to wait (in seconds)
3923 * @sleepFlag: Specifies whether the process can sleep
3925 * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt.
3927 * Returns a negative value on failure, else wait loop count.
3930 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
3936 cntdn = 1000 * howlong;
3937 if (sleepFlag == CAN_SLEEP) {
3939 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3940 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
3947 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3948 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
3956 dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
3957 ioc->name, count, howlong));
3961 printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
3962 ioc->name, count, intstat);
3966 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3968 * WaitForDoorbellReply - Wait for and capture a IOC handshake reply.
3969 * @ioc: Pointer to MPT_ADAPTER structure
3970 * @howlong: How long to wait (in seconds)
3971 * @sleepFlag: Specifies whether the process can sleep
3973 * This routine polls the IOC for a handshake reply, 16 bits at a time.
3974 * Reply is cached to IOC private area large enough to hold a maximum
3975 * of 128 bytes of reply data.
3977 * Returns a negative value on failure, else size of reply in WORDS.
3980 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
3985 u16 *hs_reply = ioc->hs_reply;
3986 volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
3989 hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
3992 * Get first two u16's so we can look at IOC's intended reply MsgLength
3995 if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
3998 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
3999 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4000 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4003 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4004 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4008 dhsprintk((MYIOC_s_INFO_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4009 ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4010 failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4013 * If no error (and IOC said MsgLength is > 0), piece together
4014 * reply 16 bits at a time.
4016 for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4017 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4019 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4020 /* don't overflow our IOC hs_reply[] buffer! */
4021 if (u16cnt < sizeof(ioc->hs_reply) / sizeof(ioc->hs_reply[0]))
4022 hs_reply[u16cnt] = hword;
4023 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4026 if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4028 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4031 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4036 else if (u16cnt != (2 * mptReply->MsgLength)) {
4039 else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4044 dhsprintk((MYIOC_s_INFO_FMT "Got Handshake reply:\n", ioc->name));
4045 DBG_DUMP_REPLY_FRAME(mptReply)
4047 dhsprintk((MYIOC_s_INFO_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4048 ioc->name, t, u16cnt/2));
4052 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4054 * GetLanConfigPages - Fetch LANConfig pages.
4055 * @ioc: Pointer to MPT_ADAPTER structure
4057 * Return: 0 for success
4058 * -ENOMEM if no memory available
4059 * -EPERM if not allowed due to ISR context
4060 * -EAGAIN if no msg frames currently available
4061 * -EFAULT for non-successful reply or no reply (timeout)
4064 GetLanConfigPages(MPT_ADAPTER *ioc)
4066 ConfigPageHeader_t hdr;
4068 LANPage0_t *ppage0_alloc;
4069 dma_addr_t page0_dma;
4070 LANPage1_t *ppage1_alloc;
4071 dma_addr_t page1_dma;
4076 /* Get LAN Page 0 header */
4077 hdr.PageVersion = 0;
4080 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4081 cfg.cfghdr.hdr = &hdr;
4083 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4088 if ((rc = mpt_config(ioc, &cfg)) != 0)
4091 if (hdr.PageLength > 0) {
4092 data_sz = hdr.PageLength * 4;
4093 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4096 memset((u8 *)ppage0_alloc, 0, data_sz);
4097 cfg.physAddr = page0_dma;
4098 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4100 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4102 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4103 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4107 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4110 * Normalize endianness of structure data,
4111 * by byte-swapping all > 1 byte fields!
4120 /* Get LAN Page 1 header */
4121 hdr.PageVersion = 0;
4124 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4125 cfg.cfghdr.hdr = &hdr;
4127 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4131 if ((rc = mpt_config(ioc, &cfg)) != 0)
4134 if (hdr.PageLength == 0)
4137 data_sz = hdr.PageLength * 4;
4139 ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
4141 memset((u8 *)ppage1_alloc, 0, data_sz);
4142 cfg.physAddr = page1_dma;
4143 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4145 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4147 copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
4148 memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
4151 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
4154 * Normalize endianness of structure data,
4155 * by byte-swapping all > 1 byte fields!
4163 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4165 * mptbase_sas_persist_operation - Perform operation on SAS Persitent Table
4166 * @ioc: Pointer to MPT_ADAPTER structure
4167 * @sas_address: 64bit SAS Address for operation.
4168 * @target_id: specified target for operation
4169 * @bus: specified bus for operation
4170 * @persist_opcode: see below
4172 * MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
4173 * devices not currently present.
4174 * MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
4176 * NOTE: Don't use not this function during interrupt time.
4178 * Returns: 0 for success, non-zero error
4181 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4183 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
4185 SasIoUnitControlRequest_t *sasIoUnitCntrReq;
4186 SasIoUnitControlReply_t *sasIoUnitCntrReply;
4187 MPT_FRAME_HDR *mf = NULL;
4188 MPIHeader_t *mpi_hdr;
4191 /* insure garbage is not sent to fw */
4192 switch(persist_opcode) {
4194 case MPI_SAS_OP_CLEAR_NOT_PRESENT:
4195 case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
4203 printk("%s: persist_opcode=%x\n",__FUNCTION__, persist_opcode);
4205 /* Get a MF for this command.
4207 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
4208 printk("%s: no msg frames!\n",__FUNCTION__);
4212 mpi_hdr = (MPIHeader_t *) mf;
4213 sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
4214 memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
4215 sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
4216 sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
4217 sasIoUnitCntrReq->Operation = persist_opcode;
4219 init_timer(&ioc->persist_timer);
4220 ioc->persist_timer.data = (unsigned long) ioc;
4221 ioc->persist_timer.function = mpt_timer_expired;
4222 ioc->persist_timer.expires = jiffies + HZ*10 /* 10 sec */;
4223 ioc->persist_wait_done=0;
4224 add_timer(&ioc->persist_timer);
4225 mpt_put_msg_frame(mpt_base_index, ioc, mf);
4226 wait_event(mpt_waitq, ioc->persist_wait_done);
4228 sasIoUnitCntrReply =
4229 (SasIoUnitControlReply_t *)ioc->persist_reply_frame;
4230 if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
4231 printk("%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
4233 sasIoUnitCntrReply->IOCStatus,
4234 sasIoUnitCntrReply->IOCLogInfo);
4238 printk("%s: success\n",__FUNCTION__);
4242 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4245 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
4246 MpiEventDataRaid_t * pRaidEventData)
4255 volume = pRaidEventData->VolumeID;
4256 reason = pRaidEventData->ReasonCode;
4257 disk = pRaidEventData->PhysDiskNum;
4258 status = le32_to_cpu(pRaidEventData->SettingsStatus);
4259 flags = (status >> 0) & 0xff;
4260 state = (status >> 8) & 0xff;
4262 if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
4266 if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
4267 reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
4268 (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
4269 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d\n",
4272 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
4277 case MPI_EVENT_RAID_RC_VOLUME_CREATED:
4278 printk(MYIOC_s_INFO_FMT " volume has been created\n",
4282 case MPI_EVENT_RAID_RC_VOLUME_DELETED:
4284 printk(MYIOC_s_INFO_FMT " volume has been deleted\n",
4288 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
4289 printk(MYIOC_s_INFO_FMT " volume settings have been changed\n",
4293 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
4294 printk(MYIOC_s_INFO_FMT " volume is now %s%s%s%s\n",
4296 state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
4298 : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
4300 : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
4303 flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
4305 flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
4306 ? ", quiesced" : "",
4307 flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
4308 ? ", resync in progress" : "" );
4311 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
4312 printk(MYIOC_s_INFO_FMT " volume membership of PhysDisk %d has changed\n",
4316 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
4317 printk(MYIOC_s_INFO_FMT " PhysDisk has been created\n",
4321 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
4322 printk(MYIOC_s_INFO_FMT " PhysDisk has been deleted\n",
4326 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
4327 printk(MYIOC_s_INFO_FMT " PhysDisk settings have been changed\n",
4331 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
4332 printk(MYIOC_s_INFO_FMT " PhysDisk is now %s%s%s\n",
4334 state == MPI_PHYSDISK0_STATUS_ONLINE
4336 : state == MPI_PHYSDISK0_STATUS_MISSING
4338 : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
4340 : state == MPI_PHYSDISK0_STATUS_FAILED
4342 : state == MPI_PHYSDISK0_STATUS_INITIALIZING
4344 : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
4345 ? "offline requested"
4346 : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
4347 ? "failed requested"
4348 : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
4351 flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
4352 ? ", out of sync" : "",
4353 flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
4354 ? ", quiesced" : "" );
4357 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
4358 printk(MYIOC_s_INFO_FMT " Domain Validation needed for PhysDisk %d\n",
4362 case MPI_EVENT_RAID_RC_SMART_DATA:
4363 printk(MYIOC_s_INFO_FMT " SMART data received, ASC/ASCQ = %02xh/%02xh\n",
4364 ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
4367 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
4368 printk(MYIOC_s_INFO_FMT " replacement of PhysDisk %d has started\n",
4374 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4376 * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
4377 * @ioc: Pointer to MPT_ADAPTER structure
4379 * Returns: 0 for success
4380 * -ENOMEM if no memory available
4381 * -EPERM if not allowed due to ISR context
4382 * -EAGAIN if no msg frames currently available
4383 * -EFAULT for non-successful reply or no reply (timeout)
4386 GetIoUnitPage2(MPT_ADAPTER *ioc)
4388 ConfigPageHeader_t hdr;
4390 IOUnitPage2_t *ppage_alloc;
4391 dma_addr_t page_dma;
4395 /* Get the page header */
4396 hdr.PageVersion = 0;
4399 hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
4400 cfg.cfghdr.hdr = &hdr;
4402 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4407 if ((rc = mpt_config(ioc, &cfg)) != 0)
4410 if (hdr.PageLength == 0)
4413 /* Read the config page */
4414 data_sz = hdr.PageLength * 4;
4416 ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
4418 memset((u8 *)ppage_alloc, 0, data_sz);
4419 cfg.physAddr = page_dma;
4420 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4422 /* If Good, save data */
4423 if ((rc = mpt_config(ioc, &cfg)) == 0)
4424 ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
4426 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
4432 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4433 /* mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
4434 * @ioc: Pointer to a Adapter Strucutre
4435 * @portnum: IOC port number
4437 * Return: -EFAULT if read of config page header fails
4439 * If read of SCSI Port Page 0 fails,
4440 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
4441 * Adapter settings: async, narrow
4443 * If read of SCSI Port Page 2 fails,
4444 * Adapter settings valid
4445 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
4450 * CHECK - what type of locking mechanisms should be used????
4453 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
4458 ConfigPageHeader_t header;
4464 if (!ioc->spi_data.nvram) {
4467 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
4468 mem = kmalloc(sz, GFP_ATOMIC);
4472 ioc->spi_data.nvram = (int *) mem;
4474 dprintk((MYIOC_s_INFO_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
4475 ioc->name, ioc->spi_data.nvram, sz));
4478 /* Invalidate NVRAM information
4480 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
4481 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
4484 /* Read SPP0 header, allocate memory, then read page.
4486 header.PageVersion = 0;
4487 header.PageLength = 0;
4488 header.PageNumber = 0;
4489 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
4490 cfg.cfghdr.hdr = &header;
4492 cfg.pageAddr = portnum;
4493 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4495 cfg.timeout = 0; /* use default */
4496 if (mpt_config(ioc, &cfg) != 0)
4499 if (header.PageLength > 0) {
4500 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
4502 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4503 cfg.physAddr = buf_dma;
4504 if (mpt_config(ioc, &cfg) != 0) {
4505 ioc->spi_data.maxBusWidth = MPT_NARROW;
4506 ioc->spi_data.maxSyncOffset = 0;
4507 ioc->spi_data.minSyncFactor = MPT_ASYNC;
4508 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
4510 ddvprintk((MYIOC_s_INFO_FMT "Unable to read PortPage0 minSyncFactor=%x\n",
4511 ioc->name, ioc->spi_data.minSyncFactor));
4513 /* Save the Port Page 0 data
4515 SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
4516 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
4517 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
4519 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
4520 ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
4521 ddvprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n",
4522 ioc->name, pPP0->Capabilities));
4524 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
4525 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
4527 ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
4528 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
4529 ioc->spi_data.minSyncFactor = (u8) (data >> 8);
4530 ddvprintk((MYIOC_s_INFO_FMT "PortPage0 minSyncFactor=%x\n",
4531 ioc->name, ioc->spi_data.minSyncFactor));
4533 ioc->spi_data.maxSyncOffset = 0;
4534 ioc->spi_data.minSyncFactor = MPT_ASYNC;
4537 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
4539 /* Update the minSyncFactor based on bus type.
4541 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
4542 (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
4544 if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
4545 ioc->spi_data.minSyncFactor = MPT_ULTRA;
4546 ddvprintk((MYIOC_s_INFO_FMT "HVD or SE detected, minSyncFactor=%x\n",
4547 ioc->name, ioc->spi_data.minSyncFactor));
4552 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
4557 /* SCSI Port Page 2 - Read the header then the page.
4559 header.PageVersion = 0;
4560 header.PageLength = 0;
4561 header.PageNumber = 2;
4562 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
4563 cfg.cfghdr.hdr = &header;
4565 cfg.pageAddr = portnum;
4566 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4568 if (mpt_config(ioc, &cfg) != 0)
4571 if (header.PageLength > 0) {
4572 /* Allocate memory and read SCSI Port Page 2
4574 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
4576 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
4577 cfg.physAddr = buf_dma;
4578 if (mpt_config(ioc, &cfg) != 0) {
4579 /* Nvram data is left with INVALID mark
4583 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
4584 MpiDeviceInfo_t *pdevice = NULL;
4587 * Save "Set to Avoid SCSI Bus Resets" flag
4589 ioc->spi_data.bus_reset =
4590 (le32_to_cpu(pPP2->PortFlags) &
4591 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
4594 /* Save the Port Page 2 data
4595 * (reformat into a 32bit quantity)
4597 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
4598 ioc->spi_data.PortFlags = data;
4599 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
4600 pdevice = &pPP2->DeviceSettings[ii];
4601 data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
4602 (pdevice->SyncFactor << 8) | pdevice->Timeout;
4603 ioc->spi_data.nvram[ii] = data;
4607 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
4611 /* Update Adapter limits with those from NVRAM
4612 * Comment: Don't need to do this. Target performance
4613 * parameters will never exceed the adapters limits.
4619 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4620 /* mpt_readScsiDevicePageHeaders - save version and length of SDP1
4621 * @ioc: Pointer to a Adapter Strucutre
4622 * @portnum: IOC port number
4624 * Return: -EFAULT if read of config page header fails
4628 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
4631 ConfigPageHeader_t header;
4633 /* Read the SCSI Device Page 1 header
4635 header.PageVersion = 0;
4636 header.PageLength = 0;
4637 header.PageNumber = 1;
4638 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
4639 cfg.cfghdr.hdr = &header;
4641 cfg.pageAddr = portnum;
4642 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4645 if (mpt_config(ioc, &cfg) != 0)
4648 ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
4649 ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
4651 header.PageVersion = 0;
4652 header.PageLength = 0;
4653 header.PageNumber = 0;
4654 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
4655 if (mpt_config(ioc, &cfg) != 0)
4658 ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
4659 ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
4661 dcprintk((MYIOC_s_INFO_FMT "Headers: 0: version %d length %d\n",
4662 ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
4664 dcprintk((MYIOC_s_INFO_FMT "Headers: 1: version %d length %d\n",
4665 ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
4669 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4671 * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
4672 * @ioc: Pointer to a Adapter Strucutre
4673 * @portnum: IOC port number
4677 * -EFAULT if read of config page header fails or data pointer not NULL
4678 * -ENOMEM if pci_alloc failed
4681 mpt_findImVolumes(MPT_ADAPTER *ioc)
4685 ConfigPageIoc2RaidVol_t *pIocRv;
4686 dma_addr_t ioc2_dma;
4688 ConfigPageHeader_t header;
4695 /* Read IOCP2 header then the page.
4697 header.PageVersion = 0;
4698 header.PageLength = 0;
4699 header.PageNumber = 2;
4700 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4701 cfg.cfghdr.hdr = &header;
4704 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4707 if (mpt_config(ioc, &cfg) != 0)
4710 if (header.PageLength == 0)
4713 iocpage2sz = header.PageLength * 4;
4714 pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
4718 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4719 cfg.physAddr = ioc2_dma;
4720 if (mpt_config(ioc, &cfg) != 0)
4723 if ( (mem = (u8 *)ioc->raid_data.pIocPg2) == NULL ) {
4724 mem = kmalloc(iocpage2sz, GFP_ATOMIC);
4726 ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
4731 memcpy(mem, (u8 *)pIoc2, iocpage2sz);
4733 /* Identify RAID Volume Id's */
4734 nVols = pIoc2->NumActiveVolumes;
4740 /* At least 1 RAID Volume
4742 pIocRv = pIoc2->RaidVolume;
4743 ioc->raid_data.isRaid = 0;
4744 for (jj = 0; jj < nVols; jj++, pIocRv++) {
4745 vid = pIocRv->VolumeID;
4746 vbus = pIocRv->VolumeBus;
4747 vioc = pIocRv->VolumeIOC;
4752 ioc->raid_data.isRaid |= (1 << vid);
4754 /* Error! Always bus 0
4760 /* Identify Hidden Physical Disk Id's */
4761 nPhys = pIoc2->NumActivePhysDisks;
4763 /* No physical disks.
4766 mpt_read_ioc_pg_3(ioc);
4770 pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
4776 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
4781 ConfigPageHeader_t header;
4782 dma_addr_t ioc3_dma;
4785 /* Free the old page
4787 kfree(ioc->raid_data.pIocPg3);
4788 ioc->raid_data.pIocPg3 = NULL;
4790 /* There is at least one physical disk.
4791 * Read and save IOC Page 3
4793 header.PageVersion = 0;
4794 header.PageLength = 0;
4795 header.PageNumber = 3;
4796 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4797 cfg.cfghdr.hdr = &header;
4800 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4803 if (mpt_config(ioc, &cfg) != 0)
4806 if (header.PageLength == 0)
4809 /* Read Header good, alloc memory
4811 iocpage3sz = header.PageLength * 4;
4812 pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
4816 /* Read the Page and save the data
4817 * into malloc'd memory.
4819 cfg.physAddr = ioc3_dma;
4820 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4821 if (mpt_config(ioc, &cfg) == 0) {
4822 mem = kmalloc(iocpage3sz, GFP_ATOMIC);
4824 memcpy(mem, (u8 *)pIoc3, iocpage3sz);
4825 ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
4829 pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
4835 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
4839 ConfigPageHeader_t header;
4840 dma_addr_t ioc4_dma;
4843 /* Read and save IOC Page 4
4845 header.PageVersion = 0;
4846 header.PageLength = 0;
4847 header.PageNumber = 4;
4848 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4849 cfg.cfghdr.hdr = &header;
4852 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4855 if (mpt_config(ioc, &cfg) != 0)
4858 if (header.PageLength == 0)
4861 if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
4862 iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
4863 pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
4867 ioc4_dma = ioc->spi_data.IocPg4_dma;
4868 iocpage4sz = ioc->spi_data.IocPg4Sz;
4871 /* Read the Page into dma memory.
4873 cfg.physAddr = ioc4_dma;
4874 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4875 if (mpt_config(ioc, &cfg) == 0) {
4876 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
4877 ioc->spi_data.IocPg4_dma = ioc4_dma;
4878 ioc->spi_data.IocPg4Sz = iocpage4sz;
4880 pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
4881 ioc->spi_data.pIocPg4 = NULL;
4886 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
4890 ConfigPageHeader_t header;
4891 dma_addr_t ioc1_dma;
4895 /* Check the Coalescing Timeout in IOC Page 1
4897 header.PageVersion = 0;
4898 header.PageLength = 0;
4899 header.PageNumber = 1;
4900 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4901 cfg.cfghdr.hdr = &header;
4904 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4907 if (mpt_config(ioc, &cfg) != 0)
4910 if (header.PageLength == 0)
4913 /* Read Header good, alloc memory
4915 iocpage1sz = header.PageLength * 4;
4916 pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
4920 /* Read the Page and check coalescing timeout
4922 cfg.physAddr = ioc1_dma;
4923 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4924 if (mpt_config(ioc, &cfg) == 0) {
4926 tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
4927 if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
4928 tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
4930 dprintk((MYIOC_s_INFO_FMT "Coalescing Enabled Timeout = %d\n",
4933 if (tmp > MPT_COALESCING_TIMEOUT) {
4934 pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
4936 /* Write NVRAM and current
4939 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
4940 if (mpt_config(ioc, &cfg) == 0) {
4941 dprintk((MYIOC_s_INFO_FMT "Reset Current Coalescing Timeout to = %d\n",
4942 ioc->name, MPT_COALESCING_TIMEOUT));
4944 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
4945 if (mpt_config(ioc, &cfg) == 0) {
4946 dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout to = %d\n",
4947 ioc->name, MPT_COALESCING_TIMEOUT));
4949 dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout Failed\n",
4954 dprintk((MYIOC_s_WARN_FMT "Reset of Current Coalescing Timeout Failed!\n",
4960 dprintk((MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
4964 pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
4969 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4971 * SendEventNotification - Send EventNotification (on or off) request
4973 * @ioc: Pointer to MPT_ADAPTER structure
4974 * @EvSwitch: Event switch flags
4977 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch)
4979 EventNotification_t *evnp;
4981 evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc);
4983 devtverboseprintk((MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n",
4987 memset(evnp, 0, sizeof(*evnp));
4989 devtverboseprintk((MYIOC_s_INFO_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp));
4991 evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
4992 evnp->ChainOffset = 0;
4994 evnp->Switch = EvSwitch;
4996 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)evnp);
5001 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5003 * SendEventAck - Send EventAck request to MPT adapter.
5004 * @ioc: Pointer to MPT_ADAPTER structure
5005 * @evnp: Pointer to original EventNotification request
5008 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
5012 if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5013 printk(MYIOC_s_WARN_FMT "Unable to allocate event ACK "
5014 "request frame for Event=%x EventContext=%x EventData=%x!\n",
5015 ioc->name, evnp->Event, le32_to_cpu(evnp->EventContext),
5016 le32_to_cpu(evnp->Data[0]));
5019 memset(pAck, 0, sizeof(*pAck));
5021 dprintk((MYIOC_s_INFO_FMT "Sending EventAck\n", ioc->name));
5023 pAck->Function = MPI_FUNCTION_EVENT_ACK;
5024 pAck->ChainOffset = 0;
5026 pAck->Event = evnp->Event;
5027 pAck->EventContext = evnp->EventContext;
5029 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
5034 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5036 * mpt_config - Generic function to issue config message
5037 * @ioc - Pointer to an adapter structure
5038 * @cfg - Pointer to a configuration structure. Struct contains
5039 * action, page address, direction, physical address
5040 * and pointer to a configuration page header
5041 * Page header is updated.
5043 * Returns 0 for success
5044 * -EPERM if not allowed due to ISR context
5045 * -EAGAIN if no msg frames currently available
5046 * -EFAULT for non-successful reply or no reply (timeout)
5049 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
5052 ConfigExtendedPageHeader_t *pExtHdr = NULL;
5054 unsigned long flags;
5059 /* Prevent calling wait_event() (below), if caller happens
5060 * to be in ISR context, because that is fatal!
5062 in_isr = in_interrupt();
5064 dcprintk((MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
5069 /* Get and Populate a free Frame
5071 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5072 dcprintk((MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n",
5076 pReq = (Config_t *)mf;
5077 pReq->Action = pCfg->action;
5079 pReq->ChainOffset = 0;
5080 pReq->Function = MPI_FUNCTION_CONFIG;
5082 /* Assume page type is not extended and clear "reserved" fields. */
5083 pReq->ExtPageLength = 0;
5084 pReq->ExtPageType = 0;
5087 for (ii=0; ii < 8; ii++)
5088 pReq->Reserved2[ii] = 0;
5090 pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
5091 pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
5092 pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
5093 pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
5095 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
5096 pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
5097 pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
5098 pReq->ExtPageType = pExtHdr->ExtPageType;
5099 pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
5101 /* Page Length must be treated as a reserved field for the extended header. */
5102 pReq->Header.PageLength = 0;
5105 pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
5107 /* Add a SGE to the config request.
5110 flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
5112 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
5114 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
5115 flagsLength |= pExtHdr->ExtPageLength * 4;
5117 dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
5118 ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action));
5121 flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
5123 dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
5124 ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action));
5127 mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
5129 /* Append pCfg pointer to end of mf
5131 *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
5133 /* Initalize the timer
5135 init_timer(&pCfg->timer);
5136 pCfg->timer.data = (unsigned long) ioc;
5137 pCfg->timer.function = mpt_timer_expired;
5138 pCfg->wait_done = 0;
5140 /* Set the timer; ensure 10 second minimum */
5141 if (pCfg->timeout < 10)
5142 pCfg->timer.expires = jiffies + HZ*10;
5144 pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
5146 /* Add to end of Q, set timer and then issue this command */
5147 spin_lock_irqsave(&ioc->FreeQlock, flags);
5148 list_add_tail(&pCfg->linkage, &ioc->configQ);
5149 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5151 add_timer(&pCfg->timer);
5152 mpt_put_msg_frame(mpt_base_index, ioc, mf);
5153 wait_event(mpt_waitq, pCfg->wait_done);
5155 /* mf has been freed - do not access */
5162 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5164 * mpt_timer_expired - Call back for timer process.
5165 * Used only internal config functionality.
5166 * @data: Pointer to MPT_SCSI_HOST recast as an unsigned long
5169 mpt_timer_expired(unsigned long data)
5171 MPT_ADAPTER *ioc = (MPT_ADAPTER *) data;
5173 dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired! \n", ioc->name));
5175 /* Perform a FW reload */
5176 if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0)
5177 printk(MYIOC_s_WARN_FMT "Firmware Reload FAILED!\n", ioc->name);
5179 /* No more processing.
5180 * Hard reset clean-up will wake up
5181 * process and free all resources.
5183 dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired complete!\n", ioc->name));
5188 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5190 * mpt_ioc_reset - Base cleanup for hard reset
5191 * @ioc: Pointer to the adapter structure
5192 * @reset_phase: Indicates pre- or post-reset functionality
5194 * Remark: Free's resources with internally generated commands.
5197 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
5200 unsigned long flags;
5202 dprintk((KERN_WARNING MYNAM
5203 ": IOC %s_reset routed to MPT base driver!\n",
5204 reset_phase==MPT_IOC_SETUP_RESET ? "setup" : (
5205 reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post")));
5207 if (reset_phase == MPT_IOC_SETUP_RESET) {
5209 } else if (reset_phase == MPT_IOC_PRE_RESET) {
5210 /* If the internal config Q is not empty -
5211 * delete timer. MF resources will be freed when
5212 * the FIFO's are primed.
5214 spin_lock_irqsave(&ioc->FreeQlock, flags);
5215 list_for_each_entry(pCfg, &ioc->configQ, linkage)
5216 del_timer(&pCfg->timer);
5217 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5222 /* Search the configQ for internal commands.
5223 * Flush the Q, and wake up all suspended threads.
5225 spin_lock_irqsave(&ioc->FreeQlock, flags);
5226 list_for_each_entry_safe(pCfg, pNext, &ioc->configQ, linkage) {
5227 list_del(&pCfg->linkage);
5229 pCfg->status = MPT_CONFIG_ERROR;
5230 pCfg->wait_done = 1;
5231 wake_up(&mpt_waitq);
5233 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5236 return 1; /* currently means nothing really */
5240 #ifdef CONFIG_PROC_FS /* { */
5241 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5243 * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
5245 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5247 * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
5249 * Returns 0 for success, non-zero for failure.
5252 procmpt_create(void)
5254 struct proc_dir_entry *ent;
5256 mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
5257 if (mpt_proc_root_dir == NULL)
5260 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, mpt_proc_root_dir);
5262 ent->read_proc = procmpt_summary_read;
5264 ent = create_proc_entry("version", S_IFREG|S_IRUGO, mpt_proc_root_dir);
5266 ent->read_proc = procmpt_version_read;
5271 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5273 * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
5275 * Returns 0 for success, non-zero for failure.
5278 procmpt_destroy(void)
5280 remove_proc_entry("version", mpt_proc_root_dir);
5281 remove_proc_entry("summary", mpt_proc_root_dir);
5282 remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
5285 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5287 * procmpt_summary_read - Handle read request from /proc/mpt/summary
5288 * or from /proc/mpt/iocN/summary.
5289 * @buf: Pointer to area to write information
5290 * @start: Pointer to start pointer
5291 * @offset: Offset to start writing
5293 * @eof: Pointer to EOF integer
5296 * Returns number of characters written to process performing the read.
5299 procmpt_summary_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5309 mpt_print_ioc_summary(ioc, out, &more, 0, 1);
5313 list_for_each_entry(ioc, &ioc_list, list) {
5316 mpt_print_ioc_summary(ioc, out, &more, 0, 1);
5319 if ((out-buf) >= request)
5326 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
5329 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5331 * procmpt_version_read - Handle read request from /proc/mpt/version.
5332 * @buf: Pointer to area to write information
5333 * @start: Pointer to start pointer
5334 * @offset: Offset to start writing
5336 * @eof: Pointer to EOF integer
5339 * Returns number of characters written to process performing the read.
5342 procmpt_version_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5345 int scsi, fc, sas, lan, ctl, targ, dmp;
5349 len = sprintf(buf, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
5350 len += sprintf(buf+len, " Fusion MPT base driver\n");
5352 scsi = fc = sas = lan = ctl = targ = dmp = 0;
5353 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
5355 if (MptCallbacks[ii]) {
5356 switch (MptDriverClass[ii]) {
5358 if (!scsi++) drvname = "SPI host";
5361 if (!fc++) drvname = "FC host";
5364 if (!sas++) drvname = "SAS host";
5367 if (!lan++) drvname = "LAN";
5370 if (!targ++) drvname = "SCSI target";
5373 if (!ctl++) drvname = "ioctl";
5378 len += sprintf(buf+len, " Fusion MPT %s driver\n", drvname);
5382 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
5385 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5387 * procmpt_iocinfo_read - Handle read request from /proc/mpt/iocN/info.
5388 * @buf: Pointer to area to write information
5389 * @start: Pointer to start pointer
5390 * @offset: Offset to start writing
5392 * @eof: Pointer to EOF integer
5395 * Returns number of characters written to process performing the read.
5398 procmpt_iocinfo_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5400 MPT_ADAPTER *ioc = data;
5406 mpt_get_fw_exp_ver(expVer, ioc);
5408 len = sprintf(buf, "%s:", ioc->name);
5409 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
5410 len += sprintf(buf+len, " (f/w download boot flag set)");
5411 // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
5412 // len += sprintf(buf+len, " CONFIG_CHECKSUM_FAIL!");
5414 len += sprintf(buf+len, "\n ProductID = 0x%04x (%s)\n",
5415 ioc->facts.ProductID,
5417 len += sprintf(buf+len, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
5418 if (ioc->facts.FWImageSize)
5419 len += sprintf(buf+len, " (fw_size=%d)", ioc->facts.FWImageSize);
5420 len += sprintf(buf+len, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
5421 len += sprintf(buf+len, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
5422 len += sprintf(buf+len, " EventState = 0x%02x\n", ioc->facts.EventState);
5424 len += sprintf(buf+len, " CurrentHostMfaHighAddr = 0x%08x\n",
5425 ioc->facts.CurrentHostMfaHighAddr);
5426 len += sprintf(buf+len, " CurrentSenseBufferHighAddr = 0x%08x\n",
5427 ioc->facts.CurrentSenseBufferHighAddr);
5429 len += sprintf(buf+len, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
5430 len += sprintf(buf+len, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
5432 len += sprintf(buf+len, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
5433 (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
5435 * Rounding UP to nearest 4-kB boundary here...
5437 sz = (ioc->req_sz * ioc->req_depth) + 128;
5438 sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
5439 len += sprintf(buf+len, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
5440 ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
5441 len += sprintf(buf+len, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
5442 4*ioc->facts.RequestFrameSize,
5443 ioc->facts.GlobalCredits);
5445 len += sprintf(buf+len, " Frames @ 0x%p (Dma @ 0x%p)\n",
5446 (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
5447 sz = (ioc->reply_sz * ioc->reply_depth) + 128;
5448 len += sprintf(buf+len, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
5449 ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
5450 len += sprintf(buf+len, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
5451 ioc->facts.CurReplyFrameSize,
5452 ioc->facts.ReplyQueueDepth);
5454 len += sprintf(buf+len, " MaxDevices = %d\n",
5455 (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
5456 len += sprintf(buf+len, " MaxBuses = %d\n", ioc->facts.MaxBuses);
5459 for (p=0; p < ioc->facts.NumberOfPorts; p++) {
5460 len += sprintf(buf+len, " PortNumber = %d (of %d)\n",
5462 ioc->facts.NumberOfPorts);
5463 if (ioc->bus_type == FC) {
5464 if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
5465 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
5466 len += sprintf(buf+len, " LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
5467 a[5], a[4], a[3], a[2], a[1], a[0]);
5469 len += sprintf(buf+len, " WWN = %08X%08X:%08X%08X\n",
5470 ioc->fc_port_page0[p].WWNN.High,
5471 ioc->fc_port_page0[p].WWNN.Low,
5472 ioc->fc_port_page0[p].WWPN.High,
5473 ioc->fc_port_page0[p].WWPN.Low);
5477 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
5480 #endif /* CONFIG_PROC_FS } */
5482 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5484 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
5487 if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
5488 sprintf(buf, " (Exp %02d%02d)",
5489 (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
5490 (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
5493 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
5494 strcat(buf, " [MDBG]");
5498 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5500 * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
5501 * @ioc: Pointer to MPT_ADAPTER structure
5502 * @buffer: Pointer to buffer where IOC summary info should be written
5503 * @size: Pointer to number of bytes we wrote (set by this routine)
5504 * @len: Offset at which to start writing in buffer
5505 * @showlan: Display LAN stuff?
5507 * This routine writes (english readable) ASCII text, which represents
5508 * a summary of IOC information, to a buffer.
5511 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
5516 mpt_get_fw_exp_ver(expVer, ioc);
5519 * Shorter summary of attached ioc's...
5521 y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
5524 MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
5525 ioc->facts.FWVersion.Word,
5527 ioc->facts.NumberOfPorts,
5530 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
5531 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
5532 y += sprintf(buffer+len+y, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
5533 a[5], a[4], a[3], a[2], a[1], a[0]);
5536 y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
5539 y += sprintf(buffer+len+y, " (disabled)");
5541 y += sprintf(buffer+len+y, "\n");
5546 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5550 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5552 * mpt_HardResetHandler - Generic reset handler, issue SCSI Task
5553 * Management call based on input arg values. If TaskMgmt fails,
5554 * return associated SCSI request.
5555 * @ioc: Pointer to MPT_ADAPTER structure
5556 * @sleepFlag: Indicates if sleep or schedule must be called.
5558 * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
5559 * or a non-interrupt thread. In the former, must not call schedule().
5561 * Remark: A return of -1 is a FATAL error case, as it means a
5562 * FW reload/initialization failed.
5564 * Returns 0 for SUCCESS or -1 if FAILED.
5567 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
5570 unsigned long flags;
5572 dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name));
5574 printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
5575 printk("MF count 0x%x !\n", ioc->mfcnt);
5578 /* Reset the adapter. Prevent more than 1 call to
5579 * mpt_do_ioc_recovery at any instant in time.
5581 spin_lock_irqsave(&ioc->diagLock, flags);
5582 if ((ioc->diagPending) || (ioc->alt_ioc && ioc->alt_ioc->diagPending)){
5583 spin_unlock_irqrestore(&ioc->diagLock, flags);
5586 ioc->diagPending = 1;
5588 spin_unlock_irqrestore(&ioc->diagLock, flags);
5590 /* FIXME: If do_ioc_recovery fails, repeat....
5593 /* The SCSI driver needs to adjust timeouts on all current
5594 * commands prior to the diagnostic reset being issued.
5595 * Prevents timeouts occuring during a diagnostic reset...very bad.
5596 * For all other protocol drivers, this is a no-op.
5602 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
5603 if (MptResetHandlers[ii]) {
5604 dtmprintk((MYIOC_s_INFO_FMT "Calling IOC reset_setup handler #%d\n",
5606 r += mpt_signal_reset(ii, ioc, MPT_IOC_SETUP_RESET);
5608 dtmprintk((MYIOC_s_INFO_FMT "Calling alt-%s setup reset handler #%d\n",
5609 ioc->name, ioc->alt_ioc->name, ii));
5610 r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_SETUP_RESET);
5616 if ((rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag)) != 0) {
5617 printk(KERN_WARNING MYNAM ": WARNING - (%d) Cannot recover %s\n",
5622 ioc->alt_ioc->reload_fw = 0;
5624 spin_lock_irqsave(&ioc->diagLock, flags);
5625 ioc->diagPending = 0;
5627 ioc->alt_ioc->diagPending = 0;
5628 spin_unlock_irqrestore(&ioc->diagLock, flags);
5630 dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler rc = %d!\n", ioc->name, rc));
5635 # define EVENT_DESCR_STR_SZ 100
5637 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5639 EventDescriptionStr(u8 event, u32 evData0, char *evStr)
5644 case MPI_EVENT_NONE:
5647 case MPI_EVENT_LOG_DATA:
5650 case MPI_EVENT_STATE_CHANGE:
5651 ds = "State Change";
5653 case MPI_EVENT_UNIT_ATTENTION:
5654 ds = "Unit Attention";
5656 case MPI_EVENT_IOC_BUS_RESET:
5657 ds = "IOC Bus Reset";
5659 case MPI_EVENT_EXT_BUS_RESET:
5660 ds = "External Bus Reset";
5662 case MPI_EVENT_RESCAN:
5663 ds = "Bus Rescan Event";
5664 /* Ok, do we need to do anything here? As far as
5665 I can tell, this is when a new device gets added
5668 case MPI_EVENT_LINK_STATUS_CHANGE:
5669 if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
5670 ds = "Link Status(FAILURE) Change";
5672 ds = "Link Status(ACTIVE) Change";
5674 case MPI_EVENT_LOOP_STATE_CHANGE:
5675 if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
5676 ds = "Loop State(LIP) Change";
5677 else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
5678 ds = "Loop State(LPE) Change"; /* ??? */
5680 ds = "Loop State(LPB) Change"; /* ??? */
5682 case MPI_EVENT_LOGOUT:
5685 case MPI_EVENT_EVENT_CHANGE:
5687 ds = "Events(ON) Change";
5689 ds = "Events(OFF) Change";
5691 case MPI_EVENT_INTEGRATED_RAID:
5693 u8 ReasonCode = (u8)(evData0 >> 16);
5694 switch (ReasonCode) {
5695 case MPI_EVENT_RAID_RC_VOLUME_CREATED :
5696 ds = "Integrated Raid: Volume Created";
5698 case MPI_EVENT_RAID_RC_VOLUME_DELETED :
5699 ds = "Integrated Raid: Volume Deleted";
5701 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
5702 ds = "Integrated Raid: Volume Settings Changed";
5704 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
5705 ds = "Integrated Raid: Volume Status Changed";
5707 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
5708 ds = "Integrated Raid: Volume Physdisk Changed";
5710 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
5711 ds = "Integrated Raid: Physdisk Created";
5713 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
5714 ds = "Integrated Raid: Physdisk Deleted";
5716 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
5717 ds = "Integrated Raid: Physdisk Settings Changed";
5719 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
5720 ds = "Integrated Raid: Physdisk Status Changed";
5722 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
5723 ds = "Integrated Raid: Domain Validation Needed";
5725 case MPI_EVENT_RAID_RC_SMART_DATA :
5726 ds = "Integrated Raid; Smart Data";
5728 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
5729 ds = "Integrated Raid: Replace Action Started";
5732 ds = "Integrated Raid";
5737 case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
5738 ds = "SCSI Device Status Change";
5740 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
5742 u8 id = (u8)(evData0);
5743 u8 ReasonCode = (u8)(evData0 >> 16);
5744 switch (ReasonCode) {
5745 case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
5746 snprintf(evStr, EVENT_DESCR_STR_SZ,
5747 "SAS Device Status Change: Added: id=%d", id);
5749 case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
5750 snprintf(evStr, EVENT_DESCR_STR_SZ,
5751 "SAS Device Status Change: Deleted: id=%d", id);
5753 case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
5754 snprintf(evStr, EVENT_DESCR_STR_SZ,
5755 "SAS Device Status Change: SMART Data: id=%d",
5758 case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
5759 snprintf(evStr, EVENT_DESCR_STR_SZ,
5760 "SAS Device Status Change: No Persistancy "
5761 "Added: id=%d", id);
5764 snprintf(evStr, EVENT_DESCR_STR_SZ,
5765 "SAS Device Status Change: Unknown: id=%d", id);
5770 case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
5771 ds = "Bus Timer Expired";
5773 case MPI_EVENT_QUEUE_FULL:
5776 case MPI_EVENT_SAS_SES:
5777 ds = "SAS SES Event";
5779 case MPI_EVENT_PERSISTENT_TABLE_FULL:
5780 ds = "Persistent Table Full";
5782 case MPI_EVENT_SAS_PHY_LINK_STATUS:
5784 u8 LinkRates = (u8)(evData0 >> 8);
5785 u8 PhyNumber = (u8)(evData0);
5786 LinkRates = (LinkRates & MPI_EVENT_SAS_PLS_LR_CURRENT_MASK) >>
5787 MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT;
5788 switch (LinkRates) {
5789 case MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN:
5790 snprintf(evStr, EVENT_DESCR_STR_SZ,
5791 "SAS PHY Link Status: Phy=%d:"
5792 " Rate Unknown",PhyNumber);
5794 case MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED:
5795 snprintf(evStr, EVENT_DESCR_STR_SZ,
5796 "SAS PHY Link Status: Phy=%d:"
5797 " Phy Disabled",PhyNumber);
5799 case MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION:
5800 snprintf(evStr, EVENT_DESCR_STR_SZ,
5801 "SAS PHY Link Status: Phy=%d:"
5802 " Failed Speed Nego",PhyNumber);
5804 case MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE:
5805 snprintf(evStr, EVENT_DESCR_STR_SZ,
5806 "SAS PHY Link Status: Phy=%d:"
5807 " Sata OOB Completed",PhyNumber);
5809 case MPI_EVENT_SAS_PLS_LR_RATE_1_5:
5810 snprintf(evStr, EVENT_DESCR_STR_SZ,
5811 "SAS PHY Link Status: Phy=%d:"
5812 " Rate 1.5 Gbps",PhyNumber);
5814 case MPI_EVENT_SAS_PLS_LR_RATE_3_0:
5815 snprintf(evStr, EVENT_DESCR_STR_SZ,
5816 "SAS PHY Link Status: Phy=%d:"
5817 " Rate 3.0 Gpbs",PhyNumber);
5820 snprintf(evStr, EVENT_DESCR_STR_SZ,
5821 "SAS PHY Link Status: Phy=%d", PhyNumber);
5826 case MPI_EVENT_SAS_DISCOVERY_ERROR:
5827 ds = "SAS Discovery Error";
5829 case MPI_EVENT_IR_RESYNC_UPDATE:
5831 u8 resync_complete = (u8)(evData0 >> 16);
5832 snprintf(evStr, EVENT_DESCR_STR_SZ,
5833 "IR Resync Update: Complete = %d:",resync_complete);
5838 u8 ReasonCode = (u8)(evData0 >> 16);
5839 switch (ReasonCode) {
5840 case MPI_EVENT_IR2_RC_LD_STATE_CHANGED:
5841 ds = "IR2: LD State Changed";
5843 case MPI_EVENT_IR2_RC_PD_STATE_CHANGED:
5844 ds = "IR2: PD State Changed";
5846 case MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL:
5847 ds = "IR2: Bad Block Table Full";
5849 case MPI_EVENT_IR2_RC_PD_INSERTED:
5850 ds = "IR2: PD Inserted";
5852 case MPI_EVENT_IR2_RC_PD_REMOVED:
5853 ds = "IR2: PD Removed";
5855 case MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED:
5856 ds = "IR2: Foreign CFG Detected";
5858 case MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR:
5859 ds = "IR2: Rebuild Medium Error";
5867 case MPI_EVENT_SAS_DISCOVERY:
5870 ds = "SAS Discovery: Start";
5872 ds = "SAS Discovery: Stop";
5875 case MPI_EVENT_LOG_ENTRY_ADDED:
5876 ds = "SAS Log Entry Added";
5880 * MPT base "custom" events may be added here...
5887 strncpy(evStr, ds, EVENT_DESCR_STR_SZ);
5890 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5892 * ProcessEventNotification - Route a received EventNotificationReply to
5893 * all currently regeistered event handlers.
5894 * @ioc: Pointer to MPT_ADAPTER structure
5895 * @pEventReply: Pointer to EventNotification reply frame
5896 * @evHandlers: Pointer to integer, number of event handlers
5898 * Returns sum of event handlers return values.
5901 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
5909 char evStr[EVENT_DESCR_STR_SZ];
5913 * Do platform normalization of values
5915 event = le32_to_cpu(pEventReply->Event) & 0xFF;
5916 // evCtx = le32_to_cpu(pEventReply->EventContext);
5917 evDataLen = le16_to_cpu(pEventReply->EventDataLength);
5919 evData0 = le32_to_cpu(pEventReply->Data[0]);
5922 EventDescriptionStr(event, evData0, evStr);
5923 devtprintk((MYIOC_s_INFO_FMT "MPT event:(%02Xh) : %s\n",
5928 #if defined(MPT_DEBUG) || defined(MPT_DEBUG_VERBOSE_EVENTS)
5929 printk(KERN_INFO MYNAM ": Event data:\n" KERN_INFO);
5930 for (ii = 0; ii < evDataLen; ii++)
5931 printk(" %08x", le32_to_cpu(pEventReply->Data[ii]));
5936 * Do general / base driver event processing
5939 case MPI_EVENT_EVENT_CHANGE: /* 0A */
5941 u8 evState = evData0 & 0xFF;
5943 /* CHECKME! What if evState unexpectedly says OFF (0)? */
5945 /* Update EventState field in cached IocFacts */
5946 if (ioc->facts.Function) {
5947 ioc->facts.EventState = evState;
5951 case MPI_EVENT_INTEGRATED_RAID:
5952 mptbase_raid_process_event_data(ioc,
5953 (MpiEventDataRaid_t *)pEventReply->Data);
5960 * Should this event be logged? Events are written sequentially.
5961 * When buffer is full, start again at the top.
5963 if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
5966 idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
5968 ioc->events[idx].event = event;
5969 ioc->events[idx].eventContext = ioc->eventContext;
5971 for (ii = 0; ii < 2; ii++) {
5973 ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
5975 ioc->events[idx].data[ii] = 0;
5978 ioc->eventContext++;
5983 * Call each currently registered protocol event handler.
5985 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
5986 if (MptEvHandlers[ii]) {
5987 devtverboseprintk((MYIOC_s_INFO_FMT "Routing Event to event handler #%d\n",
5989 r += (*(MptEvHandlers[ii]))(ioc, pEventReply);
5993 /* FIXME? Examine results here? */
5996 * If needed, send (a single) EventAck.
5998 if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
5999 devtverboseprintk((MYIOC_s_WARN_FMT
6000 "EventAck required\n",ioc->name));
6001 if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
6002 devtverboseprintk((MYIOC_s_WARN_FMT "SendEventAck returned %d\n",
6007 *evHandlers = handlers;
6011 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6013 * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
6014 * @ioc: Pointer to MPT_ADAPTER structure
6015 * @log_info: U32 LogInfo reply word from the IOC
6017 * Refer to lsi/fc_log.h.
6020 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
6022 static char *subcl_str[8] = {
6023 "FCP Initiator", "FCP Target", "LAN", "MPI Message Layer",
6024 "FC Link", "Context Manager", "Invalid Field Offset", "State Change Info"
6026 u8 subcl = (log_info >> 24) & 0x7;
6028 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubCl={%s}\n",
6029 ioc->name, log_info, subcl_str[subcl]);
6032 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6034 * mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
6035 * @ioc: Pointer to MPT_ADAPTER structure
6036 * @mr: Pointer to MPT reply frame
6037 * @log_info: U32 LogInfo word from the IOC
6039 * Refer to lsi/sp_log.h.
6042 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
6044 u32 info = log_info & 0x00FF0000;
6045 char *desc = "unknown";
6049 desc = "bug! MID not found";
6050 if (ioc->reload_fw == 0)
6055 desc = "Parity Error";
6059 desc = "ASYNC Outbound Overrun";
6063 desc = "SYNC Offset Error";
6071 desc = "Msg In Overflow";
6079 desc = "Outbound DMA Overrun";
6083 desc = "Task Management";
6087 desc = "Device Problem";
6091 desc = "Invalid Phase Change";
6095 desc = "Untagged Table Size";
6100 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
6103 /* strings for sas loginfo */
6104 static char *originator_str[] = {
6109 static char *iop_code_str[] = {
6111 "Invalid SAS Address", /* 01h */
6113 "Invalid Page", /* 03h */
6115 "Task Terminated" /* 05h */
6117 static char *pl_code_str[] = {
6119 "Open Failure", /* 01h */
6120 "Invalid Scatter Gather List", /* 02h */
6121 "Wrong Relative Offset or Frame Length", /* 03h */
6122 "Frame Transfer Error", /* 04h */
6123 "Transmit Frame Connected Low", /* 05h */
6124 "SATA Non-NCQ RW Error Bit Set", /* 06h */
6125 "SATA Read Log Receive Data Error", /* 07h */
6126 "SATA NCQ Fail All Commands After Error", /* 08h */
6127 "SATA Error in Receive Set Device Bit FIS", /* 09h */
6128 "Receive Frame Invalid Message", /* 0Ah */
6129 "Receive Context Message Valid Error", /* 0Bh */
6130 "Receive Frame Current Frame Error", /* 0Ch */
6131 "SATA Link Down", /* 0Dh */
6132 "Discovery SATA Init W IOS", /* 0Eh */
6133 "Config Invalid Page", /* 0Fh */
6134 "Discovery SATA Init Timeout", /* 10h */
6137 "IO Not Yet Executed", /* 13h */
6138 "IO Executed", /* 14h */
6139 "Persistant Reservation Out Not Affiliation Owner", /* 15h */
6140 "Open Transmit DMA Abort", /* 16h */
6150 "Enclosure Management" /* 20h */
6153 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6155 * mpt_sas_log_info - Log information returned from SAS IOC.
6156 * @ioc: Pointer to MPT_ADAPTER structure
6157 * @log_info: U32 LogInfo reply word from the IOC
6159 * Refer to lsi/mpi_log_sas.h.
6162 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info)
6164 union loginfo_type {
6173 union loginfo_type sas_loginfo;
6174 char *code_desc = NULL;
6176 sas_loginfo.loginfo = log_info;
6177 if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
6178 (sas_loginfo.dw.originator < sizeof(originator_str)/sizeof(char*)))
6180 if ((sas_loginfo.dw.originator == 0 /*IOP*/) &&
6181 (sas_loginfo.dw.code < sizeof(iop_code_str)/sizeof(char*))) {
6182 code_desc = iop_code_str[sas_loginfo.dw.code];
6183 }else if ((sas_loginfo.dw.originator == 1 /*PL*/) &&
6184 (sas_loginfo.dw.code < sizeof(pl_code_str)/sizeof(char*) )) {
6185 code_desc = pl_code_str[sas_loginfo.dw.code];
6188 if (code_desc != NULL)
6189 printk(MYIOC_s_INFO_FMT
6190 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
6191 " SubCode(0x%04x)\n",
6194 originator_str[sas_loginfo.dw.originator],
6196 sas_loginfo.dw.subcode);
6198 printk(MYIOC_s_INFO_FMT
6199 "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
6200 " SubCode(0x%04x)\n",
6203 originator_str[sas_loginfo.dw.originator],
6204 sas_loginfo.dw.code,
6205 sas_loginfo.dw.subcode);
6208 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6210 * mpt_sp_ioc_info - IOC information returned from SCSI Parallel IOC.
6211 * @ioc: Pointer to MPT_ADAPTER structure
6212 * @ioc_status: U32 IOCStatus word from IOC
6213 * @mf: Pointer to MPT request frame
6215 * Refer to lsi/mpi.h.
6218 mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
6220 u32 status = ioc_status & MPI_IOCSTATUS_MASK;
6224 case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
6225 desc = "Invalid Function";
6228 case MPI_IOCSTATUS_BUSY: /* 0x0002 */
6232 case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
6233 desc = "Invalid SGL";
6236 case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
6237 desc = "Internal Error";
6240 case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
6244 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
6245 desc = "Insufficient Resources";
6248 case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
6249 desc = "Invalid Field";
6252 case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
6253 desc = "Invalid State";
6256 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
6257 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
6258 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
6259 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
6260 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
6261 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
6262 /* No message for Config IOCStatus values */
6265 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
6266 /* No message for recovered error
6267 desc = "SCSI Recovered Error";
6271 case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
6272 desc = "SCSI Invalid Bus";
6275 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
6276 desc = "SCSI Invalid TargetID";
6279 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
6281 SCSIIORequest_t *pScsiReq = (SCSIIORequest_t *) mf;
6282 U8 cdb = pScsiReq->CDB[0];
6283 if (cdb != 0x12) { /* Inquiry is issued for device scanning */
6284 desc = "SCSI Device Not There";
6289 case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
6290 desc = "SCSI Data Overrun";
6293 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
6294 /* This error is checked in scsi_io_done(). Skip.
6295 desc = "SCSI Data Underrun";
6299 case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
6300 desc = "SCSI I/O Data Error";
6303 case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
6304 desc = "SCSI Protocol Error";
6307 case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
6308 desc = "SCSI Task Terminated";
6311 case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
6312 desc = "SCSI Residual Mismatch";
6315 case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
6316 desc = "SCSI Task Management Failed";
6319 case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
6320 desc = "SCSI IOC Terminated";
6323 case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
6324 desc = "SCSI Ext Terminated";
6332 printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04x): %s\n", ioc->name, status, desc);
6335 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6336 EXPORT_SYMBOL(mpt_attach);
6337 EXPORT_SYMBOL(mpt_detach);
6339 EXPORT_SYMBOL(mpt_resume);
6340 EXPORT_SYMBOL(mpt_suspend);
6342 EXPORT_SYMBOL(ioc_list);
6343 EXPORT_SYMBOL(mpt_proc_root_dir);
6344 EXPORT_SYMBOL(mpt_register);
6345 EXPORT_SYMBOL(mpt_deregister);
6346 EXPORT_SYMBOL(mpt_event_register);
6347 EXPORT_SYMBOL(mpt_event_deregister);
6348 EXPORT_SYMBOL(mpt_reset_register);
6349 EXPORT_SYMBOL(mpt_reset_deregister);
6350 EXPORT_SYMBOL(mpt_device_driver_register);
6351 EXPORT_SYMBOL(mpt_device_driver_deregister);
6352 EXPORT_SYMBOL(mpt_get_msg_frame);
6353 EXPORT_SYMBOL(mpt_put_msg_frame);
6354 EXPORT_SYMBOL(mpt_free_msg_frame);
6355 EXPORT_SYMBOL(mpt_add_sge);
6356 EXPORT_SYMBOL(mpt_send_handshake_request);
6357 EXPORT_SYMBOL(mpt_verify_adapter);
6358 EXPORT_SYMBOL(mpt_GetIocState);
6359 EXPORT_SYMBOL(mpt_print_ioc_summary);
6360 EXPORT_SYMBOL(mpt_lan_index);
6361 EXPORT_SYMBOL(mpt_stm_index);
6362 EXPORT_SYMBOL(mpt_HardResetHandler);
6363 EXPORT_SYMBOL(mpt_config);
6364 EXPORT_SYMBOL(mpt_findImVolumes);
6365 EXPORT_SYMBOL(mpt_alloc_fw_memory);
6366 EXPORT_SYMBOL(mpt_free_fw_memory);
6367 EXPORT_SYMBOL(mptbase_sas_persist_operation);
6370 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6372 * fusion_init - Fusion MPT base driver initialization routine.
6374 * Returns 0 for success, non-zero for failure.
6381 show_mptmod_ver(my_NAME, my_VERSION);
6382 printk(KERN_INFO COPYRIGHT "\n");
6384 for (i = 0; i < MPT_MAX_PROTOCOL_DRIVERS; i++) {
6385 MptCallbacks[i] = NULL;
6386 MptDriverClass[i] = MPTUNKNOWN_DRIVER;
6387 MptEvHandlers[i] = NULL;
6388 MptResetHandlers[i] = NULL;
6391 /* Register ourselves (mptbase) in order to facilitate
6392 * EventNotification handling.
6394 mpt_base_index = mpt_register(mpt_base_reply, MPTBASE_DRIVER);
6396 /* Register for hard reset handling callbacks.
6398 if (mpt_reset_register(mpt_base_index, mpt_ioc_reset) == 0) {
6399 dprintk((KERN_INFO MYNAM ": Register for IOC reset notification\n"));
6404 #ifdef CONFIG_PROC_FS
6405 (void) procmpt_create();
6410 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6412 * fusion_exit - Perform driver unload cleanup.
6414 * This routine frees all resources associated with each MPT adapter
6415 * and removes all %MPT_PROCFS_MPTBASEDIR entries.
6421 dexitprintk((KERN_INFO MYNAM ": fusion_exit() called!\n"));
6423 mpt_reset_deregister(mpt_base_index);
6425 #ifdef CONFIG_PROC_FS
6430 module_init(fusion_init);
6431 module_exit(fusion_exit);