2 * linux/drivers/serial/pmac_zilog.c
4 * Driver for PowerMac Z85c30 based ESCC cell found in the
5 * "macio" ASICs of various PowerMac models
7 * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
9 * Derived from drivers/macintosh/macserial.c by Paul Mackerras
10 * and drivers/serial/sunzilog.c by David S. Miller
12 * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
13 * adapted special tweaks needed for us. I don't think it's worth
14 * merging back those though. The DMA code still has to get in
15 * and once done, I expect that driver to remain fairly stable in
16 * the long term, unless we change the driver model again...
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 * 2004-08-06 Harald Welte <laforge@gnumonks.org>
33 * - Enable BREAK interrupt
34 * - Add support for sysreq
36 * TODO: - Add DMA support
37 * - Defer port shutdown to a few seconds after close
38 * - maybe put something right into uap->clk_divisor
43 #undef USE_CTRL_O_SYSRQ
45 #include <linux/module.h>
46 #include <linux/tty.h>
48 #include <linux/tty_flip.h>
49 #include <linux/major.h>
50 #include <linux/string.h>
51 #include <linux/fcntl.h>
53 #include <linux/kernel.h>
54 #include <linux/delay.h>
55 #include <linux/init.h>
56 #include <linux/console.h>
57 #include <linux/slab.h>
58 #include <linux/adb.h>
59 #include <linux/pmu.h>
60 #include <linux/bitops.h>
61 #include <linux/sysrq.h>
62 #include <linux/mutex.h>
63 #include <asm/sections.h>
67 #include <asm/machdep.h>
68 #include <asm/pmac_feature.h>
69 #include <asm/dbdma.h>
70 #include <asm/macio.h>
72 #if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
76 #include <linux/serial.h>
77 #include <linux/serial_core.h>
79 #include "pmac_zilog.h"
81 /* Not yet implemented */
84 static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
85 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
86 MODULE_DESCRIPTION("Driver for the PowerMac serial ports.");
87 MODULE_LICENSE("GPL");
89 #define PWRDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
91 #ifdef CONFIG_SERIAL_PMACZILOG_TTYS
92 #define PMACZILOG_MAJOR TTY_MAJOR
93 #define PMACZILOG_MINOR 64
94 #define PMACZILOG_NAME "ttyS"
96 #define PMACZILOG_MAJOR 204
97 #define PMACZILOG_MINOR 192
98 #define PMACZILOG_NAME "ttyPZ"
103 * For the sake of early serial console, we can do a pre-probe
104 * (optional) of the ports at rather early boot time.
106 static struct uart_pmac_port pmz_ports[MAX_ZS_PORTS];
107 static int pmz_ports_count;
108 static DEFINE_MUTEX(pmz_irq_mutex);
110 static struct uart_driver pmz_uart_reg = {
111 .owner = THIS_MODULE,
112 .driver_name = PMACZILOG_NAME,
113 .dev_name = PMACZILOG_NAME,
114 .major = PMACZILOG_MAJOR,
115 .minor = PMACZILOG_MINOR,
120 * Load all registers to reprogram the port
121 * This function must only be called when the TX is not busy. The UART
122 * port lock must be held and local interrupts disabled.
124 static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
128 if (ZS_IS_ASLEEP(uap))
131 /* Let pending transmits finish. */
132 for (i = 0; i < 1000; i++) {
133 unsigned char stat = read_zsreg(uap, R1);
145 /* Disable all interrupts. */
147 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
149 /* Set parity, sync config, stop bits, and clock divisor. */
150 write_zsreg(uap, R4, regs[R4]);
152 /* Set misc. TX/RX control bits. */
153 write_zsreg(uap, R10, regs[R10]);
155 /* Set TX/RX controls sans the enable bits. */
156 write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
157 write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
159 /* now set R7 "prime" on ESCC */
160 write_zsreg(uap, R15, regs[R15] | EN85C30);
161 write_zsreg(uap, R7, regs[R7P]);
163 /* make sure we use R7 "non-prime" on ESCC */
164 write_zsreg(uap, R15, regs[R15] & ~EN85C30);
166 /* Synchronous mode config. */
167 write_zsreg(uap, R6, regs[R6]);
168 write_zsreg(uap, R7, regs[R7]);
170 /* Disable baud generator. */
171 write_zsreg(uap, R14, regs[R14] & ~BRENAB);
173 /* Clock mode control. */
174 write_zsreg(uap, R11, regs[R11]);
176 /* Lower and upper byte of baud rate generator divisor. */
177 write_zsreg(uap, R12, regs[R12]);
178 write_zsreg(uap, R13, regs[R13]);
180 /* Now rewrite R14, with BRENAB (if set). */
181 write_zsreg(uap, R14, regs[R14]);
183 /* Reset external status interrupts. */
184 write_zsreg(uap, R0, RES_EXT_INT);
185 write_zsreg(uap, R0, RES_EXT_INT);
187 /* Rewrite R3/R5, this time without enables masked. */
188 write_zsreg(uap, R3, regs[R3]);
189 write_zsreg(uap, R5, regs[R5]);
191 /* Rewrite R1, this time without IRQ enabled masked. */
192 write_zsreg(uap, R1, regs[R1]);
194 /* Enable interrupts */
195 write_zsreg(uap, R9, regs[R9]);
199 * We do like sunzilog to avoid disrupting pending Tx
200 * Reprogram the Zilog channel HW registers with the copies found in the
201 * software state struct. If the transmitter is busy, we defer this update
202 * until the next TX complete interrupt. Else, we do it right now.
204 * The UART port lock must be held and local interrupts disabled.
206 static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
208 if (!ZS_REGS_HELD(uap)) {
209 if (ZS_TX_ACTIVE(uap)) {
210 uap->flags |= PMACZILOG_FLAG_REGS_HELD;
212 pmz_debug("pmz: maybe_update_regs: updating\n");
213 pmz_load_zsregs(uap, uap->curregs);
218 static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
220 struct tty_struct *tty = NULL;
221 unsigned char ch, r1, drop, error, flag;
224 /* The interrupt can be enabled when the port isn't open, typically
225 * that happens when using one port is open and the other closed (stale
226 * interrupt) or when one port is used as a console.
228 if (!ZS_IS_OPEN(uap)) {
229 pmz_debug("pmz: draining input\n");
230 /* Port is closed, drain input data */
232 if ((++loops) > 1000)
234 (void)read_zsreg(uap, R1);
235 write_zsreg(uap, R0, ERR_RES);
236 (void)read_zsdata(uap);
237 ch = read_zsreg(uap, R0);
238 if (!(ch & Rx_CH_AV))
244 /* Sanity check, make sure the old bug is no longer happening */
245 if (uap->port.info == NULL || uap->port.info->port.tty == NULL) {
247 (void)read_zsdata(uap);
250 tty = uap->port.info->port.tty;
256 r1 = read_zsreg(uap, R1);
257 ch = read_zsdata(uap);
259 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
260 write_zsreg(uap, R0, ERR_RES);
264 ch &= uap->parity_mask;
265 if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) {
266 uap->flags &= ~PMACZILOG_FLAG_BREAK;
269 #if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
270 #ifdef USE_CTRL_O_SYSRQ
271 /* Handle the SysRq ^O Hack */
273 uap->port.sysrq = jiffies + HZ*5;
276 #endif /* USE_CTRL_O_SYSRQ */
277 if (uap->port.sysrq) {
279 spin_unlock(&uap->port.lock);
280 swallow = uart_handle_sysrq_char(&uap->port, ch);
281 spin_lock(&uap->port.lock);
285 #endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
287 /* A real serial line, record the character and status. */
292 uap->port.icount.rx++;
294 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) {
297 pmz_debug("pmz: got break !\n");
298 r1 &= ~(PAR_ERR | CRC_ERR);
299 uap->port.icount.brk++;
300 if (uart_handle_break(&uap->port))
303 else if (r1 & PAR_ERR)
304 uap->port.icount.parity++;
305 else if (r1 & CRC_ERR)
306 uap->port.icount.frame++;
308 uap->port.icount.overrun++;
309 r1 &= uap->port.read_status_mask;
312 else if (r1 & PAR_ERR)
314 else if (r1 & CRC_ERR)
318 if (uap->port.ignore_status_mask == 0xff ||
319 (r1 & uap->port.ignore_status_mask) == 0) {
320 tty_insert_flip_char(tty, ch, flag);
323 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
325 /* We can get stuck in an infinite loop getting char 0 when the
326 * line is in a wrong HW state, we break that here.
327 * When that happens, I disable the receive side of the driver.
328 * Note that what I've been experiencing is a real irq loop where
329 * I'm getting flooded regardless of the actual port speed.
330 * Something stange is going on with the HW
332 if ((++loops) > 1000)
334 ch = read_zsreg(uap, R0);
335 if (!(ch & Rx_CH_AV))
341 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
342 write_zsreg(uap, R1, uap->curregs[R1]);
344 dev_err(&uap->dev->ofdev.dev, "pmz: rx irq flood !\n");
348 static void pmz_status_handle(struct uart_pmac_port *uap)
350 unsigned char status;
352 status = read_zsreg(uap, R0);
353 write_zsreg(uap, R0, RES_EXT_INT);
356 if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) {
357 if (status & SYNC_HUNT)
358 uap->port.icount.dsr++;
360 /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
361 * But it does not tell us which bit has changed, we have to keep
362 * track of this ourselves.
363 * The CTS input is inverted for some reason. -- paulus
365 if ((status ^ uap->prev_status) & DCD)
366 uart_handle_dcd_change(&uap->port,
368 if ((status ^ uap->prev_status) & CTS)
369 uart_handle_cts_change(&uap->port,
372 wake_up_interruptible(&uap->port.info->delta_msr_wait);
375 if (status & BRK_ABRT)
376 uap->flags |= PMACZILOG_FLAG_BREAK;
378 uap->prev_status = status;
381 static void pmz_transmit_chars(struct uart_pmac_port *uap)
383 struct circ_buf *xmit;
385 if (ZS_IS_ASLEEP(uap))
387 if (ZS_IS_CONS(uap)) {
388 unsigned char status = read_zsreg(uap, R0);
390 /* TX still busy? Just wait for the next TX done interrupt.
392 * It can occur because of how we do serial console writes. It would
393 * be nice to transmit console writes just like we normally would for
394 * a TTY line. (ie. buffered and TX interrupt driven). That is not
395 * easy because console writes cannot sleep. One solution might be
396 * to poll on enough port->xmit space becomming free. -DaveM
398 if (!(status & Tx_BUF_EMP))
402 uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE;
404 if (ZS_REGS_HELD(uap)) {
405 pmz_load_zsregs(uap, uap->curregs);
406 uap->flags &= ~PMACZILOG_FLAG_REGS_HELD;
409 if (ZS_TX_STOPPED(uap)) {
410 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
414 if (uap->port.x_char) {
415 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
416 write_zsdata(uap, uap->port.x_char);
418 uap->port.icount.tx++;
419 uap->port.x_char = 0;
423 if (uap->port.info == NULL)
425 xmit = &uap->port.info->xmit;
426 if (uart_circ_empty(xmit)) {
427 uart_write_wakeup(&uap->port);
430 if (uart_tx_stopped(&uap->port))
433 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
434 write_zsdata(uap, xmit->buf[xmit->tail]);
437 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
438 uap->port.icount.tx++;
440 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
441 uart_write_wakeup(&uap->port);
446 write_zsreg(uap, R0, RES_Tx_P);
450 /* Hrm... we register that twice, fixme later.... */
451 static irqreturn_t pmz_interrupt(int irq, void *dev_id)
453 struct uart_pmac_port *uap = dev_id;
454 struct uart_pmac_port *uap_a;
455 struct uart_pmac_port *uap_b;
457 struct tty_struct *tty;
460 uap_a = pmz_get_port_A(uap);
463 spin_lock(&uap_a->port.lock);
464 r3 = read_zsreg(uap_a, R3);
467 pmz_debug("irq, r3: %x\n", r3);
471 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
472 write_zsreg(uap_a, R0, RES_H_IUS);
475 pmz_status_handle(uap_a);
477 tty = pmz_receive_chars(uap_a);
479 pmz_transmit_chars(uap_a);
482 spin_unlock(&uap_a->port.lock);
484 tty_flip_buffer_push(tty);
486 if (uap_b->node == NULL)
489 spin_lock(&uap_b->port.lock);
491 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
492 write_zsreg(uap_b, R0, RES_H_IUS);
495 pmz_status_handle(uap_b);
497 tty = pmz_receive_chars(uap_b);
499 pmz_transmit_chars(uap_b);
502 spin_unlock(&uap_b->port.lock);
504 tty_flip_buffer_push(tty);
508 pmz_debug("irq done.\n");
514 * Peek the status register, lock not held by caller
516 static inline u8 pmz_peek_status(struct uart_pmac_port *uap)
521 spin_lock_irqsave(&uap->port.lock, flags);
522 status = read_zsreg(uap, R0);
523 spin_unlock_irqrestore(&uap->port.lock, flags);
529 * Check if transmitter is empty
530 * The port lock is not held.
532 static unsigned int pmz_tx_empty(struct uart_port *port)
534 struct uart_pmac_port *uap = to_pmz(port);
535 unsigned char status;
537 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
540 status = pmz_peek_status(to_pmz(port));
541 if (status & Tx_BUF_EMP)
547 * Set Modem Control (RTS & DTR) bits
548 * The port lock is held and interrupts are disabled.
549 * Note: Shall we really filter out RTS on external ports or
550 * should that be dealt at higher level only ?
552 static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl)
554 struct uart_pmac_port *uap = to_pmz(port);
555 unsigned char set_bits, clear_bits;
557 /* Do nothing for irda for now... */
560 /* We get called during boot with a port not up yet */
561 if (ZS_IS_ASLEEP(uap) ||
562 !(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)))
565 set_bits = clear_bits = 0;
567 if (ZS_IS_INTMODEM(uap)) {
568 if (mctrl & TIOCM_RTS)
573 if (mctrl & TIOCM_DTR)
578 /* NOTE: Not subject to 'transmitter active' rule. */
579 uap->curregs[R5] |= set_bits;
580 uap->curregs[R5] &= ~clear_bits;
581 if (ZS_IS_ASLEEP(uap))
583 write_zsreg(uap, R5, uap->curregs[R5]);
584 pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
585 set_bits, clear_bits, uap->curregs[R5]);
590 * Get Modem Control bits (only the input ones, the core will
591 * or that with a cached value of the control ones)
592 * The port lock is held and interrupts are disabled.
594 static unsigned int pmz_get_mctrl(struct uart_port *port)
596 struct uart_pmac_port *uap = to_pmz(port);
597 unsigned char status;
600 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
603 status = read_zsreg(uap, R0);
608 if (status & SYNC_HUNT)
617 * Stop TX side. Dealt like sunzilog at next Tx interrupt,
618 * though for DMA, we will have to do a bit more.
619 * The port lock is held and interrupts are disabled.
621 static void pmz_stop_tx(struct uart_port *port)
623 to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
628 * The port lock is held and interrupts are disabled.
630 static void pmz_start_tx(struct uart_port *port)
632 struct uart_pmac_port *uap = to_pmz(port);
633 unsigned char status;
635 pmz_debug("pmz: start_tx()\n");
637 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
638 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
640 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
643 status = read_zsreg(uap, R0);
645 /* TX busy? Just wait for the TX done interrupt. */
646 if (!(status & Tx_BUF_EMP))
649 /* Send the first character to jump-start the TX done
650 * IRQ sending engine.
653 write_zsdata(uap, port->x_char);
658 struct circ_buf *xmit = &port->info->xmit;
660 write_zsdata(uap, xmit->buf[xmit->tail]);
662 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
665 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
666 uart_write_wakeup(&uap->port);
668 pmz_debug("pmz: start_tx() done.\n");
672 * Stop Rx side, basically disable emitting of
673 * Rx interrupts on the port. We don't disable the rx
674 * side of the chip proper though
675 * The port lock is held.
677 static void pmz_stop_rx(struct uart_port *port)
679 struct uart_pmac_port *uap = to_pmz(port);
681 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
684 pmz_debug("pmz: stop_rx()()\n");
686 /* Disable all RX interrupts. */
687 uap->curregs[R1] &= ~RxINT_MASK;
688 pmz_maybe_update_regs(uap);
690 pmz_debug("pmz: stop_rx() done.\n");
694 * Enable modem status change interrupts
695 * The port lock is held.
697 static void pmz_enable_ms(struct uart_port *port)
699 struct uart_pmac_port *uap = to_pmz(port);
700 unsigned char new_reg;
702 if (ZS_IS_IRDA(uap) || uap->node == NULL)
704 new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
705 if (new_reg != uap->curregs[R15]) {
706 uap->curregs[R15] = new_reg;
708 if (ZS_IS_ASLEEP(uap))
710 /* NOTE: Not subject to 'transmitter active' rule. */
711 write_zsreg(uap, R15, uap->curregs[R15]);
716 * Control break state emission
717 * The port lock is not held.
719 static void pmz_break_ctl(struct uart_port *port, int break_state)
721 struct uart_pmac_port *uap = to_pmz(port);
722 unsigned char set_bits, clear_bits, new_reg;
725 if (uap->node == NULL)
727 set_bits = clear_bits = 0;
732 clear_bits |= SND_BRK;
734 spin_lock_irqsave(&port->lock, flags);
736 new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
737 if (new_reg != uap->curregs[R5]) {
738 uap->curregs[R5] = new_reg;
740 /* NOTE: Not subject to 'transmitter active' rule. */
741 if (ZS_IS_ASLEEP(uap))
743 write_zsreg(uap, R5, uap->curregs[R5]);
746 spin_unlock_irqrestore(&port->lock, flags);
750 * Turn power on or off to the SCC and associated stuff
751 * (port drivers, modem, IR port, etc.)
752 * Returns the number of milliseconds we should wait before
753 * trying to use the port.
755 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
761 rc = pmac_call_feature(
762 PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1);
763 pmz_debug("port power on result: %d\n", rc);
764 if (ZS_IS_INTMODEM(uap)) {
765 rc = pmac_call_feature(
766 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1);
767 delay = 2500; /* wait for 2.5s before using */
768 pmz_debug("modem power result: %d\n", rc);
771 /* TODO: Make that depend on a timer, don't power down
774 if (ZS_IS_INTMODEM(uap)) {
775 rc = pmac_call_feature(
776 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0);
777 pmz_debug("port power off result: %d\n", rc);
779 pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0);
785 * FixZeroBug....Works around a bug in the SCC receving channel.
786 * Inspired from Darwin code, 15 Sept. 2000 -DanM
788 * The following sequence prevents a problem that is seen with O'Hare ASICs
789 * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
790 * at the input to the receiver becomes 'stuck' and locks up the receiver.
791 * This problem can occur as a result of a zero bit at the receiver input
792 * coincident with any of the following events:
794 * The SCC is initialized (hardware or software).
795 * A framing error is detected.
796 * The clocking option changes from synchronous or X1 asynchronous
797 * clocking to X16, X32, or X64 asynchronous clocking.
798 * The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
800 * This workaround attempts to recover from the lockup condition by placing
801 * the SCC in synchronous loopback mode with a fast clock before programming
802 * any of the asynchronous modes.
804 static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap)
806 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
809 write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
812 write_zsreg(uap, 4, X1CLK | MONSYNC);
813 write_zsreg(uap, 3, Rx8);
814 write_zsreg(uap, 5, Tx8 | RTS);
815 write_zsreg(uap, 9, NV); /* Didn't we already do this? */
816 write_zsreg(uap, 11, RCBR | TCBR);
817 write_zsreg(uap, 12, 0);
818 write_zsreg(uap, 13, 0);
819 write_zsreg(uap, 14, (LOOPBAK | BRSRC));
820 write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
821 write_zsreg(uap, 3, Rx8 | RxENABLE);
822 write_zsreg(uap, 0, RES_EXT_INT);
823 write_zsreg(uap, 0, RES_EXT_INT);
824 write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */
826 /* The channel should be OK now, but it is probably receiving
828 * Switch to asynchronous mode, disable the receiver,
829 * and discard everything in the receive buffer.
831 write_zsreg(uap, 9, NV);
832 write_zsreg(uap, 4, X16CLK | SB_MASK);
833 write_zsreg(uap, 3, Rx8);
835 while (read_zsreg(uap, 0) & Rx_CH_AV) {
836 (void)read_zsreg(uap, 8);
837 write_zsreg(uap, 0, RES_EXT_INT);
838 write_zsreg(uap, 0, ERR_RES);
843 * Real startup routine, powers up the hardware and sets up
844 * the SCC. Returns a delay in ms where you need to wait before
845 * actually using the port, this is typically the internal modem
846 * powerup delay. This routine expect the lock to be taken.
848 static int __pmz_startup(struct uart_pmac_port *uap)
852 memset(&uap->curregs, 0, sizeof(uap->curregs));
854 /* Power up the SCC & underlying hardware (modem/irda) */
855 pwr_delay = pmz_set_scc_power(uap, 1);
857 /* Nice buggy HW ... */
858 pmz_fix_zero_bug_scc(uap);
860 /* Reset the channel */
861 uap->curregs[R9] = 0;
862 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
865 write_zsreg(uap, 9, 0);
868 /* Clear the interrupt registers */
869 write_zsreg(uap, R1, 0);
870 write_zsreg(uap, R0, ERR_RES);
871 write_zsreg(uap, R0, ERR_RES);
872 write_zsreg(uap, R0, RES_H_IUS);
873 write_zsreg(uap, R0, RES_H_IUS);
875 /* Setup some valid baud rate */
876 uap->curregs[R4] = X16CLK | SB1;
877 uap->curregs[R3] = Rx8;
878 uap->curregs[R5] = Tx8 | RTS;
879 if (!ZS_IS_IRDA(uap))
880 uap->curregs[R5] |= DTR;
881 uap->curregs[R12] = 0;
882 uap->curregs[R13] = 0;
883 uap->curregs[R14] = BRENAB;
885 /* Clear handshaking, enable BREAK interrupts */
886 uap->curregs[R15] = BRKIE;
888 /* Master interrupt enable */
889 uap->curregs[R9] |= NV | MIE;
891 pmz_load_zsregs(uap, uap->curregs);
893 /* Enable receiver and transmitter. */
894 write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
895 write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
897 /* Remember status for DCD/CTS changes */
898 uap->prev_status = read_zsreg(uap, R0);
904 static void pmz_irda_reset(struct uart_pmac_port *uap)
906 uap->curregs[R5] |= DTR;
907 write_zsreg(uap, R5, uap->curregs[R5]);
910 uap->curregs[R5] &= ~DTR;
911 write_zsreg(uap, R5, uap->curregs[R5]);
917 * This is the "normal" startup routine, using the above one
918 * wrapped with the lock and doing a schedule delay
920 static int pmz_startup(struct uart_port *port)
922 struct uart_pmac_port *uap = to_pmz(port);
926 pmz_debug("pmz: startup()\n");
928 if (ZS_IS_ASLEEP(uap))
930 if (uap->node == NULL)
933 mutex_lock(&pmz_irq_mutex);
935 uap->flags |= PMACZILOG_FLAG_IS_OPEN;
937 /* A console is never powered down. Else, power up and
938 * initialize the chip
940 if (!ZS_IS_CONS(uap)) {
941 spin_lock_irqsave(&port->lock, flags);
942 pwr_delay = __pmz_startup(uap);
943 spin_unlock_irqrestore(&port->lock, flags);
946 pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON;
947 if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED, "PowerMac Zilog", uap)) {
948 dev_err(&uap->dev->ofdev.dev,
949 "Unable to register zs interrupt handler.\n");
950 pmz_set_scc_power(uap, 0);
951 mutex_unlock(&pmz_irq_mutex);
955 mutex_unlock(&pmz_irq_mutex);
957 /* Right now, we deal with delay by blocking here, I'll be
960 if (pwr_delay != 0) {
961 pmz_debug("pmz: delaying %d ms\n", pwr_delay);
965 /* IrDA reset is done now */
969 /* Enable interrupts emission from the chip */
970 spin_lock_irqsave(&port->lock, flags);
971 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
972 if (!ZS_IS_EXTCLK(uap))
973 uap->curregs[R1] |= EXT_INT_ENAB;
974 write_zsreg(uap, R1, uap->curregs[R1]);
975 spin_unlock_irqrestore(&port->lock, flags);
977 pmz_debug("pmz: startup() done.\n");
982 static void pmz_shutdown(struct uart_port *port)
984 struct uart_pmac_port *uap = to_pmz(port);
987 pmz_debug("pmz: shutdown()\n");
989 if (uap->node == NULL)
992 mutex_lock(&pmz_irq_mutex);
994 /* Release interrupt handler */
995 free_irq(uap->port.irq, uap);
997 spin_lock_irqsave(&port->lock, flags);
999 uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;
1001 if (!ZS_IS_OPEN(uap->mate))
1002 pmz_get_port_A(uap)->flags &= ~PMACZILOG_FLAG_IS_IRQ_ON;
1004 /* Disable interrupts */
1005 if (!ZS_IS_ASLEEP(uap)) {
1006 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1007 write_zsreg(uap, R1, uap->curregs[R1]);
1011 if (ZS_IS_CONS(uap) || ZS_IS_ASLEEP(uap)) {
1012 spin_unlock_irqrestore(&port->lock, flags);
1013 mutex_unlock(&pmz_irq_mutex);
1017 /* Disable receiver and transmitter. */
1018 uap->curregs[R3] &= ~RxENABLE;
1019 uap->curregs[R5] &= ~TxENABLE;
1021 /* Disable all interrupts and BRK assertion. */
1022 uap->curregs[R5] &= ~SND_BRK;
1023 pmz_maybe_update_regs(uap);
1025 /* Shut the chip down */
1026 pmz_set_scc_power(uap, 0);
1028 spin_unlock_irqrestore(&port->lock, flags);
1030 mutex_unlock(&pmz_irq_mutex);
1032 pmz_debug("pmz: shutdown() done.\n");
1035 /* Shared by TTY driver and serial console setup. The port lock is held
1036 * and local interrupts are disabled.
1038 static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
1039 unsigned int iflag, unsigned long baud)
1044 /* Switch to external clocking for IrDA high clock rates. That
1045 * code could be re-used for Midi interfaces with different
1048 if (baud >= 115200 && ZS_IS_IRDA(uap)) {
1049 uap->curregs[R4] = X1CLK;
1050 uap->curregs[R11] = RCTRxCP | TCTRxCP;
1051 uap->curregs[R14] = 0; /* BRG off */
1052 uap->curregs[R12] = 0;
1053 uap->curregs[R13] = 0;
1054 uap->flags |= PMACZILOG_FLAG_IS_EXTCLK;
1057 case ZS_CLOCK/16: /* 230400 */
1058 uap->curregs[R4] = X16CLK;
1059 uap->curregs[R11] = 0;
1060 uap->curregs[R14] = 0;
1062 case ZS_CLOCK/32: /* 115200 */
1063 uap->curregs[R4] = X32CLK;
1064 uap->curregs[R11] = 0;
1065 uap->curregs[R14] = 0;
1068 uap->curregs[R4] = X16CLK;
1069 uap->curregs[R11] = TCBR | RCBR;
1070 brg = BPS_TO_BRG(baud, ZS_CLOCK / 16);
1071 uap->curregs[R12] = (brg & 255);
1072 uap->curregs[R13] = ((brg >> 8) & 255);
1073 uap->curregs[R14] = BRENAB;
1075 uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK;
1078 /* Character size, stop bits, and parity. */
1079 uap->curregs[3] &= ~RxN_MASK;
1080 uap->curregs[5] &= ~TxN_MASK;
1082 switch (cflag & CSIZE) {
1084 uap->curregs[3] |= Rx5;
1085 uap->curregs[5] |= Tx5;
1086 uap->parity_mask = 0x1f;
1089 uap->curregs[3] |= Rx6;
1090 uap->curregs[5] |= Tx6;
1091 uap->parity_mask = 0x3f;
1094 uap->curregs[3] |= Rx7;
1095 uap->curregs[5] |= Tx7;
1096 uap->parity_mask = 0x7f;
1100 uap->curregs[3] |= Rx8;
1101 uap->curregs[5] |= Tx8;
1102 uap->parity_mask = 0xff;
1105 uap->curregs[4] &= ~(SB_MASK);
1107 uap->curregs[4] |= SB2;
1109 uap->curregs[4] |= SB1;
1111 uap->curregs[4] |= PAR_ENAB;
1113 uap->curregs[4] &= ~PAR_ENAB;
1114 if (!(cflag & PARODD))
1115 uap->curregs[4] |= PAR_EVEN;
1117 uap->curregs[4] &= ~PAR_EVEN;
1119 uap->port.read_status_mask = Rx_OVR;
1121 uap->port.read_status_mask |= CRC_ERR | PAR_ERR;
1122 if (iflag & (BRKINT | PARMRK))
1123 uap->port.read_status_mask |= BRK_ABRT;
1125 uap->port.ignore_status_mask = 0;
1127 uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR;
1128 if (iflag & IGNBRK) {
1129 uap->port.ignore_status_mask |= BRK_ABRT;
1131 uap->port.ignore_status_mask |= Rx_OVR;
1134 if ((cflag & CREAD) == 0)
1135 uap->port.ignore_status_mask = 0xff;
1140 * Set the irda codec on the imac to the specified baud rate.
1142 static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1170 /* The FIR modes aren't really supported at this point, how
1171 * do we select the speed ? via the FCR on KeyLargo ?
1185 /* Wait for transmitter to drain */
1187 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0
1188 || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1190 dev_err(&uap->dev->ofdev.dev, "transmitter didn't drain\n");
1196 /* Drain the receiver too */
1198 (void)read_zsdata(uap);
1199 (void)read_zsdata(uap);
1200 (void)read_zsdata(uap);
1202 while (read_zsreg(uap, R0) & Rx_CH_AV) {
1206 dev_err(&uap->dev->ofdev.dev, "receiver didn't drain\n");
1211 /* Switch to command mode */
1212 uap->curregs[R5] |= DTR;
1213 write_zsreg(uap, R5, uap->curregs[R5]);
1217 /* Switch SCC to 19200 */
1218 pmz_convert_to_zs(uap, CS8, 0, 19200);
1219 pmz_load_zsregs(uap, uap->curregs);
1222 /* Write get_version command byte */
1223 write_zsdata(uap, 1);
1225 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1227 dev_err(&uap->dev->ofdev.dev,
1228 "irda_setup timed out on get_version byte\n");
1233 version = read_zsdata(uap);
1236 dev_info(&uap->dev->ofdev.dev, "IrDA: dongle version %d not supported\n",
1241 /* Send speed mode */
1242 write_zsdata(uap, cmdbyte);
1244 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1246 dev_err(&uap->dev->ofdev.dev,
1247 "irda_setup timed out on speed mode byte\n");
1252 t = read_zsdata(uap);
1254 dev_err(&uap->dev->ofdev.dev,
1255 "irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1257 dev_info(&uap->dev->ofdev.dev, "IrDA setup for %ld bps, dongle version: %d\n",
1260 (void)read_zsdata(uap);
1261 (void)read_zsdata(uap);
1262 (void)read_zsdata(uap);
1265 /* Switch back to data mode */
1266 uap->curregs[R5] &= ~DTR;
1267 write_zsreg(uap, R5, uap->curregs[R5]);
1270 (void)read_zsdata(uap);
1271 (void)read_zsdata(uap);
1272 (void)read_zsdata(uap);
1276 static void __pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1277 struct ktermios *old)
1279 struct uart_pmac_port *uap = to_pmz(port);
1282 pmz_debug("pmz: set_termios()\n");
1284 if (ZS_IS_ASLEEP(uap))
1287 memcpy(&uap->termios_cache, termios, sizeof(struct ktermios));
1289 /* XXX Check which revs of machines actually allow 1 and 4Mb speeds
1290 * on the IR dongle. Note that the IRTTY driver currently doesn't know
1291 * about the FIR mode and high speed modes. So these are unused. For
1292 * implementing proper support for these, we should probably add some
1293 * DMA as well, at least on the Rx side, which isn't a simple thing
1296 if (ZS_IS_IRDA(uap)) {
1297 /* Calc baud rate */
1298 baud = uart_get_baud_rate(port, termios, old, 1200, 4000000);
1299 pmz_debug("pmz: switch IRDA to %ld bauds\n", baud);
1300 /* Cet the irda codec to the right rate */
1301 pmz_irda_setup(uap, &baud);
1302 /* Set final baud rate */
1303 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1304 pmz_load_zsregs(uap, uap->curregs);
1307 baud = uart_get_baud_rate(port, termios, old, 1200, 230400);
1308 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1309 /* Make sure modem status interrupts are correctly configured */
1310 if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) {
1311 uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE;
1312 uap->flags |= PMACZILOG_FLAG_MODEM_STATUS;
1314 uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE);
1315 uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS;
1318 /* Load registers to the chip */
1319 pmz_maybe_update_regs(uap);
1321 uart_update_timeout(port, termios->c_cflag, baud);
1323 pmz_debug("pmz: set_termios() done.\n");
1326 /* The port lock is not held. */
1327 static void pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1328 struct ktermios *old)
1330 struct uart_pmac_port *uap = to_pmz(port);
1331 unsigned long flags;
1333 spin_lock_irqsave(&port->lock, flags);
1335 /* Disable IRQs on the port */
1336 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1337 write_zsreg(uap, R1, uap->curregs[R1]);
1339 /* Setup new port configuration */
1340 __pmz_set_termios(port, termios, old);
1342 /* Re-enable IRQs on the port */
1343 if (ZS_IS_OPEN(uap)) {
1344 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
1345 if (!ZS_IS_EXTCLK(uap))
1346 uap->curregs[R1] |= EXT_INT_ENAB;
1347 write_zsreg(uap, R1, uap->curregs[R1]);
1349 spin_unlock_irqrestore(&port->lock, flags);
1352 static const char *pmz_type(struct uart_port *port)
1354 struct uart_pmac_port *uap = to_pmz(port);
1356 if (ZS_IS_IRDA(uap))
1357 return "Z85c30 ESCC - Infrared port";
1358 else if (ZS_IS_INTMODEM(uap))
1359 return "Z85c30 ESCC - Internal modem";
1360 return "Z85c30 ESCC - Serial port";
1363 /* We do not request/release mappings of the registers here, this
1364 * happens at early serial probe time.
1366 static void pmz_release_port(struct uart_port *port)
1370 static int pmz_request_port(struct uart_port *port)
1375 /* These do not need to do anything interesting either. */
1376 static void pmz_config_port(struct uart_port *port, int flags)
1380 /* We do not support letting the user mess with the divisor, IRQ, etc. */
1381 static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser)
1386 #ifdef CONFIG_CONSOLE_POLL
1388 static int pmz_poll_get_char(struct uart_port *port)
1390 struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1392 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0)
1394 return read_zsdata(uap);
1397 static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1399 struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1401 /* Wait for the transmit buffer to empty. */
1402 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1404 write_zsdata(uap, c);
1409 static struct uart_ops pmz_pops = {
1410 .tx_empty = pmz_tx_empty,
1411 .set_mctrl = pmz_set_mctrl,
1412 .get_mctrl = pmz_get_mctrl,
1413 .stop_tx = pmz_stop_tx,
1414 .start_tx = pmz_start_tx,
1415 .stop_rx = pmz_stop_rx,
1416 .enable_ms = pmz_enable_ms,
1417 .break_ctl = pmz_break_ctl,
1418 .startup = pmz_startup,
1419 .shutdown = pmz_shutdown,
1420 .set_termios = pmz_set_termios,
1422 .release_port = pmz_release_port,
1423 .request_port = pmz_request_port,
1424 .config_port = pmz_config_port,
1425 .verify_port = pmz_verify_port,
1426 #ifdef CONFIG_CONSOLE_POLL
1427 .poll_get_char = pmz_poll_get_char,
1428 .poll_put_char = pmz_poll_put_char,
1433 * Setup one port structure after probing, HW is down at this point,
1434 * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
1435 * register our console before uart_add_one_port() is called
1437 static int __init pmz_init_port(struct uart_pmac_port *uap)
1439 struct device_node *np = uap->node;
1441 const struct slot_names_prop {
1446 struct resource r_ports, r_rxdma, r_txdma;
1449 * Request & map chip registers
1451 if (of_address_to_resource(np, 0, &r_ports))
1453 uap->port.mapbase = r_ports.start;
1454 uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1456 uap->control_reg = uap->port.membase;
1457 uap->data_reg = uap->control_reg + 0x10;
1460 * Request & map DBDMA registers
1463 if (of_address_to_resource(np, 1, &r_txdma) == 0 &&
1464 of_address_to_resource(np, 2, &r_rxdma) == 0)
1465 uap->flags |= PMACZILOG_FLAG_HAS_DMA;
1467 memset(&r_txdma, 0, sizeof(struct resource));
1468 memset(&r_rxdma, 0, sizeof(struct resource));
1470 if (ZS_HAS_DMA(uap)) {
1471 uap->tx_dma_regs = ioremap(r_txdma.start, 0x100);
1472 if (uap->tx_dma_regs == NULL) {
1473 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1476 uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100);
1477 if (uap->rx_dma_regs == NULL) {
1478 iounmap(uap->tx_dma_regs);
1479 uap->tx_dma_regs = NULL;
1480 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1483 uap->tx_dma_irq = irq_of_parse_and_map(np, 1);
1484 uap->rx_dma_irq = irq_of_parse_and_map(np, 2);
1491 if (of_device_is_compatible(np, "cobalt"))
1492 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1493 conn = of_get_property(np, "AAPL,connector", &len);
1494 if (conn && (strcmp(conn, "infrared") == 0))
1495 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1496 uap->port_type = PMAC_SCC_ASYNC;
1497 /* 1999 Powerbook G3 has slot-names property instead */
1498 slots = of_get_property(np, "slot-names", &len);
1499 if (slots && slots->count > 0) {
1500 if (strcmp(slots->name, "IrDA") == 0)
1501 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1502 else if (strcmp(slots->name, "Modem") == 0)
1503 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1505 if (ZS_IS_IRDA(uap))
1506 uap->port_type = PMAC_SCC_IRDA;
1507 if (ZS_IS_INTMODEM(uap)) {
1508 struct device_node* i2c_modem =
1509 of_find_node_by_name(NULL, "i2c-modem");
1512 of_get_property(i2c_modem, "modem-id", NULL);
1513 if (mid) switch(*mid) {
1520 uap->port_type = PMAC_SCC_I2S1;
1522 printk(KERN_INFO "pmac_zilog: i2c-modem detected, id: %d\n",
1524 of_node_put(i2c_modem);
1526 printk(KERN_INFO "pmac_zilog: serial modem detected\n");
1531 * Init remaining bits of "port" structure
1533 uap->port.iotype = UPIO_MEM;
1534 uap->port.irq = irq_of_parse_and_map(np, 0);
1535 uap->port.uartclk = ZS_CLOCK;
1536 uap->port.fifosize = 1;
1537 uap->port.ops = &pmz_pops;
1538 uap->port.type = PORT_PMAC_ZILOG;
1539 uap->port.flags = 0;
1542 * Fixup for the port on Gatwick for which the device-tree has
1543 * missing interrupts. Normally, the macio_dev would contain
1544 * fixed up interrupt info, but we use the device-tree directly
1545 * here due to early probing so we need the fixup too.
1547 if (uap->port.irq == NO_IRQ &&
1548 np->parent && np->parent->parent &&
1549 of_device_is_compatible(np->parent->parent, "gatwick")) {
1550 /* IRQs on gatwick are offset by 64 */
1551 uap->port.irq = irq_create_mapping(NULL, 64 + 15);
1552 uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4);
1553 uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5);
1556 /* Setup some valid baud rate information in the register
1557 * shadows so we don't write crap there before baud rate is
1558 * first initialized.
1560 pmz_convert_to_zs(uap, CS8, 0, 9600);
1566 * Get rid of a port on module removal
1568 static void pmz_dispose_port(struct uart_pmac_port *uap)
1570 struct device_node *np;
1573 iounmap(uap->rx_dma_regs);
1574 iounmap(uap->tx_dma_regs);
1575 iounmap(uap->control_reg);
1578 memset(uap, 0, sizeof(struct uart_pmac_port));
1582 * Called upon match with an escc node in the devive-tree.
1584 static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
1588 /* Iterate the pmz_ports array to find a matching entry
1590 for (i = 0; i < MAX_ZS_PORTS; i++)
1591 if (pmz_ports[i].node == mdev->ofdev.node) {
1592 struct uart_pmac_port *uap = &pmz_ports[i];
1595 dev_set_drvdata(&mdev->ofdev.dev, uap);
1596 if (macio_request_resources(uap->dev, "pmac_zilog"))
1597 printk(KERN_WARNING "%s: Failed to request resource"
1598 ", port still active\n",
1601 uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED;
1608 * That one should not be called, macio isn't really a hotswap device,
1609 * we don't expect one of those serial ports to go away...
1611 static int pmz_detach(struct macio_dev *mdev)
1613 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1618 if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) {
1619 macio_release_resources(uap->dev);
1620 uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED;
1622 dev_set_drvdata(&mdev->ofdev.dev, NULL);
1629 static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
1631 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1632 struct uart_state *state;
1633 unsigned long flags;
1636 printk("HRM... pmz_suspend with NULL uap\n");
1640 if (pm_state.event == mdev->ofdev.dev.power.power_state.event)
1643 pmz_debug("suspend, switching to state %d\n", pm_state.event);
1645 state = pmz_uart_reg.state + uap->port.line;
1647 mutex_lock(&pmz_irq_mutex);
1648 mutex_lock(&state->mutex);
1650 spin_lock_irqsave(&uap->port.lock, flags);
1652 if (ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)) {
1653 /* Disable receiver and transmitter. */
1654 uap->curregs[R3] &= ~RxENABLE;
1655 uap->curregs[R5] &= ~TxENABLE;
1657 /* Disable all interrupts and BRK assertion. */
1658 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1659 uap->curregs[R5] &= ~SND_BRK;
1660 pmz_load_zsregs(uap, uap->curregs);
1661 uap->flags |= PMACZILOG_FLAG_IS_ASLEEP;
1665 spin_unlock_irqrestore(&uap->port.lock, flags);
1667 if (ZS_IS_OPEN(uap) || ZS_IS_OPEN(uap->mate))
1668 if (ZS_IS_ASLEEP(uap->mate) && ZS_IS_IRQ_ON(pmz_get_port_A(uap))) {
1669 pmz_get_port_A(uap)->flags &= ~PMACZILOG_FLAG_IS_IRQ_ON;
1670 disable_irq(uap->port.irq);
1673 if (ZS_IS_CONS(uap))
1674 uap->port.cons->flags &= ~CON_ENABLED;
1676 /* Shut the chip down */
1677 pmz_set_scc_power(uap, 0);
1679 mutex_unlock(&state->mutex);
1680 mutex_unlock(&pmz_irq_mutex);
1682 pmz_debug("suspend, switching complete\n");
1684 mdev->ofdev.dev.power.power_state = pm_state;
1690 static int pmz_resume(struct macio_dev *mdev)
1692 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1693 struct uart_state *state;
1694 unsigned long flags;
1700 if (mdev->ofdev.dev.power.power_state.event == PM_EVENT_ON)
1703 pmz_debug("resume, switching to state 0\n");
1705 state = pmz_uart_reg.state + uap->port.line;
1707 mutex_lock(&pmz_irq_mutex);
1708 mutex_lock(&state->mutex);
1710 spin_lock_irqsave(&uap->port.lock, flags);
1711 if (!ZS_IS_OPEN(uap) && !ZS_IS_CONS(uap)) {
1712 spin_unlock_irqrestore(&uap->port.lock, flags);
1715 pwr_delay = __pmz_startup(uap);
1717 /* Take care of config that may have changed while asleep */
1718 __pmz_set_termios(&uap->port, &uap->termios_cache, NULL);
1720 if (ZS_IS_OPEN(uap)) {
1721 /* Enable interrupts */
1722 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
1723 if (!ZS_IS_EXTCLK(uap))
1724 uap->curregs[R1] |= EXT_INT_ENAB;
1725 write_zsreg(uap, R1, uap->curregs[R1]);
1728 spin_unlock_irqrestore(&uap->port.lock, flags);
1730 if (ZS_IS_CONS(uap))
1731 uap->port.cons->flags |= CON_ENABLED;
1733 /* Re-enable IRQ on the controller */
1734 if (ZS_IS_OPEN(uap) && !ZS_IS_IRQ_ON(pmz_get_port_A(uap))) {
1735 pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON;
1736 enable_irq(uap->port.irq);
1740 mutex_unlock(&state->mutex);
1741 mutex_unlock(&pmz_irq_mutex);
1743 /* Right now, we deal with delay by blocking here, I'll be
1746 if (pwr_delay != 0) {
1747 pmz_debug("pmz: delaying %d ms\n", pwr_delay);
1751 pmz_debug("resume, switching complete\n");
1753 mdev->ofdev.dev.power.power_state.event = PM_EVENT_ON;
1759 * Probe all ports in the system and build the ports array, we register
1760 * with the serial layer at this point, the macio-type probing is only
1761 * used later to "attach" to the sysfs tree so we get power management
1764 static int __init pmz_probe(void)
1766 struct device_node *node_p, *node_a, *node_b, *np;
1771 * Find all escc chips in the system
1773 node_p = of_find_node_by_name(NULL, "escc");
1776 * First get channel A/B node pointers
1778 * TODO: Add routines with proper locking to do that...
1780 node_a = node_b = NULL;
1781 for (np = NULL; (np = of_get_next_child(node_p, np)) != NULL;) {
1782 if (strncmp(np->name, "ch-a", 4) == 0)
1783 node_a = of_node_get(np);
1784 else if (strncmp(np->name, "ch-b", 4) == 0)
1785 node_b = of_node_get(np);
1787 if (!node_a && !node_b) {
1788 of_node_put(node_a);
1789 of_node_put(node_b);
1790 printk(KERN_ERR "pmac_zilog: missing node %c for escc %s\n",
1791 (!node_a) ? 'a' : 'b', node_p->full_name);
1796 * Fill basic fields in the port structures
1798 pmz_ports[count].mate = &pmz_ports[count+1];
1799 pmz_ports[count+1].mate = &pmz_ports[count];
1800 pmz_ports[count].flags = PMACZILOG_FLAG_IS_CHANNEL_A;
1801 pmz_ports[count].node = node_a;
1802 pmz_ports[count+1].node = node_b;
1803 pmz_ports[count].port.line = count;
1804 pmz_ports[count+1].port.line = count+1;
1807 * Setup the ports for real
1809 rc = pmz_init_port(&pmz_ports[count]);
1810 if (rc == 0 && node_b != NULL)
1811 rc = pmz_init_port(&pmz_ports[count+1]);
1813 of_node_put(node_a);
1814 of_node_put(node_b);
1815 memset(&pmz_ports[count], 0, sizeof(struct uart_pmac_port));
1816 memset(&pmz_ports[count+1], 0, sizeof(struct uart_pmac_port));
1821 node_p = of_find_node_by_name(node_p, "escc");
1823 pmz_ports_count = count;
1828 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1830 static void pmz_console_write(struct console *con, const char *s, unsigned int count);
1831 static int __init pmz_console_setup(struct console *co, char *options);
1833 static struct console pmz_console = {
1834 .name = PMACZILOG_NAME,
1835 .write = pmz_console_write,
1836 .device = uart_console_device,
1837 .setup = pmz_console_setup,
1838 .flags = CON_PRINTBUFFER,
1840 .data = &pmz_uart_reg,
1843 #define PMACZILOG_CONSOLE &pmz_console
1844 #else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1845 #define PMACZILOG_CONSOLE (NULL)
1846 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1849 * Register the driver, console driver and ports with the serial
1852 static int __init pmz_register(void)
1856 pmz_uart_reg.nr = pmz_ports_count;
1857 pmz_uart_reg.cons = PMACZILOG_CONSOLE;
1860 * Register this driver with the serial core
1862 rc = uart_register_driver(&pmz_uart_reg);
1867 * Register each port with the serial core
1869 for (i = 0; i < pmz_ports_count; i++) {
1870 struct uart_pmac_port *uport = &pmz_ports[i];
1871 /* NULL node may happen on wallstreet */
1872 if (uport->node != NULL)
1873 rc = uart_add_one_port(&pmz_uart_reg, &uport->port);
1881 struct uart_pmac_port *uport = &pmz_ports[i];
1882 uart_remove_one_port(&pmz_uart_reg, &uport->port);
1884 uart_unregister_driver(&pmz_uart_reg);
1888 static struct of_device_id pmz_match[] =
1898 MODULE_DEVICE_TABLE (of, pmz_match);
1900 static struct macio_driver pmz_driver =
1902 .name = "pmac_zilog",
1903 .match_table = pmz_match,
1904 .probe = pmz_attach,
1905 .remove = pmz_detach,
1906 .suspend = pmz_suspend,
1907 .resume = pmz_resume,
1910 static int __init init_pmz(void)
1913 printk(KERN_INFO "%s\n", version);
1916 * First, we need to do a direct OF-based probe pass. We
1917 * do that because we want serial console up before the
1918 * macio stuffs calls us back, and since that makes it
1919 * easier to pass the proper number of channels to
1920 * uart_register_driver()
1922 if (pmz_ports_count == 0)
1926 * Bail early if no port found
1928 if (pmz_ports_count == 0)
1932 * Now we register with the serial layer
1934 rc = pmz_register();
1937 "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n"
1938 "pmac_zilog: Did another serial driver already claim the minors?\n");
1939 /* effectively "pmz_unprobe()" */
1940 for (i=0; i < pmz_ports_count; i++)
1941 pmz_dispose_port(&pmz_ports[i]);
1946 * Then we register the macio driver itself
1948 return macio_register_driver(&pmz_driver);
1951 static void __exit exit_pmz(void)
1955 /* Get rid of macio-driver (detach from macio) */
1956 macio_unregister_driver(&pmz_driver);
1958 for (i = 0; i < pmz_ports_count; i++) {
1959 struct uart_pmac_port *uport = &pmz_ports[i];
1960 if (uport->node != NULL) {
1961 uart_remove_one_port(&pmz_uart_reg, &uport->port);
1962 pmz_dispose_port(uport);
1965 /* Unregister UART driver */
1966 uart_unregister_driver(&pmz_uart_reg);
1969 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1971 static void pmz_console_putchar(struct uart_port *port, int ch)
1973 struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1975 /* Wait for the transmit buffer to empty. */
1976 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1978 write_zsdata(uap, ch);
1982 * Print a string to the serial port trying not to disturb
1983 * any possible real use of the port...
1985 static void pmz_console_write(struct console *con, const char *s, unsigned int count)
1987 struct uart_pmac_port *uap = &pmz_ports[con->index];
1988 unsigned long flags;
1990 if (ZS_IS_ASLEEP(uap))
1992 spin_lock_irqsave(&uap->port.lock, flags);
1994 /* Turn of interrupts and enable the transmitter. */
1995 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
1996 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
1998 uart_console_write(&uap->port, s, count, pmz_console_putchar);
2000 /* Restore the values in the registers. */
2001 write_zsreg(uap, R1, uap->curregs[1]);
2002 /* Don't disable the transmitter. */
2004 spin_unlock_irqrestore(&uap->port.lock, flags);
2008 * Setup the serial console
2010 static int __init pmz_console_setup(struct console *co, char *options)
2012 struct uart_pmac_port *uap;
2013 struct uart_port *port;
2018 unsigned long pwr_delay;
2021 * XServe's default to 57600 bps
2023 if (machine_is_compatible("RackMac1,1")
2024 || machine_is_compatible("RackMac1,2")
2025 || machine_is_compatible("MacRISC4"))
2029 * Check whether an invalid uart number has been specified, and
2030 * if so, search for the first available port that does have
2033 if (co->index >= pmz_ports_count)
2035 uap = &pmz_ports[co->index];
2036 if (uap->node == NULL)
2041 * Mark port as beeing a console
2043 uap->flags |= PMACZILOG_FLAG_IS_CONS;
2046 * Temporary fix for uart layer who didn't setup the spinlock yet
2048 spin_lock_init(&port->lock);
2051 * Enable the hardware
2053 pwr_delay = __pmz_startup(uap);
2058 uart_parse_options(options, &baud, &parity, &bits, &flow);
2060 return uart_set_options(port, co, baud, parity, bits, flow);
2063 static int __init pmz_console_init(void)
2068 /* TODO: Autoprobe console based on OF */
2069 /* pmz_console.index = i; */
2070 register_console(&pmz_console);
2075 console_initcall(pmz_console_init);
2076 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
2078 module_init(init_pmz);
2079 module_exit(exit_pmz);