2 * Device Tree Source for AMCC Rainier
4 * Based on Sequoia code
5 * Copyright (c) 2007 MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
18 model = "amcc,rainier";
19 compatible = "amcc,rainier";
20 dcr-parent = <&/cpus/cpu@0>;
37 model = "PowerPC,440GRx";
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <20>;
42 d-cache-line-size = <20>;
43 i-cache-size = <8000>;
44 d-cache-size = <8000>;
46 dcr-access-method = "native";
51 device_type = "memory";
52 reg = <0 0 0>; /* Filled in by zImage */
55 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440grx","ibm,uic";
62 #interrupt-cells = <2>;
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440grx","ibm,uic";
72 #interrupt-cells = <2>;
73 interrupts = <1e 4 1f 4>; /* cascade */
74 interrupt-parent = <&UIC0>;
77 UIC2: interrupt-controller2 {
78 compatible = "ibm,uic-440grx","ibm,uic";
84 #interrupt-cells = <2>;
85 interrupts = <1c 4 1d 4>; /* cascade */
86 interrupt-parent = <&UIC0>;
90 compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
95 compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
100 compatible = "ibm,plb-440grx", "ibm,plb4";
101 #address-cells = <2>;
104 clock-frequency = <0>; /* Filled in by zImage */
107 compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
112 compatible = "ibm,dma-440grx", "ibm,dma-4xx";
117 compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
121 interrupt-parent = <&MAL0>;
122 interrupts = <0 1 2 3 4>;
123 #interrupt-cells = <1>;
124 #address-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
127 /*RXEOB*/ 1 &UIC0 b 4
130 /*RXDE*/ 4 &UIC1 2 4>;
131 interrupt-map-mask = <ffffffff>;
135 compatible = "ibm,opb-440grx", "ibm,opb";
136 #address-cells = <1>;
138 ranges = <00000000 1 00000000 80000000
139 80000000 1 80000000 80000000>;
140 interrupt-parent = <&UIC1>;
142 clock-frequency = <0>; /* Filled in by zImage */
145 compatible = "ibm,ebc-440grx", "ibm,ebc";
147 #address-cells = <2>;
149 clock-frequency = <0>; /* Filled in by zImage */
151 interrupt-parent = <&UIC1>;
154 compatible = "amd,s29gl256n", "cfi-flash";
156 reg = <0 000000 4000000>;
157 #address-cells = <1>;
165 reg = <180000 200000>;
168 label = "file system";
169 reg = <380000 3aa0000>;
173 reg = <3e20000 140000>;
177 reg = <3f60000 40000>;
181 reg = <3fa0000 60000>;
187 UART0: serial@ef600300 {
188 device_type = "serial";
189 compatible = "ns16550";
191 virtual-reg = <ef600300>;
192 clock-frequency = <0>; /* Filled in by zImage */
193 current-speed = <1c200>;
194 interrupt-parent = <&UIC0>;
198 UART1: serial@ef600400 {
199 device_type = "serial";
200 compatible = "ns16550";
202 virtual-reg = <ef600400>;
203 clock-frequency = <0>;
205 interrupt-parent = <&UIC0>;
209 UART2: serial@ef600500 {
210 device_type = "serial";
211 compatible = "ns16550";
213 virtual-reg = <ef600500>;
214 clock-frequency = <0>;
216 interrupt-parent = <&UIC1>;
220 UART3: serial@ef600600 {
221 device_type = "serial";
222 compatible = "ns16550";
224 virtual-reg = <ef600600>;
225 clock-frequency = <0>;
227 interrupt-parent = <&UIC1>;
232 compatible = "ibm,iic-440grx", "ibm,iic";
234 interrupt-parent = <&UIC0>;
239 compatible = "ibm,iic-440grx", "ibm,iic";
241 interrupt-parent = <&UIC0>;
245 ZMII0: emac-zmii@ef600d00 {
246 compatible = "ibm,zmii-440grx", "ibm,zmii";
250 RGMII0: emac-rgmii@ef601000 {
251 compatible = "ibm,rgmii-440grx", "ibm,rgmii";
256 EMAC0: ethernet@ef600e00 {
257 device_type = "network";
258 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
259 interrupt-parent = <&EMAC0>;
261 #interrupt-cells = <1>;
262 #address-cells = <0>;
264 interrupt-map = </*Status*/ 0 &UIC0 18 4
265 /*Wake*/ 1 &UIC1 1d 4>;
267 local-mac-address = [000000000000];
268 mal-device = <&MAL0>;
269 mal-tx-channel = <0>;
270 mal-rx-channel = <0>;
272 max-frame-size = <2328>;
273 rx-fifo-size = <1000>;
274 tx-fifo-size = <800>;
276 phy-map = <00000000>;
277 zmii-device = <&ZMII0>;
279 rgmii-device = <&RGMII0>;
281 has-inverted-stacr-oc;
282 has-new-stacr-staopc;
285 EMAC1: ethernet@ef600f00 {
286 device_type = "network";
287 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
288 interrupt-parent = <&EMAC1>;
290 #interrupt-cells = <1>;
291 #address-cells = <0>;
293 interrupt-map = </*Status*/ 0 &UIC0 19 4
294 /*Wake*/ 1 &UIC1 1f 4>;
296 local-mac-address = [000000000000];
297 mal-device = <&MAL0>;
298 mal-tx-channel = <1>;
299 mal-rx-channel = <1>;
301 max-frame-size = <2328>;
302 rx-fifo-size = <1000>;
303 tx-fifo-size = <800>;
305 phy-map = <00000000>;
306 zmii-device = <&ZMII0>;
308 rgmii-device = <&RGMII0>;
310 has-inverted-stacr-oc;
311 has-new-stacr-staopc;
315 PCI0: pci@1ec000000 {
317 #interrupt-cells = <1>;
319 #address-cells = <3>;
320 compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
322 reg = <1 eec00000 8 /* Config space access */
323 1 eed00000 4 /* IACK */
324 1 eed00000 4 /* Special cycle */
325 1 ef400000 40>; /* Internal registers */
327 /* Outbound ranges, one memory and one IO,
328 * later cannot be changed. Chip supports a second
329 * IO range but we don't use it for now
331 ranges = <02000000 0 80000000 1 80000000 0 10000000
332 01000000 0 00000000 1 e8000000 0 00100000>;
334 /* Inbound 2GB range starting at 0 */
335 dma-ranges = <42000000 0 0 0 0 0 80000000>;
337 /* All PCI interrupts are routed to IRQ 67 */
338 interrupt-map-mask = <0000 0 0 0>;
339 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
344 linux,stdout-path = "/plb/opb/serial@ef600300";
345 bootargs = "console=ttyS0,115200";