[POWERPC] 4xx: Workaround for CHIP_11 Errata
[linux-2.6] / arch / arm / mach-footbridge / dc21285-timer.c
1 /*
2  *  linux/arch/arm/mach-footbridge/dc21285-timer.c
3  *
4  *  Copyright (C) 1998 Russell King.
5  *  Copyright (C) 1998 Phil Blundell
6  */
7 #include <linux/init.h>
8 #include <linux/interrupt.h>
9 #include <linux/irq.h>
10
11 #include <asm/irq.h>
12
13 #include <asm/hardware/dec21285.h>
14 #include <asm/mach/time.h>
15
16 #include "common.h"
17
18 /*
19  * Footbridge timer 1 support.
20  */
21 static unsigned long timer1_latch;
22
23 static unsigned long timer1_gettimeoffset (void)
24 {
25         unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
26
27         return ((tick_nsec / 1000) * value) / timer1_latch;
28 }
29
30 static irqreturn_t
31 timer1_interrupt(int irq, void *dev_id)
32 {
33         *CSR_TIMER1_CLR = 0;
34
35         timer_tick();
36
37         return IRQ_HANDLED;
38 }
39
40 static struct irqaction footbridge_timer_irq = {
41         .name           = "Timer1 timer tick",
42         .handler        = timer1_interrupt,
43         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
44 };
45
46 /*
47  * Set up timer interrupt.
48  */
49 static void __init footbridge_timer_init(void)
50 {
51         timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
52
53         *CSR_TIMER1_CLR  = 0;
54         *CSR_TIMER1_LOAD = timer1_latch;
55         *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
56
57         setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
58
59         isa_rtc_init();
60 }
61
62 struct sys_timer footbridge_timer = {
63         .init           = footbridge_timer_init,
64         .offset         = timer1_gettimeoffset,
65 };