1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
9 * This program is free software; you can redistribute it and/or *
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
20 *******************************************************************/
22 #include <linux/blkdev.h>
23 #include <linux/pci.h>
24 #include <linux/interrupt.h>
26 #include <scsi/scsi_device.h>
27 #include <scsi/scsi_transport_fc.h>
29 #include <scsi/scsi.h>
33 #include "lpfc_disc.h"
34 #include "lpfc_scsi.h"
36 #include "lpfc_logmsg.h"
37 #include "lpfc_crtn.h"
38 #include "lpfc_compat.h"
40 /**********************************************/
43 /**********************************************/
45 lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
53 /* Setup to dump VPD region */
54 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
55 mb->mbxCommand = MBX_DUMP_MEMORY;
57 mb->un.varDmp.type = DMP_NV_PARAMS;
58 mb->un.varDmp.entry_index = offset;
59 mb->un.varDmp.region_id = DMP_REGION_VPD;
60 mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
62 mb->un.varDmp.resp_offset = 0;
64 mb->mbxOwner = OWN_HOST;
68 /**********************************************/
69 /* lpfc_read_nv Issue a READ NVPARAM */
71 /**********************************************/
73 lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
78 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
79 mb->mbxCommand = MBX_READ_NV;
80 mb->mbxOwner = OWN_HOST;
84 /**********************************************/
85 /* lpfc_read_la Issue a READ LA */
87 /**********************************************/
89 lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
92 struct lpfc_sli *psli;
96 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
98 INIT_LIST_HEAD(&mp->list);
99 mb->mbxCommand = MBX_READ_LA64;
100 mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
101 mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
102 mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
104 /* Save address for later completion and set the owner to host so that
105 * the FW knows this mailbox is available for processing.
107 pmb->context1 = (uint8_t *) mp;
108 mb->mbxOwner = OWN_HOST;
112 /**********************************************/
113 /* lpfc_clear_la Issue a CLEAR LA */
114 /* mailbox command */
115 /**********************************************/
117 lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
122 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
124 mb->un.varClearLA.eventTag = phba->fc_eventTag;
125 mb->mbxCommand = MBX_CLEAR_LA;
126 mb->mbxOwner = OWN_HOST;
130 /**************************************************/
131 /* lpfc_config_link Issue a CONFIG LINK */
132 /* mailbox command */
133 /**************************************************/
135 lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
137 MAILBOX_t *mb = &pmb->mb;
138 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
141 * SLI-2, Coalescing Response Feature.
143 if (phba->cfg_cr_delay) {
144 mb->un.varCfgLnk.cr = 1;
145 mb->un.varCfgLnk.ci = 1;
146 mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
147 mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
150 mb->un.varCfgLnk.myId = phba->fc_myDID;
151 mb->un.varCfgLnk.edtov = phba->fc_edtov;
152 mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
153 mb->un.varCfgLnk.ratov = phba->fc_ratov;
154 mb->un.varCfgLnk.rttov = phba->fc_rttov;
155 mb->un.varCfgLnk.altov = phba->fc_altov;
156 mb->un.varCfgLnk.crtov = phba->fc_crtov;
157 mb->un.varCfgLnk.citov = phba->fc_citov;
160 mb->un.varCfgLnk.ack0_enable = 1;
162 mb->mbxCommand = MBX_CONFIG_LINK;
163 mb->mbxOwner = OWN_HOST;
167 /**********************************************/
168 /* lpfc_init_link Issue an INIT LINK */
169 /* mailbox command */
170 /**********************************************/
172 lpfc_init_link(struct lpfc_hba * phba,
173 LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
176 struct lpfc_sli *psli;
180 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
184 case FLAGS_TOPOLOGY_MODE_LOOP_PT:
185 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
186 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
188 case FLAGS_TOPOLOGY_MODE_PT_PT:
189 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
191 case FLAGS_TOPOLOGY_MODE_LOOP:
192 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
194 case FLAGS_TOPOLOGY_MODE_PT_LOOP:
195 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
196 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
201 * Setting up the link speed
204 if (vpd->rev.feaLevelHigh >= 0x02){
209 mb->un.varInitLnk.link_flags |=
211 mb->un.varInitLnk.link_speed = linkspeed;
213 case LINK_SPEED_AUTO:
215 mb->un.varInitLnk.link_speed =
222 mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
224 mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
225 mb->mbxOwner = OWN_HOST;
226 mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
230 /**********************************************/
231 /* lpfc_read_sparam Issue a READ SPARAM */
232 /* mailbox command */
233 /**********************************************/
235 lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
237 struct lpfc_dmabuf *mp;
239 struct lpfc_sli *psli;
243 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
245 mb->mbxOwner = OWN_HOST;
247 /* Get a buffer to hold the HBAs Service Parameters */
249 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
250 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
253 mb->mbxCommand = MBX_READ_SPARM64;
254 /* READ_SPARAM: no buffers */
255 lpfc_printf_log(phba,
258 "%d:0301 READ_SPARAM: no buffers\n",
262 INIT_LIST_HEAD(&mp->list);
263 mb->mbxCommand = MBX_READ_SPARM64;
264 mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
265 mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
266 mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
268 /* save address for completion */
274 /********************************************/
275 /* lpfc_unreg_did Issue a UNREG_DID */
276 /* mailbox command */
277 /********************************************/
279 lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
284 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
286 mb->un.varUnregDID.did = did;
288 mb->mbxCommand = MBX_UNREG_D_ID;
289 mb->mbxOwner = OWN_HOST;
293 /***********************************************/
295 /* command to write slim */
296 /***********************************************/
298 lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
304 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
306 /* addr = 0x090597 is AUTO ABTS disable for ELS commands */
307 /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
310 * Always turn on DELAYED ABTS for ELS timeouts
312 if ((addr == 0x052198) && (value == 0))
315 mb->un.varWords[0] = addr;
316 mb->un.varWords[1] = value;
318 mb->mbxCommand = MBX_SET_SLIM;
319 mb->mbxOwner = OWN_HOST;
323 /**********************************************/
324 /* lpfc_read_nv Issue a READ CONFIG */
325 /* mailbox command */
326 /**********************************************/
328 lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
333 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
335 mb->mbxCommand = MBX_READ_CONFIG;
336 mb->mbxOwner = OWN_HOST;
340 /********************************************/
341 /* lpfc_reg_login Issue a REG_LOGIN */
342 /* mailbox command */
343 /********************************************/
345 lpfc_reg_login(struct lpfc_hba * phba,
346 uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
349 struct lpfc_dmabuf *mp;
351 struct lpfc_sli *psli;
355 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
357 mb->un.varRegLogin.rpi = 0;
358 mb->un.varRegLogin.did = did;
359 mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
361 mb->mbxOwner = OWN_HOST;
363 /* Get a buffer to hold NPorts Service Parameters */
364 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
365 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
369 mb->mbxCommand = MBX_REG_LOGIN64;
370 /* REG_LOGIN: no buffers */
371 lpfc_printf_log(phba,
374 "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
376 (uint32_t) did, (uint32_t) flag);
379 INIT_LIST_HEAD(&mp->list);
382 /* Copy param's into a new buffer */
383 memcpy(sparam, param, sizeof (struct serv_parm));
385 /* save address for completion */
386 pmb->context1 = (uint8_t *) mp;
388 mb->mbxCommand = MBX_REG_LOGIN64;
389 mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
390 mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
391 mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
396 /**********************************************/
397 /* lpfc_unreg_login Issue a UNREG_LOGIN */
398 /* mailbox command */
399 /**********************************************/
401 lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
406 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
408 mb->un.varUnregLogin.rpi = (uint16_t) rpi;
409 mb->un.varUnregLogin.rsvd1 = 0;
411 mb->mbxCommand = MBX_UNREG_LOGIN;
412 mb->mbxOwner = OWN_HOST;
417 lpfc_config_pcb_setup(struct lpfc_hba * phba)
419 struct lpfc_sli *psli = &phba->sli;
420 struct lpfc_sli_ring *pring;
421 PCB_t *pcbp = &phba->slim2p->pcb;
422 dma_addr_t pdma_addr;
427 pcbp->maxRing = (psli->num_rings - 1);
430 for (i = 0; i < psli->num_rings; i++) {
431 pring = &psli->ring[i];
432 /* A ring MUST have both cmd and rsp entries defined to be
434 if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
435 pcbp->rdsc[i].cmdEntries = 0;
436 pcbp->rdsc[i].rspEntries = 0;
437 pcbp->rdsc[i].cmdAddrHigh = 0;
438 pcbp->rdsc[i].rspAddrHigh = 0;
439 pcbp->rdsc[i].cmdAddrLow = 0;
440 pcbp->rdsc[i].rspAddrLow = 0;
441 pring->cmdringaddr = NULL;
442 pring->rspringaddr = NULL;
445 /* Command ring setup for ring */
447 (void *)&phba->slim2p->IOCBs[iocbCnt];
448 pcbp->rdsc[i].cmdEntries = pring->numCiocb;
450 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
451 (uint8_t *)phba->slim2p;
452 pdma_addr = phba->slim2p_mapping + offset;
453 pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
454 pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
455 iocbCnt += pring->numCiocb;
457 /* Response ring setup for ring */
459 (void *)&phba->slim2p->IOCBs[iocbCnt];
461 pcbp->rdsc[i].rspEntries = pring->numRiocb;
462 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
463 (uint8_t *)phba->slim2p;
464 pdma_addr = phba->slim2p_mapping + offset;
465 pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
466 pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
467 iocbCnt += pring->numRiocb;
472 lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
477 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
478 mb->un.varRdRev.cv = 1;
479 mb->mbxCommand = MBX_READ_REV;
480 mb->mbxOwner = OWN_HOST;
485 lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
488 MAILBOX_t *mb = &pmb->mb;
489 struct lpfc_sli *psli;
490 struct lpfc_sli_ring *pring;
492 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
494 mb->un.varCfgRing.ring = ring;
495 mb->un.varCfgRing.maxOrigXchg = 0;
496 mb->un.varCfgRing.maxRespXchg = 0;
497 mb->un.varCfgRing.recvNotify = 1;
500 pring = &psli->ring[ring];
501 mb->un.varCfgRing.numMask = pring->num_mask;
502 mb->mbxCommand = MBX_CONFIG_RING;
503 mb->mbxOwner = OWN_HOST;
505 /* Is this ring configured for a specific profile */
506 if (pring->prt[0].profile) {
507 mb->un.varCfgRing.profile = pring->prt[0].profile;
511 /* Otherwise we setup specific rctl / type masks for this ring */
512 for (i = 0; i < pring->num_mask; i++) {
513 mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
514 if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
515 mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
517 mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
518 mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
519 mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
526 lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
528 MAILBOX_t *mb = &pmb->mb;
529 dma_addr_t pdma_addr;
530 uint32_t bar_low, bar_high;
533 void __iomem *to_slim;
535 memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
536 mb->mbxCommand = MBX_CONFIG_PORT;
537 mb->mbxOwner = OWN_HOST;
539 mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
541 offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
542 pdma_addr = phba->slim2p_mapping + offset;
543 mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
544 mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
547 phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
548 phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
550 /* Setup Mailbox pointers */
551 phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
552 offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
553 pdma_addr = phba->slim2p_mapping + offset;
554 phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
555 phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
558 * Setup Host Group ring pointer.
560 * For efficiency reasons, the ring get/put pointers can be
561 * placed in adapter memory (SLIM) rather than in host memory.
562 * This allows firmware to avoid PCI reads/writes when updating
563 * and checking pointers.
565 * The firmware recognizes the use of SLIM memory by comparing
566 * the address of the get/put pointers structure with that of
567 * the SLIM BAR (BAR0).
569 * Caution: be sure to use the PCI config space value of BAR0/BAR1
570 * (the hardware's view of the base address), not the OS's
571 * value of pci_resource_start() as the OS value may be a cookie
576 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
577 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
580 /* mask off BAR0's flag bits 0 - 3 */
581 phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
582 (SLIMOFF*sizeof(uint32_t));
583 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
584 phba->slim2p->pcb.hgpAddrHigh = bar_high;
586 phba->slim2p->pcb.hgpAddrHigh = 0;
587 /* write HGP data to SLIM at the required longword offset */
588 memset(&hgp, 0, sizeof(struct lpfc_hgp));
589 to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
590 lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
592 /* Setup Port Group ring pointer */
593 offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
594 (uint8_t *)phba->slim2p;
595 pdma_addr = phba->slim2p_mapping + offset;
596 phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
597 phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
599 /* Use callback routine to setp rings in the pcb */
600 lpfc_config_pcb_setup(phba);
602 /* special handling for LC HBAs */
603 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
606 lpfc_hba_init(phba, hbainit);
608 memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
611 /* Swap PCB if needed */
612 lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
615 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
616 "%d:0405 Service Level Interface (SLI) 2 selected\n",
621 lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
623 struct lpfc_sli *psli;
627 list_add_tail(&mbq->list, &psli->mboxq);
635 lpfc_mbox_get(struct lpfc_hba * phba)
637 LPFC_MBOXQ_t *mbq = NULL;
638 struct lpfc_sli *psli = &phba->sli;
640 list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,