git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18 #include <linux/firmware.h>
  19 #include <linux/etherdevice.h>
  20 #include <linux/delay.h>
  21 #include <linux/completion.h>
  22 #include <net/mac80211.h>
  23
  24 #include "p54.h"
  25 #include "p54pci.h"
  26
  27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  29 MODULE_LICENSE("GPL");
  30 MODULE_ALIAS("prism54pci");
  31
  32 static struct pci_device_id p54p_table[] __devinitdata = {
  33         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  34         { PCI_DEVICE(0x1260, 0x3890) },
  35         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  36         { PCI_DEVICE(0x10b7, 0x6001) },
  37         /* Intersil PRISM Indigo Wireless LAN adapter */
  38         { PCI_DEVICE(0x1260, 0x3877) },
  39         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  40         { PCI_DEVICE(0x1260, 0x3886) },
  41         { },
  42 };
  43
  44 MODULE_DEVICE_TABLE(pci, p54p_table);
  45
  46 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  47 {
  48         struct p54p_priv *priv = dev->priv;
  49         const struct firmware *fw_entry = NULL;
  50         __le32 reg;
  51         int err;
  52         __le32 *data;
  53         u32 remains, left, device_addr;
  54
  55         P54P_WRITE(int_enable, cpu_to_le32(0));
  56         P54P_READ(int_enable);
  57         udelay(10);
  58
  59         reg = P54P_READ(ctrl_stat);
  60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  62         P54P_WRITE(ctrl_stat, reg);
  63         P54P_READ(ctrl_stat);
  64         udelay(10);
  65
  66         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  67         P54P_WRITE(ctrl_stat, reg);
  68         wmb();
  69         udelay(10);
  70
  71         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  72         P54P_WRITE(ctrl_stat, reg);
  73         wmb();
  74
  75         mdelay(50);
  76
  77         err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
  78         if (err) {
  79                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
  80                        "(isl3886)\n", pci_name(priv->pdev));
  81                 return err;
  82         }
  83
  84         p54_parse_firmware(dev, fw_entry);
  85
  86         data = (__le32 *) fw_entry->data;
  87         remains = fw_entry->size;
  88         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  89         while (remains) {
  90                 u32 i = 0;
  91                 left = min((u32)0x1000, remains);
  92                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  93                 P54P_READ(int_enable);
  94
  95                 device_addr += 0x1000;
  96                 while (i < left) {
  97                         P54P_WRITE(direct_mem_win[i], *data++);
  98                         i += sizeof(u32);
  99                 }
 100
 101                 remains -= left;
 102                 P54P_READ(int_enable);
 103         }
 104
 105         release_firmware(fw_entry);
 106
 107         reg = P54P_READ(ctrl_stat);
 108         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 109         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 110         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 111         P54P_WRITE(ctrl_stat, reg);
 112         P54P_READ(ctrl_stat);
 113         udelay(10);
 114
 115         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 116         P54P_WRITE(ctrl_stat, reg);
 117         wmb();
 118         udelay(10);
 119
 120         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 121         P54P_WRITE(ctrl_stat, reg);
 122         wmb();
 123         udelay(10);
 124
 125         return 0;
 126 }
 127
 128 static irqreturn_t p54p_simple_interrupt(int irq, void *dev_id)
 129 {
 130         struct p54p_priv *priv = (struct p54p_priv *) dev_id;
 131         __le32 reg;
 132
 133         reg = P54P_READ(int_ident);
 134         P54P_WRITE(int_ack, reg);
 135
 136         if (reg & P54P_READ(int_enable))
 137                 complete(&priv->boot_comp);
 138
 139         return IRQ_HANDLED;
 140 }
 141
 142 static int p54p_read_eeprom(struct ieee80211_hw *dev)
 143 {
 144         struct p54p_priv *priv = dev->priv;
 145         struct p54p_ring_control *ring_control = priv->ring_control;
 146         int err;
 147         struct p54_control_hdr *hdr;
 148         void *eeprom;
 149         dma_addr_t rx_mapping, tx_mapping;
 150         u16 alen;
 151
 152         init_completion(&priv->boot_comp);
 153         err = request_irq(priv->pdev->irq, &p54p_simple_interrupt,
 154                           IRQF_SHARED, "p54pci", priv);
 155         if (err) {
 156                 printk(KERN_ERR "%s (p54pci): failed to register IRQ handler\n",
 157                        pci_name(priv->pdev));
 158                 return err;
 159         }
 160
 161         eeprom = kmalloc(0x2010 + EEPROM_READBACK_LEN, GFP_KERNEL);
 162         if (!eeprom) {
 163                 printk(KERN_ERR "%s (p54pci): no memory for eeprom!\n",
 164                        pci_name(priv->pdev));
 165                 err = -ENOMEM;
 166                 goto out;
 167         }
 168
 169         memset(ring_control, 0, sizeof(*ring_control));
 170         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 171         P54P_READ(ring_control_base);
 172         udelay(10);
 173
 174         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 175         P54P_READ(int_enable);
 176         udelay(10);
 177
 178         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 179
 180         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 181                 printk(KERN_ERR "%s (p54pci): Cannot boot firmware!\n",
 182                        pci_name(priv->pdev));
 183                 err = -EINVAL;
 184                 goto out;
 185         }
 186
 187         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 188         P54P_READ(int_enable);
 189
 190         hdr = eeprom + 0x2010;
 191         p54_fill_eeprom_readback(hdr);
 192         hdr->req_id = cpu_to_le32(priv->common.rx_start);
 193
 194         rx_mapping = pci_map_single(priv->pdev, eeprom,
 195                                     0x2010, PCI_DMA_FROMDEVICE);
 196         tx_mapping = pci_map_single(priv->pdev, (void *)hdr,
 197                                     EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 198
 199         ring_control->rx_mgmt[0].host_addr = cpu_to_le32(rx_mapping);
 200         ring_control->rx_mgmt[0].len = cpu_to_le16(0x2010);
 201         ring_control->tx_data[0].host_addr = cpu_to_le32(tx_mapping);
 202         ring_control->tx_data[0].device_addr = hdr->req_id;
 203         ring_control->tx_data[0].len = cpu_to_le16(EEPROM_READBACK_LEN);
 204
 205         ring_control->host_idx[2] = cpu_to_le32(1);
 206         ring_control->host_idx[1] = cpu_to_le32(1);
 207
 208         wmb();
 209         mdelay(100);
 210         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 211
 212         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 213         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 214
 215         pci_unmap_single(priv->pdev, tx_mapping,
 216                          EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 217         pci_unmap_single(priv->pdev, rx_mapping,
 218                          0x2010, PCI_DMA_FROMDEVICE);
 219
 220         alen = le16_to_cpu(ring_control->rx_mgmt[0].len);
 221         if (le32_to_cpu(ring_control->device_idx[2]) != 1 ||
 222             alen < 0x10) {
 223                 printk(KERN_ERR "%s (p54pci): Cannot read eeprom!\n",
 224                        pci_name(priv->pdev));
 225                 err = -EINVAL;
 226                 goto out;
 227         }
 228
 229         p54_parse_eeprom(dev, (u8 *)eeprom + 0x10, alen - 0x10);
 230
 231  out:
 232         kfree(eeprom);
 233         P54P_WRITE(int_enable, cpu_to_le32(0));
 234         P54P_READ(int_enable);
 235         udelay(10);
 236         free_irq(priv->pdev->irq, priv);
 237         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 238         return err;
 239 }
 240
 241 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
 242         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 243         struct sk_buff **rx_buf)
 244 {
 245         struct p54p_priv *priv = dev->priv;
 246         struct p54p_ring_control *ring_control = priv->ring_control;
 247         u32 limit, idx, i;
 248
 249         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
 250         limit = idx;
 251         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
 252         limit = ring_limit - limit;
 253
 254         i = idx % ring_limit;
 255         while (limit-- > 1) {
 256                 struct p54p_desc *desc = &ring[i];
 257
 258                 if (!desc->host_addr) {
 259                         struct sk_buff *skb;
 260                         dma_addr_t mapping;
 261                         skb = dev_alloc_skb(MAX_RX_SIZE);
 262                         if (!skb)
 263                                 break;
 264
 265                         mapping = pci_map_single(priv->pdev,
 266                                                  skb_tail_pointer(skb),
 267                                                  MAX_RX_SIZE,
 268                                                  PCI_DMA_FROMDEVICE);
 269                         desc->host_addr = cpu_to_le32(mapping);
 270                         desc->device_addr = 0;  // FIXME: necessary?
 271                         desc->len = cpu_to_le16(MAX_RX_SIZE);
 272                         desc->flags = 0;
 273                         rx_buf[i] = skb;
 274                 }
 275
 276                 i++;
 277                 idx++;
 278                 i %= ring_limit;
 279         }
 280
 281         wmb();
 282         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
 283 }
 284
 285 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
 286         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 287         struct sk_buff **rx_buf)
 288 {
 289         struct p54p_priv *priv = dev->priv;
 290         struct p54p_ring_control *ring_control = priv->ring_control;
 291         struct p54p_desc *desc;
 292         u32 idx, i;
 293
 294         i = (*index) % ring_limit;
 295         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 296         idx %= ring_limit;
 297         while (i != idx) {
 298                 u16 len;
 299                 struct sk_buff *skb;
 300                 desc = &ring[i];
 301                 len = le16_to_cpu(desc->len);
 302                 skb = rx_buf[i];
 303
 304                 if (!skb)
 305                         continue;
 306
 307                 skb_put(skb, len);
 308
 309                 if (p54_rx(dev, skb)) {
 310                         pci_unmap_single(priv->pdev,
 311                                          le32_to_cpu(desc->host_addr),
 312                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 313                         rx_buf[i] = NULL;
 314                         desc->host_addr = 0;
 315                 } else {
 316                         skb_trim(skb, 0);
 317                         desc->len = cpu_to_le16(MAX_RX_SIZE);
 318                 }
 319
 320                 i++;
 321                 i %= ring_limit;
 322         }
 323
 324         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
 325 }
 326
 327 /* caller must hold priv->lock */
 328 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
 329         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 330         void **tx_buf)
 331 {
 332         struct p54p_priv *priv = dev->priv;
 333         struct p54p_ring_control *ring_control = priv->ring_control;
 334         struct p54p_desc *desc;
 335         u32 idx, i;
 336
 337         i = (*index) % ring_limit;
 338         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
 339         idx %= ring_limit;
 340
 341         while (i != idx) {
 342                 desc = &ring[i];
 343                 kfree(tx_buf[i]);
 344                 tx_buf[i] = NULL;
 345
 346                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 347                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 348
 349                 desc->host_addr = 0;
 350                 desc->device_addr = 0;
 351                 desc->len = 0;
 352                 desc->flags = 0;
 353
 354                 i++;
 355                 i %= ring_limit;
 356         }
 357 }
 358
 359 static void p54p_rx_tasklet(unsigned long dev_id)
 360 {
 361         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
 362         struct p54p_priv *priv = dev->priv;
 363         struct p54p_ring_control *ring_control = priv->ring_control;
 364
 365         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
 366                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
 367
 368         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
 369                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
 370
 371         wmb();
 372         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 373 }
 374
 375 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 376 {
 377         struct ieee80211_hw *dev = dev_id;
 378         struct p54p_priv *priv = dev->priv;
 379         struct p54p_ring_control *ring_control = priv->ring_control;
 380         __le32 reg;
 381
 382         spin_lock(&priv->lock);
 383         reg = P54P_READ(int_ident);
 384         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 385                 spin_unlock(&priv->lock);
 386                 return IRQ_HANDLED;
 387         }
 388
 389         P54P_WRITE(int_ack, reg);
 390
 391         reg &= P54P_READ(int_enable);
 392
 393         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 394                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
 395                                    3, ring_control->tx_mgmt,
 396                                    ARRAY_SIZE(ring_control->tx_mgmt),
 397                                    priv->tx_buf_mgmt);
 398
 399                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
 400                                    1, ring_control->tx_data,
 401                                    ARRAY_SIZE(ring_control->tx_data),
 402                                    priv->tx_buf_data);
 403
 404                 tasklet_schedule(&priv->rx_tasklet);
 405
 406         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 407                 complete(&priv->boot_comp);
 408
 409         spin_unlock(&priv->lock);
 410
 411         return reg ? IRQ_HANDLED : IRQ_NONE;
 412 }
 413
 414 static void p54p_tx(struct ieee80211_hw *dev, struct p54_control_hdr *data,
 415                     size_t len, int free_on_tx)
 416 {
 417         struct p54p_priv *priv = dev->priv;
 418         struct p54p_ring_control *ring_control = priv->ring_control;
 419         unsigned long flags;
 420         struct p54p_desc *desc;
 421         dma_addr_t mapping;
 422         u32 device_idx, idx, i;
 423
 424         spin_lock_irqsave(&priv->lock, flags);
 425
 426         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 427         idx = le32_to_cpu(ring_control->host_idx[1]);
 428         i = idx % ARRAY_SIZE(ring_control->tx_data);
 429
 430         mapping = pci_map_single(priv->pdev, data, len, PCI_DMA_TODEVICE);
 431         desc = &ring_control->tx_data[i];
 432         desc->host_addr = cpu_to_le32(mapping);
 433         desc->device_addr = data->req_id;
 434         desc->len = cpu_to_le16(len);
 435         desc->flags = 0;
 436
 437         wmb();
 438         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 439
 440         if (free_on_tx)
 441                 priv->tx_buf_data[i] = data;
 442
 443         spin_unlock_irqrestore(&priv->lock, flags);
 444
 445         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 446         P54P_READ(dev_int);
 447
 448         /* FIXME: unlikely to happen because the device usually runs out of
 449            memory before we fill the ring up, but we can make it impossible */
 450         if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2)
 451                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
 452 }
 453
 454 static int p54p_open(struct ieee80211_hw *dev)
 455 {
 456         struct p54p_priv *priv = dev->priv;
 457         int err;
 458
 459         init_completion(&priv->boot_comp);
 460         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 461                           IRQF_SHARED, "p54pci", dev);
 462         if (err) {
 463                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 464                        wiphy_name(dev->wiphy));
 465                 return err;
 466         }
 467
 468         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 469         priv->rx_idx_data = priv->tx_idx_data = 0;
 470         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
 471
 472         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
 473                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
 474
 475         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
 476                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
 477
 478         p54p_upload_firmware(dev);
 479
 480         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 481         P54P_READ(ring_control_base);
 482         wmb();
 483         udelay(10);
 484
 485         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 486         P54P_READ(int_enable);
 487         wmb();
 488         udelay(10);
 489
 490         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 491         P54P_READ(dev_int);
 492
 493         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 494                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 495                        wiphy_name(dev->wiphy));
 496                 free_irq(priv->pdev->irq, dev);
 497                 return -ETIMEDOUT;
 498         }
 499
 500         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 501         P54P_READ(int_enable);
 502         wmb();
 503         udelay(10);
 504
 505         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 506         P54P_READ(dev_int);
 507         wmb();
 508         udelay(10);
 509
 510         return 0;
 511 }
 512
 513 static void p54p_stop(struct ieee80211_hw *dev)
 514 {
 515         struct p54p_priv *priv = dev->priv;
 516         struct p54p_ring_control *ring_control = priv->ring_control;
 517         unsigned int i;
 518         struct p54p_desc *desc;
 519
 520         tasklet_kill(&priv->rx_tasklet);
 521
 522         P54P_WRITE(int_enable, cpu_to_le32(0));
 523         P54P_READ(int_enable);
 524         udelay(10);
 525
 526         free_irq(priv->pdev->irq, dev);
 527
 528         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 529
 530         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
 531                 desc = &ring_control->rx_data[i];
 532                 if (desc->host_addr)
 533                         pci_unmap_single(priv->pdev,
 534                                          le32_to_cpu(desc->host_addr),
 535                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 536                 kfree_skb(priv->rx_buf_data[i]);
 537                 priv->rx_buf_data[i] = NULL;
 538         }
 539
 540         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
 541                 desc = &ring_control->rx_mgmt[i];
 542                 if (desc->host_addr)
 543                         pci_unmap_single(priv->pdev,
 544                                          le32_to_cpu(desc->host_addr),
 545                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 546                 kfree_skb(priv->rx_buf_mgmt[i]);
 547                 priv->rx_buf_mgmt[i] = NULL;
 548         }
 549
 550         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
 551                 desc = &ring_control->tx_data[i];
 552                 if (desc->host_addr)
 553                         pci_unmap_single(priv->pdev,
 554                                          le32_to_cpu(desc->host_addr),
 555                                          le16_to_cpu(desc->len),
 556                                          PCI_DMA_TODEVICE);
 557
 558                 kfree(priv->tx_buf_data[i]);
 559                 priv->tx_buf_data[i] = NULL;
 560         }
 561
 562         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
 563                 desc = &ring_control->tx_mgmt[i];
 564                 if (desc->host_addr)
 565                         pci_unmap_single(priv->pdev,
 566                                          le32_to_cpu(desc->host_addr),
 567                                          le16_to_cpu(desc->len),
 568                                          PCI_DMA_TODEVICE);
 569
 570                 kfree(priv->tx_buf_mgmt[i]);
 571                 priv->tx_buf_mgmt[i] = NULL;
 572         }
 573
 574         memset(ring_control, 0, sizeof(*ring_control));
 575 }
 576
 577 static int __devinit p54p_probe(struct pci_dev *pdev,
 578                                 const struct pci_device_id *id)
 579 {
 580         struct p54p_priv *priv;
 581         struct ieee80211_hw *dev;
 582         unsigned long mem_addr, mem_len;
 583         int err;
 584         DECLARE_MAC_BUF(mac);
 585
 586         err = pci_enable_device(pdev);
 587         if (err) {
 588                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
 589                        pci_name(pdev));
 590                 return err;
 591         }
 592
 593         mem_addr = pci_resource_start(pdev, 0);
 594         mem_len = pci_resource_len(pdev, 0);
 595         if (mem_len < sizeof(struct p54p_csr)) {
 596                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
 597                        pci_name(pdev));
 598                 pci_disable_device(pdev);
 599                 return err;
 600         }
 601
 602         err = pci_request_regions(pdev, "p54pci");
 603         if (err) {
 604                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
 605                        pci_name(pdev));
 606                 return err;
 607         }
 608
 609         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 610             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 611                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
 612                        pci_name(pdev));
 613                 goto err_free_reg;
 614         }
 615
 616         pci_set_master(pdev);
 617         pci_try_set_mwi(pdev);
 618
 619         pci_write_config_byte(pdev, 0x40, 0);
 620         pci_write_config_byte(pdev, 0x41, 0);
 621
 622         dev = p54_init_common(sizeof(*priv));
 623         if (!dev) {
 624                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
 625                        pci_name(pdev));
 626                 err = -ENOMEM;
 627                 goto err_free_reg;
 628         }
 629
 630         priv = dev->priv;
 631         priv->pdev = pdev;
 632
 633         SET_IEEE80211_DEV(dev, &pdev->dev);
 634         pci_set_drvdata(pdev, dev);
 635
 636         priv->map = ioremap(mem_addr, mem_len);
 637         if (!priv->map) {
 638                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
 639                        pci_name(pdev));
 640                 err = -EINVAL;  // TODO: use a better error code?
 641                 goto err_free_dev;
 642         }
 643
 644         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 645                                                   &priv->ring_control_dma);
 646         if (!priv->ring_control) {
 647                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
 648                        pci_name(pdev));
 649                 err = -ENOMEM;
 650                 goto err_iounmap;
 651         }
 652         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 653
 654         err = p54p_upload_firmware(dev);
 655         if (err)
 656                 goto err_free_desc;
 657
 658         err = p54p_read_eeprom(dev);
 659         if (err)
 660                 goto err_free_desc;
 661
 662         priv->common.open = p54p_open;
 663         priv->common.stop = p54p_stop;
 664         priv->common.tx = p54p_tx;
 665
 666         spin_lock_init(&priv->lock);
 667         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
 668
 669         err = ieee80211_register_hw(dev);
 670         if (err) {
 671                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
 672                        pci_name(pdev));
 673                 goto err_free_common;
 674         }
 675
 676         printk(KERN_INFO "%s: hwaddr %s, isl38%02x\n",
 677                wiphy_name(dev->wiphy),
 678                print_mac(mac, dev->wiphy->perm_addr),
 679                priv->common.version);
 680
 681         return 0;
 682
 683  err_free_common:
 684         p54_free_common(dev);
 685
 686  err_free_desc:
 687         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 688                             priv->ring_control, priv->ring_control_dma);
 689
 690  err_iounmap:
 691         iounmap(priv->map);
 692
 693  err_free_dev:
 694         pci_set_drvdata(pdev, NULL);
 695         ieee80211_free_hw(dev);
 696
 697  err_free_reg:
 698         pci_release_regions(pdev);
 699         pci_disable_device(pdev);
 700         return err;
 701 }
 702
 703 static void __devexit p54p_remove(struct pci_dev *pdev)
 704 {
 705         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 706         struct p54p_priv *priv;
 707
 708         if (!dev)
 709                 return;
 710
 711         ieee80211_unregister_hw(dev);
 712         priv = dev->priv;
 713         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 714                             priv->ring_control, priv->ring_control_dma);
 715         p54_free_common(dev);
 716         iounmap(priv->map);
 717         pci_release_regions(pdev);
 718         pci_disable_device(pdev);
 719         ieee80211_free_hw(dev);
 720 }
 721
 722 #ifdef CONFIG_PM
 723 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 724 {
 725         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 726         struct p54p_priv *priv = dev->priv;
 727
 728         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
 729                 ieee80211_stop_queues(dev);
 730                 p54p_stop(dev);
 731         }
 732
 733         pci_save_state(pdev);
 734         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 735         return 0;
 736 }
 737
 738 static int p54p_resume(struct pci_dev *pdev)
 739 {
 740         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 741         struct p54p_priv *priv = dev->priv;
 742
 743         pci_set_power_state(pdev, PCI_D0);
 744         pci_restore_state(pdev);
 745
 746         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
 747                 p54p_open(dev);
 748                 ieee80211_wake_queues(dev);
 749         }
 750
 751         return 0;
 752 }
 753 #endif /* CONFIG_PM */
 754
 755 static struct pci_driver p54p_driver = {
 756         .name           = "p54pci",
 757         .id_table       = p54p_table,
 758         .probe          = p54p_probe,
 759         .remove         = __devexit_p(p54p_remove),
 760 #ifdef CONFIG_PM
 761         .suspend        = p54p_suspend,
 762         .resume         = p54p_resume,
 763 #endif /* CONFIG_PM */
 764 };
 765
 766 static int __init p54p_init(void)
 767 {
 768         return pci_register_driver(&p54p_driver);
 769 }
 770
 771 static void __exit p54p_exit(void)
 772 {
 773         pci_unregister_driver(&p54p_driver);
 774 }
 775
 776 module_init(p54p_init);
 777 module_exit(p54p_exit);