Pull virt-cpu-accounting into release branch
[linux-2.6] / arch / powerpc / boot / dts / mpc8377_mds.dts
1 /*
2  * MPC8377E MDS Device Tree Source
3  *
4  * Copyright 2007 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "fsl,mpc8377emds";
16         compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 serial0 = &serial0;
24                 serial1 = &serial1;
25                 pci0 = &pci0;
26         };
27
28         cpus {
29                 #address-cells = <1>;
30                 #size-cells = <0>;
31
32                 PowerPC,8377@0 {
33                         device_type = "cpu";
34                         reg = <0x0>;
35                         d-cache-line-size = <32>;
36                         i-cache-line-size = <32>;
37                         d-cache-size = <32768>;
38                         i-cache-size = <32768>;
39                         timebase-frequency = <0>;
40                         bus-frequency = <0>;
41                         clock-frequency = <0>;
42                 };
43         };
44
45         memory {
46                 device_type = "memory";
47                 reg = <0x00000000 0x20000000>;  // 512MB at 0
48         };
49
50         localbus@e0005000 {
51                 #address-cells = <2>;
52                 #size-cells = <1>;
53                 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
54                 reg = <0xe0005000 0x1000>;
55                 interrupts = <77 0x8>;
56                 interrupt-parent = <&ipic>;
57
58                 // booting from NOR flash
59                 ranges = <0 0x0 0xfe000000 0x02000000
60                           1 0x0 0xf8000000 0x00008000
61                           3 0x0 0xe0600000 0x00008000>;
62
63                 flash@0,0 {
64                         #address-cells = <1>;
65                         #size-cells = <1>;
66                         compatible = "cfi-flash";
67                         reg = <0 0x0 0x2000000>;
68                         bank-width = <2>;
69                         device-width = <1>;
70
71                         u-boot@0 {
72                                 reg = <0x0 0x100000>;
73                                 read-only;
74                         };
75
76                         fs@100000 {
77                                 reg = <0x100000 0x800000>;
78                         };
79
80                         kernel@1d00000 {
81                                 reg = <0x1d00000 0x200000>;
82                         };
83
84                         dtb@1f00000 {
85                                 reg = <0x1f00000 0x100000>;
86                         };
87                 };
88
89                 bcsr@1,0 {
90                         reg = <1 0x0 0x8000>;
91                         compatible = "fsl,mpc837xmds-bcsr";
92                 };
93
94                 nand@3,0 {
95                         #address-cells = <1>;
96                         #size-cells = <1>;
97                         compatible = "fsl,mpc8377-fcm-nand",
98                                      "fsl,elbc-fcm-nand";
99                         reg = <3 0x0 0x8000>;
100
101                         u-boot@0 {
102                                 reg = <0x0 0x100000>;
103                                 read-only;
104                         };
105
106                         kernel@100000 {
107                                 reg = <0x100000 0x300000>;
108                         };
109
110                         fs@400000 {
111                                 reg = <0x400000 0x1c00000>;
112                         };
113                 };
114         };
115
116         soc@e0000000 {
117                 #address-cells = <1>;
118                 #size-cells = <1>;
119                 device_type = "soc";
120                 ranges = <0x0 0xe0000000 0x00100000>;
121                 reg = <0xe0000000 0x00000200>;
122                 bus-frequency = <0>;
123
124                 wdt@200 {
125                         compatible = "mpc83xx_wdt";
126                         reg = <0x200 0x100>;
127                 };
128
129                 i2c@3000 {
130                         #address-cells = <1>;
131                         #size-cells = <0>;
132                         cell-index = <0>;
133                         compatible = "fsl-i2c";
134                         reg = <0x3000 0x100>;
135                         interrupts = <14 0x8>;
136                         interrupt-parent = <&ipic>;
137                         dfsrr;
138                 };
139
140                 i2c@3100 {
141                         #address-cells = <1>;
142                         #size-cells = <0>;
143                         cell-index = <1>;
144                         compatible = "fsl-i2c";
145                         reg = <0x3100 0x100>;
146                         interrupts = <15 0x8>;
147                         interrupt-parent = <&ipic>;
148                         dfsrr;
149                 };
150
151                 spi@7000 {
152                         cell-index = <0>;
153                         compatible = "fsl,spi";
154                         reg = <0x7000 0x1000>;
155                         interrupts = <16 0x8>;
156                         interrupt-parent = <&ipic>;
157                         mode = "cpu";
158                 };
159
160                 usb@23000 {
161                         compatible = "fsl-usb2-dr";
162                         reg = <0x23000 0x1000>;
163                         #address-cells = <1>;
164                         #size-cells = <0>;
165                         interrupt-parent = <&ipic>;
166                         interrupts = <38 0x8>;
167                         dr_mode = "host";
168                         phy_type = "ulpi";
169                 };
170
171                 mdio@24520 {
172                         #address-cells = <1>;
173                         #size-cells = <0>;
174                         compatible = "fsl,gianfar-mdio";
175                         reg = <0x24520 0x20>;
176                         phy2: ethernet-phy@2 {
177                                 interrupt-parent = <&ipic>;
178                                 interrupts = <17 0x8>;
179                                 reg = <0x2>;
180                                 device_type = "ethernet-phy";
181                         };
182                         phy3: ethernet-phy@3 {
183                                 interrupt-parent = <&ipic>;
184                                 interrupts = <18 0x8>;
185                                 reg = <0x3>;
186                                 device_type = "ethernet-phy";
187                         };
188                 };
189
190                 enet0: ethernet@24000 {
191                         cell-index = <0>;
192                         device_type = "network";
193                         model = "eTSEC";
194                         compatible = "gianfar";
195                         reg = <0x24000 0x1000>;
196                         local-mac-address = [ 00 00 00 00 00 00 ];
197                         interrupts = <32 0x8 33 0x8 34 0x8>;
198                         phy-connection-type = "mii";
199                         interrupt-parent = <&ipic>;
200                         phy-handle = <&phy2>;
201                 };
202
203                 enet1: ethernet@25000 {
204                         cell-index = <1>;
205                         device_type = "network";
206                         model = "eTSEC";
207                         compatible = "gianfar";
208                         reg = <0x25000 0x1000>;
209                         local-mac-address = [ 00 00 00 00 00 00 ];
210                         interrupts = <35 0x8 36 0x8 37 0x8>;
211                         phy-connection-type = "mii";
212                         interrupt-parent = <&ipic>;
213                         phy-handle = <&phy3>;
214                 };
215
216                 serial0: serial@4500 {
217                         cell-index = <0>;
218                         device_type = "serial";
219                         compatible = "ns16550";
220                         reg = <0x4500 0x100>;
221                         clock-frequency = <0>;
222                         interrupts = <9 0x8>;
223                         interrupt-parent = <&ipic>;
224                 };
225
226                 serial1: serial@4600 {
227                         cell-index = <1>;
228                         device_type = "serial";
229                         compatible = "ns16550";
230                         reg = <0x4600 0x100>;
231                         clock-frequency = <0>;
232                         interrupts = <10 0x8>;
233                         interrupt-parent = <&ipic>;
234                 };
235
236                 crypto@30000 {
237                         model = "SEC3";
238                         compatible = "talitos";
239                         reg = <0x30000 0x10000>;
240                         interrupts = <11 0x8>;
241                         interrupt-parent = <&ipic>;
242                         /* Rev. 3.0 geometry */
243                         num-channels = <4>;
244                         channel-fifo-len = <24>;
245                         exec-units-mask = <0x000001fe>;
246                         descriptor-types-mask = <0x03ab0ebf>;
247                 };
248
249                 sdhc@2e000 {
250                         model = "eSDHC";
251                         compatible = "fsl,esdhc";
252                         reg = <0x2e000 0x1000>;
253                         interrupts = <42 0x8>;
254                         interrupt-parent = <&ipic>;
255                 };
256
257                 sata@18000 {
258                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
259                         reg = <0x18000 0x1000>;
260                         interrupts = <44 0x8>;
261                         interrupt-parent = <&ipic>;
262                 };
263
264                 sata@19000 {
265                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
266                         reg = <0x19000 0x1000>;
267                         interrupts = <45 0x8>;
268                         interrupt-parent = <&ipic>;
269                 };
270
271                 /* IPIC
272                  * interrupts cell = <intr #, sense>
273                  * sense values match linux IORESOURCE_IRQ_* defines:
274                  * sense == 8: Level, low assertion
275                  * sense == 2: Edge, high-to-low change
276                  */
277                 ipic: pic@700 {
278                         compatible = "fsl,ipic";
279                         interrupt-controller;
280                         #address-cells = <0>;
281                         #interrupt-cells = <2>;
282                         reg = <0x700 0x100>;
283                 };
284         };
285
286         pci0: pci@e0008500 {
287                 cell-index = <0>;
288                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
289                 interrupt-map = <
290
291                                 /* IDSEL 0x11 */
292                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
293                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
294                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
295                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
296
297                                 /* IDSEL 0x12 */
298                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
299                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
300                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
301                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
302
303                                 /* IDSEL 0x13 */
304                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
305                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
306                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
307                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
308
309                                 /* IDSEL 0x15 */
310                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
311                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
312                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
313                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
314
315                                 /* IDSEL 0x16 */
316                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
317                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
318                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
319                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
320
321                                 /* IDSEL 0x17 */
322                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
323                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
324                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
325                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
326
327                                 /* IDSEL 0x18 */
328                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
329                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
330                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
331                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
332                 interrupt-parent = <&ipic>;
333                 interrupts = <66 0x8>;
334                 bus-range = <0x0 0x0>;
335                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
336                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
337                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
338                 clock-frequency = <0>;
339                 #interrupt-cells = <1>;
340                 #size-cells = <2>;
341                 #address-cells = <3>;
342                 reg = <0xe0008500 0x100>;
343                 compatible = "fsl,mpc8349-pci";
344                 device_type = "pci";
345         };
346 };