git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8180.h"
  26 #include "rtl8180_rtl8225.h"
  27 #include "rtl8180_sa2400.h"
  28 #include "rtl8180_max2820.h"
  29 #include "rtl8180_grf5101.h"
  30
  31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  34 MODULE_LICENSE("GPL");
  35
  36 static struct pci_device_id rtl8180_table[] __devinitdata = {
  37         /* rtl8185 */
  38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  41
  42         /* rtl8180 */
  43         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  44         { PCI_DEVICE(0x1799, 0x6001) },
  45         { PCI_DEVICE(0x1799, 0x6020) },
  46         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  47         { }
  48 };
  49
  50 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  51
  52 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  53 {
  54         struct rtl8180_priv *priv = dev->priv;
  55         int i = 10;
  56         u32 buf;
  57
  58         buf = (data << 8) | addr;
  59
  60         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  61         while (i--) {
  62                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  63                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  64                         return;
  65         }
  66 }
  67
  68 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
  69 {
  70         struct rtl8180_priv *priv = dev->priv;
  71         unsigned int count = 32;
  72
  73         while (count--) {
  74                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
  75                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
  76                 u32 flags = le32_to_cpu(entry->flags);
  77
  78                 if (flags & RTL8180_RX_DESC_FLAG_OWN)
  79                         return;
  80
  81                 if (unlikely(flags & (RTL8180_RX_DESC_FLAG_DMA_FAIL |
  82                                       RTL8180_RX_DESC_FLAG_FOF |
  83                                       RTL8180_RX_DESC_FLAG_RX_ERR)))
  84                         goto done;
  85                 else {
  86                         u32 flags2 = le32_to_cpu(entry->flags2);
  87                         struct ieee80211_rx_status rx_status = {0};
  88                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
  89
  90                         if (unlikely(!new_skb))
  91                                 goto done;
  92
  93                         pci_unmap_single(priv->pdev,
  94                                          *((dma_addr_t *)skb->cb),
  95                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
  96                         skb_put(skb, flags & 0xFFF);
  97
  98                         rx_status.antenna = (flags2 >> 15) & 1;
  99                         /* TODO: improve signal/rssi reporting */
 100                         rx_status.signal = flags2 & 0xFF;
 101                         rx_status.ssi = (flags2 >> 8) & 0x7F;
 102                         rx_status.rate = (flags >> 20) & 0xF;
 103                         rx_status.freq = dev->conf.freq;
 104                         rx_status.channel = dev->conf.channel;
 105                         rx_status.phymode = dev->conf.phymode;
 106                         rx_status.mactime = le64_to_cpu(entry->tsft);
 107                         rx_status.flag |= RX_FLAG_TSFT;
 108                         if (flags & RTL8180_RX_DESC_FLAG_CRC32_ERR)
 109                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 110
 111                         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 112
 113                         skb = new_skb;
 114                         priv->rx_buf[priv->rx_idx] = skb;
 115                         *((dma_addr_t *) skb->cb) =
 116                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 117                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 118                 }
 119
 120         done:
 121                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 122                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 123                                            MAX_RX_SIZE);
 124                 if (priv->rx_idx == 31)
 125                         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 126                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 127         }
 128 }
 129
 130 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 131 {
 132         struct rtl8180_priv *priv = dev->priv;
 133         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 134
 135         while (skb_queue_len(&ring->queue)) {
 136                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 137                 struct sk_buff *skb;
 138                 struct ieee80211_tx_status status;
 139                 struct ieee80211_tx_control *control;
 140                 u32 flags = le32_to_cpu(entry->flags);
 141
 142                 if (flags & RTL8180_TX_DESC_FLAG_OWN)
 143                         return;
 144
 145                 memset(&status, 0, sizeof(status));
 146
 147                 ring->idx = (ring->idx + 1) % ring->entries;
 148                 skb = __skb_dequeue(&ring->queue);
 149                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 150                                  skb->len, PCI_DMA_TODEVICE);
 151
 152                 control = *((struct ieee80211_tx_control **)skb->cb);
 153                 if (control)
 154                         memcpy(&status.control, control, sizeof(*control));
 155                 kfree(control);
 156
 157                 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
 158                         if (flags & RTL8180_TX_DESC_FLAG_TX_OK)
 159                                 status.flags = IEEE80211_TX_STATUS_ACK;
 160                         else
 161                                 status.excessive_retries = 1;
 162                 }
 163                 status.retry_count = flags & 0xFF;
 164
 165                 ieee80211_tx_status_irqsafe(dev, skb, &status);
 166                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 167                         ieee80211_wake_queue(dev, prio);
 168         }
 169 }
 170
 171 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 172 {
 173         struct ieee80211_hw *dev = dev_id;
 174         struct rtl8180_priv *priv = dev->priv;
 175         u16 reg;
 176
 177         spin_lock(&priv->lock);
 178         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 179         if (unlikely(reg == 0xFFFF)) {
 180                 spin_unlock(&priv->lock);
 181                 return IRQ_HANDLED;
 182         }
 183
 184         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 185
 186         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 187                 rtl8180_handle_tx(dev, 3);
 188
 189         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 190                 rtl8180_handle_tx(dev, 2);
 191
 192         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 193                 rtl8180_handle_tx(dev, 1);
 194
 195         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 196                 rtl8180_handle_tx(dev, 0);
 197
 198         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 199                 rtl8180_handle_rx(dev);
 200
 201         spin_unlock(&priv->lock);
 202
 203         return IRQ_HANDLED;
 204 }
 205
 206 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 207                       struct ieee80211_tx_control *control)
 208 {
 209         struct rtl8180_priv *priv = dev->priv;
 210         struct rtl8180_tx_ring *ring;
 211         struct rtl8180_tx_desc *entry;
 212         unsigned long flags;
 213         unsigned int idx, prio;
 214         dma_addr_t mapping;
 215         u32 tx_flags;
 216         u16 plcp_len = 0;
 217         __le16 rts_duration = 0;
 218
 219         prio = control->queue;
 220         ring = &priv->tx_ring[prio];
 221
 222         mapping = pci_map_single(priv->pdev, skb->data,
 223                                  skb->len, PCI_DMA_TODEVICE);
 224
 225         tx_flags = RTL8180_TX_DESC_FLAG_OWN | RTL8180_TX_DESC_FLAG_FS |
 226                    RTL8180_TX_DESC_FLAG_LS | (control->tx_rate << 24) |
 227                    (control->rts_cts_rate << 19) | skb->len;
 228
 229         if (priv->r8185)
 230                 tx_flags |= RTL8180_TX_DESC_FLAG_DMA |
 231                             RTL8180_TX_DESC_FLAG_NO_ENC;
 232
 233         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 234                 tx_flags |= RTL8180_TX_DESC_FLAG_RTS;
 235         else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
 236                 tx_flags |= RTL8180_TX_DESC_FLAG_CTS;
 237
 238         *((struct ieee80211_tx_control **) skb->cb) =
 239                 kmemdup(control, sizeof(*control), GFP_ATOMIC);
 240
 241         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 242                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 243                                                       control);
 244
 245         if (!priv->r8185) {
 246                 unsigned int remainder;
 247
 248                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 249                                         (control->rate->rate * 2) / 10);
 250                 remainder = (16 * (skb->len + 4)) %
 251                             ((control->rate->rate * 2) / 10);
 252                 if (remainder > 0 && remainder <= 6)
 253                         plcp_len |= 1 << 15;
 254         }
 255
 256         spin_lock_irqsave(&priv->lock, flags);
 257         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 258         entry = &ring->desc[idx];
 259
 260         entry->rts_duration = rts_duration;
 261         entry->plcp_len = cpu_to_le16(plcp_len);
 262         entry->tx_buf = cpu_to_le32(mapping);
 263         entry->frame_len = cpu_to_le32(skb->len);
 264         entry->flags2 = control->alt_retry_rate != -1 ?
 265                         control->alt_retry_rate << 4 : 0;
 266         entry->retry_limit = control->retry_limit;
 267         entry->flags = cpu_to_le32(tx_flags);
 268         __skb_queue_tail(&ring->queue, skb);
 269         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 270                 ieee80211_stop_queue(dev, control->queue);
 271         spin_unlock_irqrestore(&priv->lock, flags);
 272
 273         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 274
 275         return 0;
 276 }
 277
 278 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 279 {
 280         u8 reg;
 281
 282         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 283         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 284         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 285                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 286         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 287         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 288                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 289         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 290 }
 291
 292 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 293 {
 294         struct rtl8180_priv *priv = dev->priv;
 295         u16 reg;
 296
 297         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 298         rtl818x_ioread8(priv, &priv->map->CMD);
 299         msleep(10);
 300
 301         /* reset */
 302         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 303         rtl818x_ioread8(priv, &priv->map->CMD);
 304
 305         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 306         reg &= (1 << 1);
 307         reg |= RTL818X_CMD_RESET;
 308         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 309         rtl818x_ioread8(priv, &priv->map->CMD);
 310         msleep(200);
 311
 312         /* check success of reset */
 313         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 314                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 315                 return -ETIMEDOUT;
 316         }
 317
 318         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 319         rtl818x_ioread8(priv, &priv->map->CMD);
 320         msleep(200);
 321
 322         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 323                 /* For cardbus */
 324                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 325                 reg |= 1 << 1;
 326                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 327                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 328                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 329                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 330         }
 331
 332         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 333
 334         if (!priv->r8185)
 335                 rtl8180_set_anaparam(priv, priv->anaparam);
 336
 337         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 338         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 339         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 340         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 341         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 342
 343         /* TODO: necessary? specs indicate not */
 344         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 345         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 346         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 347         if (priv->r8185) {
 348                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 349                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 350         }
 351         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 352
 353         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 354
 355         /* TODO: turn off hw wep on rtl8180 */
 356
 357         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 358
 359         if (priv->r8185) {
 360                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 361                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 362                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 363
 364                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 365
 366                 /* TODO: set ClkRun enable? necessary? */
 367                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 368                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 369                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 370                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 371                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 372                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 373         } else {
 374                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 375                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 376
 377                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 378                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 379         }
 380
 381         priv->rf->init(dev);
 382         if (priv->r8185)
 383                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 384         return 0;
 385 }
 386
 387 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 388 {
 389         struct rtl8180_priv *priv = dev->priv;
 390         struct rtl8180_rx_desc *entry;
 391         int i;
 392
 393         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 394                                              sizeof(*priv->rx_ring) * 32,
 395                                              &priv->rx_ring_dma);
 396
 397         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 398                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 399                        wiphy_name(dev->wiphy));
 400                 return -ENOMEM;
 401         }
 402
 403         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 404         priv->rx_idx = 0;
 405
 406         for (i = 0; i < 32; i++) {
 407                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 408                 dma_addr_t *mapping;
 409                 entry = &priv->rx_ring[i];
 410                 if (!skb)
 411                         return 0;
 412
 413                 priv->rx_buf[i] = skb;
 414                 mapping = (dma_addr_t *)skb->cb;
 415                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 416                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 417                 entry->rx_buf = cpu_to_le32(*mapping);
 418                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 419                                            MAX_RX_SIZE);
 420         }
 421         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 422         return 0;
 423 }
 424
 425 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 426 {
 427         struct rtl8180_priv *priv = dev->priv;
 428         int i;
 429
 430         for (i = 0; i < 32; i++) {
 431                 struct sk_buff *skb = priv->rx_buf[i];
 432                 if (!skb)
 433                         continue;
 434
 435                 pci_unmap_single(priv->pdev,
 436                                  *((dma_addr_t *)skb->cb),
 437                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 438                 kfree_skb(skb);
 439         }
 440
 441         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 442                             priv->rx_ring, priv->rx_ring_dma);
 443         priv->rx_ring = NULL;
 444 }
 445
 446 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 447                                 unsigned int prio, unsigned int entries)
 448 {
 449         struct rtl8180_priv *priv = dev->priv;
 450         struct rtl8180_tx_desc *ring;
 451         dma_addr_t dma;
 452         int i;
 453
 454         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 455         if (!ring || (unsigned long)ring & 0xFF) {
 456                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 457                        wiphy_name(dev->wiphy), prio);
 458                 return -ENOMEM;
 459         }
 460
 461         memset(ring, 0, sizeof(*ring)*entries);
 462         priv->tx_ring[prio].desc = ring;
 463         priv->tx_ring[prio].dma = dma;
 464         priv->tx_ring[prio].idx = 0;
 465         priv->tx_ring[prio].entries = entries;
 466         skb_queue_head_init(&priv->tx_ring[prio].queue);
 467
 468         for (i = 0; i < entries; i++)
 469                 ring[i].next_tx_desc =
 470                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 471
 472         return 0;
 473 }
 474
 475 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 476 {
 477         struct rtl8180_priv *priv = dev->priv;
 478         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 479
 480         while (skb_queue_len(&ring->queue)) {
 481                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 482                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 483
 484                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 485                                  skb->len, PCI_DMA_TODEVICE);
 486                 kfree(*((struct ieee80211_tx_control **) skb->cb));
 487                 kfree_skb(skb);
 488                 ring->idx = (ring->idx + 1) % ring->entries;
 489         }
 490
 491         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 492                             ring->desc, ring->dma);
 493         ring->desc = NULL;
 494 }
 495
 496 static int rtl8180_start(struct ieee80211_hw *dev)
 497 {
 498         struct rtl8180_priv *priv = dev->priv;
 499         int ret, i;
 500         u32 reg;
 501
 502         ret = rtl8180_init_rx_ring(dev);
 503         if (ret)
 504                 return ret;
 505
 506         for (i = 0; i < 4; i++)
 507                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 508                         goto err_free_rings;
 509
 510         ret = rtl8180_init_hw(dev);
 511         if (ret)
 512                 goto err_free_rings;
 513
 514         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 515         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 516         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 517         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 518         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 519
 520         ret = request_irq(priv->pdev->irq, &rtl8180_interrupt,
 521                           IRQF_SHARED, KBUILD_MODNAME, dev);
 522         if (ret) {
 523                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 524                        wiphy_name(dev->wiphy));
 525                 goto err_free_rings;
 526         }
 527
 528         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 529
 530         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 531         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 532
 533         reg = RTL818X_RX_CONF_ONLYERLPKT |
 534               RTL818X_RX_CONF_RX_AUTORESETPHY |
 535               RTL818X_RX_CONF_MGMT |
 536               RTL818X_RX_CONF_DATA |
 537               (7 << 8 /* MAX RX DMA */) |
 538               RTL818X_RX_CONF_BROADCAST |
 539               RTL818X_RX_CONF_NICMAC;
 540
 541         if (priv->r8185)
 542                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 543         else {
 544                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 545                         ? RTL818X_RX_CONF_CSDM1 : 0;
 546                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 547                         ? RTL818X_RX_CONF_CSDM2 : 0;
 548         }
 549
 550         priv->rx_conf = reg;
 551         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 552
 553         if (priv->r8185) {
 554                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 555                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 556                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 557                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 558
 559                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 560                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 561                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 562                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 563                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 564
 565                 /* disable early TX */
 566                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 567         }
 568
 569         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 570         reg |= (6 << 21 /* MAX TX DMA */) |
 571                RTL818X_TX_CONF_NO_ICV;
 572
 573         if (priv->r8185)
 574                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 575         else
 576                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 577
 578         /* different meaning, same value on both rtl8185 and rtl8180 */
 579         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 580
 581         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 582
 583         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 584         reg |= RTL818X_CMD_RX_ENABLE;
 585         reg |= RTL818X_CMD_TX_ENABLE;
 586         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 587
 588         priv->mode = IEEE80211_IF_TYPE_MNTR;
 589         return 0;
 590
 591  err_free_rings:
 592         rtl8180_free_rx_ring(dev);
 593         for (i = 0; i < 4; i++)
 594                 if (priv->tx_ring[i].desc)
 595                         rtl8180_free_tx_ring(dev, i);
 596
 597         return ret;
 598 }
 599
 600 static void rtl8180_stop(struct ieee80211_hw *dev)
 601 {
 602         struct rtl8180_priv *priv = dev->priv;
 603         u8 reg;
 604         int i;
 605
 606         priv->mode = IEEE80211_IF_TYPE_INVALID;
 607
 608         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 609
 610         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 611         reg &= ~RTL818X_CMD_TX_ENABLE;
 612         reg &= ~RTL818X_CMD_RX_ENABLE;
 613         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 614
 615         priv->rf->stop(dev);
 616
 617         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 618         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 619         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 620         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 621
 622         free_irq(priv->pdev->irq, dev);
 623
 624         rtl8180_free_rx_ring(dev);
 625         for (i = 0; i < 4; i++)
 626                 rtl8180_free_tx_ring(dev, i);
 627 }
 628
 629 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 630                                  struct ieee80211_if_init_conf *conf)
 631 {
 632         struct rtl8180_priv *priv = dev->priv;
 633
 634         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 635                 return -EOPNOTSUPP;
 636
 637         switch (conf->type) {
 638         case IEEE80211_IF_TYPE_STA:
 639                 priv->mode = conf->type;
 640                 break;
 641         default:
 642                 return -EOPNOTSUPP;
 643         }
 644
 645         priv->vif = conf->vif;
 646
 647         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 648         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 649                           cpu_to_le32(*(u32 *)conf->mac_addr));
 650         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 651                           cpu_to_le16(*(u16 *)(conf->mac_addr + 4)));
 652         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 653
 654         return 0;
 655 }
 656
 657 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 658                                      struct ieee80211_if_init_conf *conf)
 659 {
 660         struct rtl8180_priv *priv = dev->priv;
 661         priv->mode = IEEE80211_IF_TYPE_MNTR;
 662         priv->vif = NULL;
 663 }
 664
 665 static int rtl8180_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 666 {
 667         struct rtl8180_priv *priv = dev->priv;
 668
 669         priv->rf->set_chan(dev, conf);
 670
 671         return 0;
 672 }
 673
 674 static int rtl8180_config_interface(struct ieee80211_hw *dev,
 675                                     struct ieee80211_vif *vif,
 676                                     struct ieee80211_if_conf *conf)
 677 {
 678         struct rtl8180_priv *priv = dev->priv;
 679         int i;
 680
 681         for (i = 0; i < ETH_ALEN; i++)
 682                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 683
 684         if (is_valid_ether_addr(conf->bssid))
 685                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
 686         else
 687                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
 688
 689         return 0;
 690 }
 691
 692 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 693                                      unsigned int changed_flags,
 694                                      unsigned int *total_flags,
 695                                      int mc_count, struct dev_addr_list *mclist)
 696 {
 697         struct rtl8180_priv *priv = dev->priv;
 698
 699         if (changed_flags & FIF_FCSFAIL)
 700                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 701         if (changed_flags & FIF_CONTROL)
 702                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 703         if (changed_flags & FIF_OTHER_BSS)
 704                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 705         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 706                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 707         else
 708                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 709
 710         *total_flags = 0;
 711
 712         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 713                 *total_flags |= FIF_FCSFAIL;
 714         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 715                 *total_flags |= FIF_CONTROL;
 716         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 717                 *total_flags |= FIF_OTHER_BSS;
 718         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 719                 *total_flags |= FIF_ALLMULTI;
 720
 721         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 722 }
 723
 724 static const struct ieee80211_ops rtl8180_ops = {
 725         .tx                     = rtl8180_tx,
 726         .start                  = rtl8180_start,
 727         .stop                   = rtl8180_stop,
 728         .add_interface          = rtl8180_add_interface,
 729         .remove_interface       = rtl8180_remove_interface,
 730         .config                 = rtl8180_config,
 731         .config_interface       = rtl8180_config_interface,
 732         .configure_filter       = rtl8180_configure_filter,
 733 };
 734
 735 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 736 {
 737         struct ieee80211_hw *dev = eeprom->data;
 738         struct rtl8180_priv *priv = dev->priv;
 739         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 740
 741         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 742         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 743         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 744         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 745 }
 746
 747 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 748 {
 749         struct ieee80211_hw *dev = eeprom->data;
 750         struct rtl8180_priv *priv = dev->priv;
 751         u8 reg = 2 << 6;
 752
 753         if (eeprom->reg_data_in)
 754                 reg |= RTL818X_EEPROM_CMD_WRITE;
 755         if (eeprom->reg_data_out)
 756                 reg |= RTL818X_EEPROM_CMD_READ;
 757         if (eeprom->reg_data_clock)
 758                 reg |= RTL818X_EEPROM_CMD_CK;
 759         if (eeprom->reg_chip_select)
 760                 reg |= RTL818X_EEPROM_CMD_CS;
 761
 762         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 763         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 764         udelay(10);
 765 }
 766
 767 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 768                                    const struct pci_device_id *id)
 769 {
 770         struct ieee80211_hw *dev;
 771         struct rtl8180_priv *priv;
 772         unsigned long mem_addr, mem_len;
 773         unsigned int io_addr, io_len;
 774         int err, i;
 775         struct eeprom_93cx6 eeprom;
 776         const char *chip_name, *rf_name = NULL;
 777         u32 reg;
 778         u16 eeprom_val;
 779         DECLARE_MAC_BUF(mac);
 780
 781         err = pci_enable_device(pdev);
 782         if (err) {
 783                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 784                        pci_name(pdev));
 785                 return err;
 786         }
 787
 788         err = pci_request_regions(pdev, KBUILD_MODNAME);
 789         if (err) {
 790                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 791                        pci_name(pdev));
 792                 return err;
 793         }
 794
 795         io_addr = pci_resource_start(pdev, 0);
 796         io_len = pci_resource_len(pdev, 0);
 797         mem_addr = pci_resource_start(pdev, 1);
 798         mem_len = pci_resource_len(pdev, 1);
 799
 800         if (mem_len < sizeof(struct rtl818x_csr) ||
 801             io_len < sizeof(struct rtl818x_csr)) {
 802                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 803                        pci_name(pdev));
 804                 err = -ENOMEM;
 805                 goto err_free_reg;
 806         }
 807
 808         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 809             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 810                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 811                        pci_name(pdev));
 812                 goto err_free_reg;
 813         }
 814
 815         pci_set_master(pdev);
 816
 817         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 818         if (!dev) {
 819                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 820                        pci_name(pdev));
 821                 err = -ENOMEM;
 822                 goto err_free_reg;
 823         }
 824
 825         priv = dev->priv;
 826         priv->pdev = pdev;
 827
 828         SET_IEEE80211_DEV(dev, &pdev->dev);
 829         pci_set_drvdata(pdev, dev);
 830
 831         priv->map = pci_iomap(pdev, 1, mem_len);
 832         if (!priv->map)
 833                 priv->map = pci_iomap(pdev, 0, io_len);
 834
 835         if (!priv->map) {
 836                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 837                        pci_name(pdev));
 838                 goto err_free_dev;
 839         }
 840
 841         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 842         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 843         priv->modes[0].mode = MODE_IEEE80211G;
 844         priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
 845         priv->modes[0].rates = priv->rates;
 846         priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
 847         priv->modes[0].channels = priv->channels;
 848         priv->modes[1].mode = MODE_IEEE80211B;
 849         priv->modes[1].num_rates = 4;
 850         priv->modes[1].rates = priv->rates;
 851         priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
 852         priv->modes[1].channels = priv->channels;
 853         priv->mode = IEEE80211_IF_TYPE_INVALID;
 854         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 855                      IEEE80211_HW_RX_INCLUDES_FCS;
 856         dev->queues = 1;
 857         dev->max_rssi = 65;
 858
 859         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 860         reg &= RTL818X_TX_CONF_HWVER_MASK;
 861         switch (reg) {
 862         case RTL818X_TX_CONF_R8180_ABCD:
 863                 chip_name = "RTL8180";
 864                 break;
 865         case RTL818X_TX_CONF_R8180_F:
 866                 chip_name = "RTL8180vF";
 867                 break;
 868         case RTL818X_TX_CONF_R8185_ABC:
 869                 chip_name = "RTL8185";
 870                 break;
 871         case RTL818X_TX_CONF_R8185_D:
 872                 chip_name = "RTL8185vD";
 873                 break;
 874         default:
 875                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
 876                        pci_name(pdev), reg >> 25);
 877                 goto err_iounmap;
 878         }
 879
 880         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
 881         if (priv->r8185) {
 882                 if ((err = ieee80211_register_hwmode(dev, &priv->modes[0])))
 883                         goto err_iounmap;
 884
 885                 pci_try_set_mwi(pdev);
 886         }
 887
 888         if ((err = ieee80211_register_hwmode(dev, &priv->modes[1])))
 889                 goto err_iounmap;
 890
 891         eeprom.data = dev;
 892         eeprom.register_read = rtl8180_eeprom_register_read;
 893         eeprom.register_write = rtl8180_eeprom_register_write;
 894         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 895                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 896         else
 897                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 898
 899         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
 900         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 901         udelay(10);
 902
 903         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
 904         eeprom_val &= 0xFF;
 905         switch (eeprom_val) {
 906         case 1: rf_name = "Intersil";
 907                 break;
 908         case 2: rf_name = "RFMD";
 909                 break;
 910         case 3: priv->rf = &sa2400_rf_ops;
 911                 break;
 912         case 4: priv->rf = &max2820_rf_ops;
 913                 break;
 914         case 5: priv->rf = &grf5101_rf_ops;
 915                 break;
 916         case 9: priv->rf = rtl8180_detect_rf(dev);
 917                 break;
 918         case 10:
 919                 rf_name = "RTL8255";
 920                 break;
 921         default:
 922                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
 923                        pci_name(pdev), eeprom_val);
 924                 goto err_iounmap;
 925         }
 926
 927         if (!priv->rf) {
 928                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
 929                        pci_name(pdev), rf_name);
 930                 goto err_iounmap;
 931         }
 932
 933         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
 934         priv->csthreshold = eeprom_val >> 8;
 935         if (!priv->r8185) {
 936                 __le32 anaparam;
 937                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
 938                 priv->anaparam = le32_to_cpu(anaparam);
 939                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
 940         }
 941
 942         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
 943         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 944                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
 945                        " randomly generated MAC addr\n", pci_name(pdev));
 946                 random_ether_addr(dev->wiphy->perm_addr);
 947         }
 948
 949         /* CCK TX power */
 950         for (i = 0; i < 14; i += 2) {
 951                 u16 txpwr;
 952                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
 953                 priv->channels[i].val = txpwr & 0xFF;
 954                 priv->channels[i + 1].val = txpwr >> 8;
 955         }
 956
 957         /* OFDM TX power */
 958         if (priv->r8185) {
 959                 for (i = 0; i < 14; i += 2) {
 960                         u16 txpwr;
 961                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
 962                         priv->channels[i].val |= (txpwr & 0xFF) << 8;
 963                         priv->channels[i + 1].val |= txpwr & 0xFF00;
 964                 }
 965         }
 966
 967         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 968
 969         spin_lock_init(&priv->lock);
 970
 971         err = ieee80211_register_hw(dev);
 972         if (err) {
 973                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
 974                        pci_name(pdev));
 975                 goto err_iounmap;
 976         }
 977
 978         printk(KERN_INFO "%s: hwaddr %s, %s + %s\n",
 979                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
 980                chip_name, priv->rf->name);
 981
 982         return 0;
 983
 984  err_iounmap:
 985         iounmap(priv->map);
 986
 987  err_free_dev:
 988         pci_set_drvdata(pdev, NULL);
 989         ieee80211_free_hw(dev);
 990
 991  err_free_reg:
 992         pci_release_regions(pdev);
 993         pci_disable_device(pdev);
 994         return err;
 995 }
 996
 997 static void __devexit rtl8180_remove(struct pci_dev *pdev)
 998 {
 999         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1000         struct rtl8180_priv *priv;
1001
1002         if (!dev)
1003                 return;
1004
1005         ieee80211_unregister_hw(dev);
1006
1007         priv = dev->priv;
1008
1009         pci_iounmap(pdev, priv->map);
1010         pci_release_regions(pdev);
1011         pci_disable_device(pdev);
1012         ieee80211_free_hw(dev);
1013 }
1014
1015 #ifdef CONFIG_PM
1016 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1017 {
1018         pci_save_state(pdev);
1019         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1020         return 0;
1021 }
1022
1023 static int rtl8180_resume(struct pci_dev *pdev)
1024 {
1025         pci_set_power_state(pdev, PCI_D0);
1026         pci_restore_state(pdev);
1027         return 0;
1028 }
1029
1030 #endif /* CONFIG_PM */
1031
1032 static struct pci_driver rtl8180_driver = {
1033         .name           = KBUILD_MODNAME,
1034         .id_table       = rtl8180_table,
1035         .probe          = rtl8180_probe,
1036         .remove         = __devexit_p(rtl8180_remove),
1037 #ifdef CONFIG_PM
1038         .suspend        = rtl8180_suspend,
1039         .resume         = rtl8180_resume,
1040 #endif /* CONFIG_PM */
1041 };
1042
1043 static int __init rtl8180_init(void)
1044 {
1045         return pci_register_driver(&rtl8180_driver);
1046 }
1047
1048 static void __exit rtl8180_exit(void)
1049 {
1050         pci_unregister_driver(&rtl8180_driver);
1051 }
1052
1053 module_init(rtl8180_init);
1054 module_exit(rtl8180_exit);