2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/pci.h>
20 #include <pcmcia/cs_types.h>
21 #include <pcmcia/cs.h>
22 #include <pcmcia/cistpl.h>
23 #include <pcmcia/ds.h>
26 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
27 MODULE_LICENSE("GPL");
30 /* Temporary list of yet-to-be-attached buses */
31 static LIST_HEAD(attach_queue);
32 /* List if running buses */
33 static LIST_HEAD(buses);
34 /* Software ID counter */
35 static unsigned int next_busnumber;
36 /* buses_mutes locks the two buslists and the next_busnumber.
37 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
38 static DEFINE_MUTEX(buses_mutex);
40 /* There are differences in the codeflow, if the bus is
41 * initialized from early boot, as various needed services
42 * are not available early. This is a mechanism to delay
43 * these initializations to after early boot has finished.
44 * It's also used to avoid mutex locking, as that's not
45 * available and needed early. */
46 static bool ssb_is_early_boot = 1;
48 static void ssb_buses_lock(void);
49 static void ssb_buses_unlock(void);
52 #ifdef CONFIG_SSB_PCIHOST
53 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
58 list_for_each_entry(bus, &buses, list) {
59 if (bus->bustype == SSB_BUSTYPE_PCI &&
60 bus->host_pci == pdev)
69 #endif /* CONFIG_SSB_PCIHOST */
71 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
78 static void ssb_device_put(struct ssb_device *dev)
84 static int ssb_bus_resume(struct ssb_bus *bus)
88 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
89 err = ssb_pcmcia_init(bus);
91 /* No need to disable XTAL, as we don't have one on PCMCIA. */
94 ssb_chipco_resume(&bus->chipco);
99 static int ssb_device_resume(struct device *dev)
101 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
102 struct ssb_driver *ssb_drv;
107 if (bus->suspend_cnt == bus->nr_devices) {
108 err = ssb_bus_resume(bus);
114 ssb_drv = drv_to_ssb_drv(dev->driver);
115 if (ssb_drv && ssb_drv->resume)
116 err = ssb_drv->resume(ssb_dev);
124 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
126 ssb_chipco_suspend(&bus->chipco, state);
127 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
129 /* Reset HW state information in memory, so that HW is
130 * completely reinitialized on resume. */
131 bus->mapped_device = NULL;
132 #ifdef CONFIG_SSB_DRIVER_PCICORE
133 bus->pcicore.setup_done = 0;
135 #ifdef CONFIG_SSB_DEBUG
140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
148 ssb_drv = drv_to_ssb_drv(dev->driver);
149 if (ssb_drv && ssb_drv->suspend)
150 err = ssb_drv->suspend(ssb_dev, state);
157 if (bus->suspend_cnt == bus->nr_devices) {
158 /* All devices suspended. Shutdown the bus. */
159 ssb_bus_suspend(bus, state);
166 #ifdef CONFIG_SSB_PCIHOST
167 int ssb_devices_freeze(struct ssb_bus *bus)
169 struct ssb_device *dev;
170 struct ssb_driver *drv;
173 pm_message_t state = PMSG_FREEZE;
175 /* First check that we are capable to freeze all devices. */
176 for (i = 0; i < bus->nr_devices; i++) {
177 dev = &(bus->devices[i]);
180 !device_is_registered(dev->dev))
182 drv = drv_to_ssb_drv(dev->dev->driver);
186 /* Nope, can't suspend this one. */
190 /* Now suspend all devices */
191 for (i = 0; i < bus->nr_devices; i++) {
192 dev = &(bus->devices[i]);
195 !device_is_registered(dev->dev))
197 drv = drv_to_ssb_drv(dev->dev->driver);
200 err = drv->suspend(dev, state);
202 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
210 for (i--; i >= 0; i--) {
211 dev = &(bus->devices[i]);
214 !device_is_registered(dev->dev))
216 drv = drv_to_ssb_drv(dev->dev->driver);
225 int ssb_devices_thaw(struct ssb_bus *bus)
227 struct ssb_device *dev;
228 struct ssb_driver *drv;
232 for (i = 0; i < bus->nr_devices; i++) {
233 dev = &(bus->devices[i]);
236 !device_is_registered(dev->dev))
238 drv = drv_to_ssb_drv(dev->dev->driver);
241 if (SSB_WARN_ON(!drv->resume))
243 err = drv->resume(dev);
245 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
252 #endif /* CONFIG_SSB_PCIHOST */
254 static void ssb_device_shutdown(struct device *dev)
256 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
257 struct ssb_driver *ssb_drv;
261 ssb_drv = drv_to_ssb_drv(dev->driver);
262 if (ssb_drv && ssb_drv->shutdown)
263 ssb_drv->shutdown(ssb_dev);
266 static int ssb_device_remove(struct device *dev)
268 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
269 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
271 if (ssb_drv && ssb_drv->remove)
272 ssb_drv->remove(ssb_dev);
273 ssb_device_put(ssb_dev);
278 static int ssb_device_probe(struct device *dev)
280 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
281 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
284 ssb_device_get(ssb_dev);
285 if (ssb_drv && ssb_drv->probe)
286 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
288 ssb_device_put(ssb_dev);
293 static int ssb_match_devid(const struct ssb_device_id *tabid,
294 const struct ssb_device_id *devid)
296 if ((tabid->vendor != devid->vendor) &&
297 tabid->vendor != SSB_ANY_VENDOR)
299 if ((tabid->coreid != devid->coreid) &&
300 tabid->coreid != SSB_ANY_ID)
302 if ((tabid->revision != devid->revision) &&
303 tabid->revision != SSB_ANY_REV)
308 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
310 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
311 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
312 const struct ssb_device_id *id;
314 for (id = ssb_drv->id_table;
315 id->vendor || id->coreid || id->revision;
317 if (ssb_match_devid(id, &ssb_dev->id))
318 return 1; /* found */
324 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
326 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
331 return add_uevent_var(env,
332 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
333 ssb_dev->id.vendor, ssb_dev->id.coreid,
334 ssb_dev->id.revision);
337 static struct bus_type ssb_bustype = {
339 .match = ssb_bus_match,
340 .probe = ssb_device_probe,
341 .remove = ssb_device_remove,
342 .shutdown = ssb_device_shutdown,
343 .suspend = ssb_device_suspend,
344 .resume = ssb_device_resume,
345 .uevent = ssb_device_uevent,
348 static void ssb_buses_lock(void)
350 /* See the comment at the ssb_is_early_boot definition */
351 if (!ssb_is_early_boot)
352 mutex_lock(&buses_mutex);
355 static void ssb_buses_unlock(void)
357 /* See the comment at the ssb_is_early_boot definition */
358 if (!ssb_is_early_boot)
359 mutex_unlock(&buses_mutex);
362 static void ssb_devices_unregister(struct ssb_bus *bus)
364 struct ssb_device *sdev;
367 for (i = bus->nr_devices - 1; i >= 0; i--) {
368 sdev = &(bus->devices[i]);
370 device_unregister(sdev->dev);
374 void ssb_bus_unregister(struct ssb_bus *bus)
377 ssb_devices_unregister(bus);
378 list_del(&bus->list);
381 /* ssb_pcmcia_exit(bus); */
385 EXPORT_SYMBOL(ssb_bus_unregister);
387 static void ssb_release_dev(struct device *dev)
389 struct __ssb_dev_wrapper *devwrap;
391 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
395 static int ssb_devices_register(struct ssb_bus *bus)
397 struct ssb_device *sdev;
399 struct __ssb_dev_wrapper *devwrap;
403 for (i = 0; i < bus->nr_devices; i++) {
404 sdev = &(bus->devices[i]);
406 /* We don't register SSB-system devices to the kernel,
407 * as the drivers for them are built into SSB. */
408 switch (sdev->id.coreid) {
409 case SSB_DEV_CHIPCOMMON:
414 case SSB_DEV_MIPS_3302:
419 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
421 ssb_printk(KERN_ERR PFX
422 "Could not allocate device\n");
427 devwrap->sdev = sdev;
429 dev->release = ssb_release_dev;
430 dev->bus = &ssb_bustype;
431 snprintf(dev->bus_id, sizeof(dev->bus_id),
432 "ssb%u:%d", bus->busnumber, dev_idx);
434 switch (bus->bustype) {
435 case SSB_BUSTYPE_PCI:
436 #ifdef CONFIG_SSB_PCIHOST
437 sdev->irq = bus->host_pci->irq;
438 dev->parent = &bus->host_pci->dev;
439 sdev->dma_dev = &bus->host_pci->dev;
442 case SSB_BUSTYPE_PCMCIA:
443 #ifdef CONFIG_SSB_PCMCIAHOST
444 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
445 dev->parent = &bus->host_pcmcia->dev;
446 sdev->dma_dev = &bus->host_pcmcia->dev;
449 case SSB_BUSTYPE_SSB:
455 err = device_register(dev);
457 ssb_printk(KERN_ERR PFX
458 "Could not register %s\n",
460 /* Set dev to NULL to not unregister
461 * dev on error unwinding. */
471 /* Unwind the already registered devices. */
472 ssb_devices_unregister(bus);
476 /* Needs ssb_buses_lock() */
477 static int ssb_attach_queued_buses(void)
479 struct ssb_bus *bus, *n;
481 int drop_them_all = 0;
483 list_for_each_entry_safe(bus, n, &attach_queue, list) {
485 list_del(&bus->list);
488 /* Can't init the PCIcore in ssb_bus_register(), as that
489 * is too early in boot for embedded systems
490 * (no udelay() available). So do it here in attach stage.
492 err = ssb_bus_powerup(bus, 0);
495 ssb_pcicore_init(&bus->pcicore);
496 ssb_bus_may_powerdown(bus);
498 err = ssb_devices_register(bus);
502 list_del(&bus->list);
505 list_move_tail(&bus->list, &buses);
511 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
513 struct ssb_bus *bus = dev->bus;
515 offset += dev->core_index * SSB_CORE_SIZE;
516 return readw(bus->mmio + offset);
519 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
521 struct ssb_bus *bus = dev->bus;
523 offset += dev->core_index * SSB_CORE_SIZE;
524 return readl(bus->mmio + offset);
527 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
529 struct ssb_bus *bus = dev->bus;
531 offset += dev->core_index * SSB_CORE_SIZE;
532 writew(value, bus->mmio + offset);
535 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
537 struct ssb_bus *bus = dev->bus;
539 offset += dev->core_index * SSB_CORE_SIZE;
540 writel(value, bus->mmio + offset);
543 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
544 static const struct ssb_bus_ops ssb_ssb_ops = {
545 .read16 = ssb_ssb_read16,
546 .read32 = ssb_ssb_read32,
547 .write16 = ssb_ssb_write16,
548 .write32 = ssb_ssb_write32,
551 static int ssb_fetch_invariants(struct ssb_bus *bus,
552 ssb_invariants_func_t get_invariants)
554 struct ssb_init_invariants iv;
557 memset(&iv, 0, sizeof(iv));
558 err = get_invariants(bus, &iv);
561 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
562 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
563 bus->has_cardbus_slot = iv.has_cardbus_slot;
568 static int ssb_bus_register(struct ssb_bus *bus,
569 ssb_invariants_func_t get_invariants,
570 unsigned long baseaddr)
574 spin_lock_init(&bus->bar_lock);
575 INIT_LIST_HEAD(&bus->list);
576 #ifdef CONFIG_SSB_EMBEDDED
577 spin_lock_init(&bus->gpio_lock);
580 /* Powerup the bus */
581 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
585 bus->busnumber = next_busnumber;
586 /* Scan for devices (cores) */
587 err = ssb_bus_scan(bus, baseaddr);
589 goto err_disable_xtal;
591 /* Init PCI-host device (if any) */
592 err = ssb_pci_init(bus);
595 /* Init PCMCIA-host device (if any) */
596 err = ssb_pcmcia_init(bus);
600 /* Initialize basic system devices (if available) */
601 err = ssb_bus_powerup(bus, 0);
603 goto err_pcmcia_exit;
604 ssb_chipcommon_init(&bus->chipco);
605 ssb_mipscore_init(&bus->mipscore);
606 err = ssb_fetch_invariants(bus, get_invariants);
608 ssb_bus_may_powerdown(bus);
609 goto err_pcmcia_exit;
611 ssb_bus_may_powerdown(bus);
613 /* Queue it for attach.
614 * See the comment at the ssb_is_early_boot definition. */
615 list_add_tail(&bus->list, &attach_queue);
616 if (!ssb_is_early_boot) {
617 /* This is not early boot, so we must attach the bus now */
618 err = ssb_attach_queued_buses();
629 list_del(&bus->list);
631 /* ssb_pcmcia_exit(bus); */
638 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
642 #ifdef CONFIG_SSB_PCIHOST
643 int ssb_bus_pcibus_register(struct ssb_bus *bus,
644 struct pci_dev *host_pci)
648 bus->bustype = SSB_BUSTYPE_PCI;
649 bus->host_pci = host_pci;
650 bus->ops = &ssb_pci_ops;
652 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
654 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
655 "PCI device %s\n", host_pci->dev.bus_id);
660 EXPORT_SYMBOL(ssb_bus_pcibus_register);
661 #endif /* CONFIG_SSB_PCIHOST */
663 #ifdef CONFIG_SSB_PCMCIAHOST
664 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
665 struct pcmcia_device *pcmcia_dev,
666 unsigned long baseaddr)
670 bus->bustype = SSB_BUSTYPE_PCMCIA;
671 bus->host_pcmcia = pcmcia_dev;
672 bus->ops = &ssb_pcmcia_ops;
674 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
676 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
677 "PCMCIA device %s\n", pcmcia_dev->devname);
682 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
683 #endif /* CONFIG_SSB_PCMCIAHOST */
685 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
686 unsigned long baseaddr,
687 ssb_invariants_func_t get_invariants)
691 bus->bustype = SSB_BUSTYPE_SSB;
692 bus->ops = &ssb_ssb_ops;
694 err = ssb_bus_register(bus, get_invariants, baseaddr);
696 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
697 "address 0x%08lX\n", baseaddr);
703 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
705 drv->drv.name = drv->name;
706 drv->drv.bus = &ssb_bustype;
707 drv->drv.owner = owner;
709 return driver_register(&drv->drv);
711 EXPORT_SYMBOL(__ssb_driver_register);
713 void ssb_driver_unregister(struct ssb_driver *drv)
715 driver_unregister(&drv->drv);
717 EXPORT_SYMBOL(ssb_driver_unregister);
719 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
721 struct ssb_bus *bus = dev->bus;
722 struct ssb_device *ent;
725 for (i = 0; i < bus->nr_devices; i++) {
726 ent = &(bus->devices[i]);
727 if (ent->id.vendor != dev->id.vendor)
729 if (ent->id.coreid != dev->id.coreid)
732 ent->devtypedata = data;
735 EXPORT_SYMBOL(ssb_set_devtypedata);
737 static u32 clkfactor_f6_resolve(u32 v)
739 /* map the magic values */
741 case SSB_CHIPCO_CLK_F6_2:
743 case SSB_CHIPCO_CLK_F6_3:
745 case SSB_CHIPCO_CLK_F6_4:
747 case SSB_CHIPCO_CLK_F6_5:
749 case SSB_CHIPCO_CLK_F6_6:
751 case SSB_CHIPCO_CLK_F6_7:
757 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
758 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
760 u32 n1, n2, clock, m1, m2, m3, mc;
762 n1 = (n & SSB_CHIPCO_CLK_N1);
763 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
766 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
767 if (m & SSB_CHIPCO_CLK_T6_MMASK)
768 return SSB_CHIPCO_CLK_T6_M0;
769 return SSB_CHIPCO_CLK_T6_M1;
770 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
771 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
772 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
773 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
774 n1 = clkfactor_f6_resolve(n1);
775 n2 += SSB_CHIPCO_CLK_F5_BIAS;
777 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
778 n1 += SSB_CHIPCO_CLK_T2_BIAS;
779 n2 += SSB_CHIPCO_CLK_T2_BIAS;
780 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
781 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
783 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
790 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
791 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
792 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
795 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
800 m1 = (m & SSB_CHIPCO_CLK_M1);
801 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
802 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
803 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
806 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
807 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
808 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
809 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
810 m1 = clkfactor_f6_resolve(m1);
811 if ((plltype == SSB_PLLTYPE_1) ||
812 (plltype == SSB_PLLTYPE_3))
813 m2 += SSB_CHIPCO_CLK_F5_BIAS;
815 m2 = clkfactor_f6_resolve(m2);
816 m3 = clkfactor_f6_resolve(m3);
819 case SSB_CHIPCO_CLK_MC_BYPASS:
821 case SSB_CHIPCO_CLK_MC_M1:
823 case SSB_CHIPCO_CLK_MC_M1M2:
824 return (clock / (m1 * m2));
825 case SSB_CHIPCO_CLK_MC_M1M2M3:
826 return (clock / (m1 * m2 * m3));
827 case SSB_CHIPCO_CLK_MC_M1M3:
828 return (clock / (m1 * m3));
832 m1 += SSB_CHIPCO_CLK_T2_BIAS;
833 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
834 m3 += SSB_CHIPCO_CLK_T2_BIAS;
835 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
836 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
837 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
839 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
841 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
843 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
852 /* Get the current speed the backplane is running at */
853 u32 ssb_clockspeed(struct ssb_bus *bus)
857 u32 clkctl_n, clkctl_m;
859 if (ssb_extif_available(&bus->extif))
860 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
861 &clkctl_n, &clkctl_m);
862 else if (bus->chipco.dev)
863 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
864 &clkctl_n, &clkctl_m);
868 if (bus->chip_id == 0x5365) {
871 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
872 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
878 EXPORT_SYMBOL(ssb_clockspeed);
880 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
882 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
884 /* The REJECT bit changed position in TMSLOW between
885 * Backplane revisions. */
887 case SSB_IDLOW_SSBREV_22:
888 return SSB_TMSLOW_REJECT_22;
889 case SSB_IDLOW_SSBREV_23:
890 return SSB_TMSLOW_REJECT_23;
891 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
892 case SSB_IDLOW_SSBREV_25: /* same here */
893 case SSB_IDLOW_SSBREV_26: /* same here */
894 case SSB_IDLOW_SSBREV_27: /* same here */
895 return SSB_TMSLOW_REJECT_23; /* this is a guess */
897 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
900 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
903 int ssb_device_is_enabled(struct ssb_device *dev)
908 reject = ssb_tmslow_reject_bitmask(dev);
909 val = ssb_read32(dev, SSB_TMSLOW);
910 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
912 return (val == SSB_TMSLOW_CLOCK);
914 EXPORT_SYMBOL(ssb_device_is_enabled);
916 static void ssb_flush_tmslow(struct ssb_device *dev)
918 /* Make _really_ sure the device has finished the TMSLOW
919 * register write transaction, as we risk running into
920 * a machine check exception otherwise.
921 * Do this by reading the register back to commit the
922 * PCI write and delay an additional usec for the device
923 * to react to the change. */
924 ssb_read32(dev, SSB_TMSLOW);
928 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
932 ssb_device_disable(dev, core_specific_flags);
933 ssb_write32(dev, SSB_TMSLOW,
934 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
935 SSB_TMSLOW_FGC | core_specific_flags);
936 ssb_flush_tmslow(dev);
938 /* Clear SERR if set. This is a hw bug workaround. */
939 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
940 ssb_write32(dev, SSB_TMSHIGH, 0);
942 val = ssb_read32(dev, SSB_IMSTATE);
943 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
944 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
945 ssb_write32(dev, SSB_IMSTATE, val);
948 ssb_write32(dev, SSB_TMSLOW,
949 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
950 core_specific_flags);
951 ssb_flush_tmslow(dev);
953 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
954 core_specific_flags);
955 ssb_flush_tmslow(dev);
957 EXPORT_SYMBOL(ssb_device_enable);
959 /* Wait for a bit in a register to get set or unset.
960 * timeout is in units of ten-microseconds */
961 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
962 int timeout, int set)
967 for (i = 0; i < timeout; i++) {
968 val = ssb_read32(dev, reg);
973 if (!(val & bitmask))
978 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
979 "register %04X to %s.\n",
980 bitmask, reg, (set ? "set" : "clear"));
985 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
989 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
992 reject = ssb_tmslow_reject_bitmask(dev);
993 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
994 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
995 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
996 ssb_write32(dev, SSB_TMSLOW,
997 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
998 reject | SSB_TMSLOW_RESET |
999 core_specific_flags);
1000 ssb_flush_tmslow(dev);
1002 ssb_write32(dev, SSB_TMSLOW,
1003 reject | SSB_TMSLOW_RESET |
1004 core_specific_flags);
1005 ssb_flush_tmslow(dev);
1007 EXPORT_SYMBOL(ssb_device_disable);
1009 u32 ssb_dma_translation(struct ssb_device *dev)
1011 switch (dev->bus->bustype) {
1012 case SSB_BUSTYPE_SSB:
1014 case SSB_BUSTYPE_PCI:
1015 case SSB_BUSTYPE_PCMCIA:
1020 EXPORT_SYMBOL(ssb_dma_translation);
1022 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1024 struct device *dma_dev = ssb_dev->dma_dev;
1026 #ifdef CONFIG_SSB_PCIHOST
1027 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI)
1028 return dma_set_mask(dma_dev, mask);
1030 dma_dev->coherent_dma_mask = mask;
1031 dma_dev->dma_mask = &dma_dev->coherent_dma_mask;
1035 EXPORT_SYMBOL(ssb_dma_set_mask);
1037 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1039 struct ssb_chipcommon *cc;
1042 /* On buses where more than one core may be working
1043 * at a time, we must not powerdown stuff if there are
1044 * still cores that may want to run. */
1045 if (bus->bustype == SSB_BUSTYPE_SSB)
1052 if (cc->dev->id.revision < 5)
1055 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1056 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1060 #ifdef CONFIG_SSB_DEBUG
1061 bus->powered_up = 0;
1065 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1068 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1070 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1072 struct ssb_chipcommon *cc;
1074 enum ssb_clkmode mode;
1076 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1080 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1081 ssb_chipco_set_clockmode(cc, mode);
1083 #ifdef CONFIG_SSB_DEBUG
1084 bus->powered_up = 1;
1088 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1091 EXPORT_SYMBOL(ssb_bus_powerup);
1093 u32 ssb_admatch_base(u32 adm)
1097 switch (adm & SSB_ADM_TYPE) {
1099 base = (adm & SSB_ADM_BASE0);
1102 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1103 base = (adm & SSB_ADM_BASE1);
1106 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1107 base = (adm & SSB_ADM_BASE2);
1115 EXPORT_SYMBOL(ssb_admatch_base);
1117 u32 ssb_admatch_size(u32 adm)
1121 switch (adm & SSB_ADM_TYPE) {
1123 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1126 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1127 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1130 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1131 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1136 size = (1 << (size + 1));
1140 EXPORT_SYMBOL(ssb_admatch_size);
1142 static int __init ssb_modinit(void)
1146 /* See the comment at the ssb_is_early_boot definition */
1147 ssb_is_early_boot = 0;
1148 err = bus_register(&ssb_bustype);
1152 /* Maybe we already registered some buses at early boot.
1153 * Check for this and attach them
1156 err = ssb_attach_queued_buses();
1159 bus_unregister(&ssb_bustype);
1161 err = b43_pci_ssb_bridge_init();
1163 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1164 "initialization failed");
1165 /* don't fail SSB init because of this */
1171 /* ssb must be initialized after PCI but before the ssb drivers.
1172 * That means we must use some initcall between subsys_initcall
1173 * and device_initcall. */
1174 fs_initcall(ssb_modinit);
1176 static void __exit ssb_modexit(void)
1178 b43_pci_ssb_bridge_exit();
1179 bus_unregister(&ssb_bustype);
1181 module_exit(ssb_modexit)