Merge branch 'pxa-palm' into pxa-machines
[linux-2.6] / arch / x86 / pci / i386.c
1 /*
2  *      Low-Level PCI Access for i386 machines
3  *
4  * Copyright 1993, 1994 Drew Eckhardt
5  *      Visionary Computing
6  *      (Unix and Linux consulting and custom programming)
7  *      Drew@Colorado.EDU
8  *      +1 (303) 786-7975
9  *
10  * Drew's work was sponsored by:
11  *      iX Multiuser Multitasking Magazine
12  *      Hannover, Germany
13  *      hm@ix.de
14  *
15  * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
16  *
17  * For more information, please consult the following manuals (look at
18  * http://www.pcisig.com/ for how to get them):
19  *
20  * PCI BIOS Specification
21  * PCI Local Bus Specification
22  * PCI to PCI Bridge Specification
23  * PCI System Design Guide
24  *
25  */
26
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/ioport.h>
32 #include <linux/errno.h>
33 #include <linux/bootmem.h>
34
35 #include <asm/pat.h>
36
37 #include "pci.h"
38
39 static int
40 skip_isa_ioresource_align(struct pci_dev *dev) {
41
42         if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) &&
43             !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
44                 return 1;
45         return 0;
46 }
47
48 /*
49  * We need to avoid collisions with `mirrored' VGA ports
50  * and other strange ISA hardware, so we always want the
51  * addresses to be allocated in the 0x000-0x0ff region
52  * modulo 0x400.
53  *
54  * Why? Because some silly external IO cards only decode
55  * the low 10 bits of the IO address. The 0x00-0xff region
56  * is reserved for motherboard devices that decode all 16
57  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
58  * but we want to try to avoid allocating at 0x2900-0x2bff
59  * which might have be mirrored at 0x0100-0x03ff..
60  */
61 void
62 pcibios_align_resource(void *data, struct resource *res,
63                         resource_size_t size, resource_size_t align)
64 {
65         struct pci_dev *dev = data;
66
67         if (res->flags & IORESOURCE_IO) {
68                 resource_size_t start = res->start;
69
70                 if (skip_isa_ioresource_align(dev))
71                         return;
72                 if (start & 0x300) {
73                         start = (start + 0x3ff) & ~0x3ff;
74                         res->start = start;
75                 }
76         }
77 }
78 EXPORT_SYMBOL(pcibios_align_resource);
79
80 /*
81  *  Handle resources of PCI devices.  If the world were perfect, we could
82  *  just allocate all the resource regions and do nothing more.  It isn't.
83  *  On the other hand, we cannot just re-allocate all devices, as it would
84  *  require us to know lots of host bridge internals.  So we attempt to
85  *  keep as much of the original configuration as possible, but tweak it
86  *  when it's found to be wrong.
87  *
88  *  Known BIOS problems we have to work around:
89  *      - I/O or memory regions not configured
90  *      - regions configured, but not enabled in the command register
91  *      - bogus I/O addresses above 64K used
92  *      - expansion ROMs left enabled (this may sound harmless, but given
93  *        the fact the PCI specs explicitly allow address decoders to be
94  *        shared between expansion ROMs and other resource regions, it's
95  *        at least dangerous)
96  *
97  *  Our solution:
98  *      (1) Allocate resources for all buses behind PCI-to-PCI bridges.
99  *          This gives us fixed barriers on where we can allocate.
100  *      (2) Allocate resources for all enabled devices.  If there is
101  *          a collision, just mark the resource as unallocated. Also
102  *          disable expansion ROMs during this step.
103  *      (3) Try to allocate resources for disabled devices.  If the
104  *          resources were assigned correctly, everything goes well,
105  *          if they weren't, they won't disturb allocation of other
106  *          resources.
107  *      (4) Assign new addresses to resources which were either
108  *          not configured at all or misconfigured.  If explicitly
109  *          requested by the user, configure expansion ROM address
110  *          as well.
111  */
112
113 static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
114 {
115         struct pci_bus *bus;
116         struct pci_dev *dev;
117         int idx;
118         struct resource *r, *pr;
119
120         /* Depth-First Search on bus tree */
121         list_for_each_entry(bus, bus_list, node) {
122                 if ((dev = bus->self)) {
123                         for (idx = PCI_BRIDGE_RESOURCES;
124                             idx < PCI_NUM_RESOURCES; idx++) {
125                                 r = &dev->resource[idx];
126                                 if (!r->flags)
127                                         continue;
128                                 pr = pci_find_parent_resource(dev, r);
129                                 if (!r->start || !pr ||
130                                     request_resource(pr, r) < 0) {
131                                         dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx);
132                                         /*
133                                          * Something is wrong with the region.
134                                          * Invalidate the resource to prevent
135                                          * child resource allocations in this
136                                          * range.
137                                          */
138                                         r->flags = 0;
139                                 }
140                         }
141                 }
142                 pcibios_allocate_bus_resources(&bus->children);
143         }
144 }
145
146 static void __init pcibios_allocate_resources(int pass)
147 {
148         struct pci_dev *dev = NULL;
149         int idx, disabled;
150         u16 command;
151         struct resource *r, *pr;
152
153         for_each_pci_dev(dev) {
154                 pci_read_config_word(dev, PCI_COMMAND, &command);
155                 for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
156                         r = &dev->resource[idx];
157                         if (r->parent)          /* Already allocated */
158                                 continue;
159                         if (!r->start)          /* Address not assigned at all */
160                                 continue;
161                         if (r->flags & IORESOURCE_IO)
162                                 disabled = !(command & PCI_COMMAND_IO);
163                         else
164                                 disabled = !(command & PCI_COMMAND_MEMORY);
165                         if (pass == disabled) {
166                                 dev_dbg(&dev->dev, "resource %#08llx-%#08llx (f=%lx, d=%d, p=%d)\n",
167                                         (unsigned long long) r->start,
168                                         (unsigned long long) r->end,
169                                         r->flags, disabled, pass);
170                                 pr = pci_find_parent_resource(dev, r);
171                                 if (!pr || request_resource(pr, r) < 0) {
172                                         dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx);
173                                         /* We'll assign a new address later */
174                                         r->end -= r->start;
175                                         r->start = 0;
176                                 }
177                         }
178                 }
179                 if (!pass) {
180                         r = &dev->resource[PCI_ROM_RESOURCE];
181                         if (r->flags & IORESOURCE_ROM_ENABLE) {
182                                 /* Turn the ROM off, leave the resource region,
183                                  * but keep it unregistered. */
184                                 u32 reg;
185                                 dev_dbg(&dev->dev, "disabling ROM\n");
186                                 r->flags &= ~IORESOURCE_ROM_ENABLE;
187                                 pci_read_config_dword(dev,
188                                                 dev->rom_base_reg, &reg);
189                                 pci_write_config_dword(dev, dev->rom_base_reg,
190                                                 reg & ~PCI_ROM_ADDRESS_ENABLE);
191                         }
192                 }
193         }
194 }
195
196 static int __init pcibios_assign_resources(void)
197 {
198         struct pci_dev *dev = NULL;
199         struct resource *r, *pr;
200
201         if (!(pci_probe & PCI_ASSIGN_ROMS)) {
202                 /*
203                  * Try to use BIOS settings for ROMs, otherwise let
204                  * pci_assign_unassigned_resources() allocate the new
205                  * addresses.
206                  */
207                 for_each_pci_dev(dev) {
208                         r = &dev->resource[PCI_ROM_RESOURCE];
209                         if (!r->flags || !r->start)
210                                 continue;
211                         pr = pci_find_parent_resource(dev, r);
212                         if (!pr || request_resource(pr, r) < 0) {
213                                 r->end -= r->start;
214                                 r->start = 0;
215                         }
216                 }
217         }
218
219         pci_assign_unassigned_resources();
220
221         return 0;
222 }
223
224 void __init pcibios_resource_survey(void)
225 {
226         DBG("PCI: Allocating resources\n");
227         pcibios_allocate_bus_resources(&pci_root_buses);
228         pcibios_allocate_resources(0);
229         pcibios_allocate_resources(1);
230 }
231
232 /**
233  * called in fs_initcall (one below subsys_initcall),
234  * give a chance for motherboard reserve resources
235  */
236 fs_initcall(pcibios_assign_resources);
237
238 /*
239  *  If we set up a device for bus mastering, we need to check the latency
240  *  timer as certain crappy BIOSes forget to set it properly.
241  */
242 unsigned int pcibios_max_latency = 255;
243
244 void pcibios_set_master(struct pci_dev *dev)
245 {
246         u8 lat;
247         pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
248         if (lat < 16)
249                 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
250         else if (lat > pcibios_max_latency)
251                 lat = pcibios_max_latency;
252         else
253                 return;
254         dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
255         pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
256 }
257
258 static void pci_unmap_page_range(struct vm_area_struct *vma)
259 {
260         u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT;
261         free_memtype(addr, addr + vma->vm_end - vma->vm_start);
262 }
263
264 static void pci_track_mmap_page_range(struct vm_area_struct *vma)
265 {
266         u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT;
267         unsigned long flags = pgprot_val(vma->vm_page_prot)
268                                                 & _PAGE_CACHE_MASK;
269
270         reserve_memtype(addr, addr + vma->vm_end - vma->vm_start, flags, NULL);
271 }
272
273 static struct vm_operations_struct pci_mmap_ops = {
274         .open  = pci_track_mmap_page_range,
275         .close = pci_unmap_page_range,
276         .access = generic_access_phys,
277 };
278
279 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
280                         enum pci_mmap_state mmap_state, int write_combine)
281 {
282         unsigned long prot;
283         u64 addr = vma->vm_pgoff << PAGE_SHIFT;
284         unsigned long len = vma->vm_end - vma->vm_start;
285         unsigned long flags;
286         unsigned long new_flags;
287         int retval;
288
289         /* I/O space cannot be accessed via normal processor loads and
290          * stores on this platform.
291          */
292         if (mmap_state == pci_mmap_io)
293                 return -EINVAL;
294
295         prot = pgprot_val(vma->vm_page_prot);
296         if (pat_enabled && write_combine)
297                 prot |= _PAGE_CACHE_WC;
298         else if (pat_enabled || boot_cpu_data.x86 > 3)
299                 /*
300                  * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
301                  * To avoid attribute conflicts, request UC MINUS here
302                  * aswell.
303                  */
304                 prot |= _PAGE_CACHE_UC_MINUS;
305
306         vma->vm_page_prot = __pgprot(prot);
307
308         flags = pgprot_val(vma->vm_page_prot) & _PAGE_CACHE_MASK;
309         retval = reserve_memtype(addr, addr + len, flags, &new_flags);
310         if (retval)
311                 return retval;
312
313         if (flags != new_flags) {
314                 /*
315                  * Do not fallback to certain memory types with certain
316                  * requested type:
317                  * - request is uncached, return cannot be write-back
318                  * - request is uncached, return cannot be write-combine
319                  * - request is write-combine, return cannot be write-back
320                  */
321                 if ((flags == _PAGE_CACHE_UC_MINUS &&
322                      (new_flags == _PAGE_CACHE_WB)) ||
323                     (flags == _PAGE_CACHE_WC &&
324                      new_flags == _PAGE_CACHE_WB)) {
325                         free_memtype(addr, addr+len);
326                         return -EINVAL;
327                 }
328                 flags = new_flags;
329         }
330
331         if (((vma->vm_pgoff < max_low_pfn_mapped) ||
332              (vma->vm_pgoff >= (1UL<<(32 - PAGE_SHIFT)) &&
333               vma->vm_pgoff < max_pfn_mapped)) &&
334             ioremap_change_attr((unsigned long)__va(addr), len, flags)) {
335                 free_memtype(addr, addr + len);
336                 return -EINVAL;
337         }
338
339         if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
340                                vma->vm_end - vma->vm_start,
341                                vma->vm_page_prot))
342                 return -EAGAIN;
343
344         vma->vm_ops = &pci_mmap_ops;
345
346         return 0;
347 }